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drivers/flash: stm32wb: Add HSEM

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Add HSEM for Flash access since shared between 2 cores.

Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
This commit is contained in:
Erwan Gouriou 2019-03-04 09:56:17 +01:00 • committed by Anas Nashif
commit 51033a5814
2 changed files with 22 additions and 0 deletions
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18
drivers/flash/flash_stm32.c
View file

@ -34,6 +34,8 @@
#define STM32_FLASH_TIMEOUT (K_MSEC(25))
#endif
#define CFG_HW_FLASH_SEMID 2
/*
* This is named flash_stm32_sem_take instead of flash_stm32_lock (and
* similarly for flash_stm32_sem_give) to avoid confusion with locking
@ -41,12 +43,24 @@
*/
static inline void flash_stm32_sem_take(struct device *dev)
{
#ifdef CONFIG_SOC_SERIES_STM32WBX
while (LL_HSEM_1StepLock(HSEM, CFG_HW_FLASH_SEMID))
;
#endif /* CONFIG_SOC_SERIES_STM32WBX */
k_sem_take(&FLASH_STM32_PRIV(dev)->sem, K_FOREVER);
}
static inline void flash_stm32_sem_give(struct device *dev)
{
k_sem_give(&FLASH_STM32_PRIV(dev)->sem);
#ifdef CONFIG_SOC_SERIES_STM32WBX
LL_HSEM_ReleaseLock(HSEM, CFG_HW_FLASH_SEMID, 0);
#endif /* CONFIG_SOC_SERIES_STM32WBX */
}
#if !defined(CONFIG_SOC_SERIES_STM32WBX)
@ -294,6 +308,10 @@ static int stm32_flash_init(struct device *dev)
}
#endif
#ifdef CONFIG_SOC_SERIES_STM32WBX
LL_AHB3_GRP1_EnableClock(LL_AHB3_GRP1_PERIPH_HSEM);
#endif /* CONFIG_SOC_SERIES_STM32WBX */
k_sem_init(&p->sem, 1, 1);
return flash_stm32_write_protection(dev, false);

4
soc/arm/st_stm32/stm32wb/soc.h
View file

@ -43,6 +43,10 @@
#include <stm32wbxx_ll_system.h>
#endif /* CONFIG_CLOCK_CONTROL_STM32_CUBE */
#ifdef CONFIG_FLASH
#include <stm32wbxx_ll_hsem.h>
#endif /* CONFIG_FLASH */
#endif /* !_ASMLANGUAGE */
#endif /* _STM32WBX_SOC_H_ */