boards: xtensa: adsp: add support for imx8x board

Add support for i.MX8QXP board by defining defconfig,
board configuration and device tree.
This is very similar with i.MX8QM board and uses the
same SoC and dts/xtensa/nxp/nxp_imx8.dtsi.

From Audio DSP point of view, i.MX8QXP has a
1 Xtensa HiFi4 core, with 64 KB TCM,
448 KB OCRAM, 8MB SDRAM and 1 ESAI, 1 SAI as
audio interfaces.

Signed-off-by: Iuliana Prodan <iuliana.prodan@nxp.com>

boards/xtensa/nxp_adsp_imx8x/Kconfig.board

@@ -0,0 +1,7 @@
+# Xtensa board configuration
+
+# Copyright (c) 2021 NXP
+# SPDX-License-Identifier: Apache-2.0
+
+config  BOARD_NXP_ADSP_IMX8X
+	bool "NXP ADSP i.MX8X"

boards/xtensa/nxp_adsp_imx8x/Kconfig.defconfig

@@ -0,0 +1,18 @@
+# Copyright (c) 2021 NXP
+#
+# SPDX-License-Identifier: Apache-2.0
+
+if BOARD_NXP_ADSP_IMX8X
+
+config BOARD
+	default "nxp_adsp_imx8x"
+
+config DUMMY_DMA
+	default y
+	depends on DMA
+
+config IMX_EDMA
+	default y
+	depends on DMA
+
+endif # BOARD_NXP_ADSP_IMX8X

boards/xtensa/nxp_adsp_imx8x/board.cmake

@@ -0,0 +1,4 @@
+# SPDX-License-Identifier: Apache-2.0
+
+board_set_flasher_ifnset(misc-flasher)
+board_finalize_runner_args(misc-flasher)

boards/xtensa/nxp_adsp_imx8x/nxp_adsp_imx8x.dts

@@ -0,0 +1,18 @@
+/*
+ * Copyright (c) 2021 NXP
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+
+/dts-v1/;
+
+#include <nxp/nxp_imx8.dtsi>
+
+/ {
+	model = "nxp_adsp_imx8x";
+	compatible = "nxp";
+
+	chosen {
+		zephyr,sram = &sram0;
+	};
+};

boards/xtensa/nxp_adsp_imx8x/nxp_adsp_imx8x.yaml

@@ -0,0 +1,10 @@
+identifier: nxp_adsp_imx8x
+name: i.MX8X DSP
+type: mcu
+arch: xtensa
+toolchain:
+  - zephyr
+testing:
+  only_tags:
+     - kernel
+     - sof

boards/xtensa/nxp_adsp_imx8x/nxp_adsp_imx8x_defconfig

@@ -0,0 +1,22 @@
+# SPDX-License-Identifier: Apache-2.0
+
+CONFIG_MAIN_STACK_SIZE=3072
+
+CONFIG_SOC_SERIES_NXP_IMX8=y
+CONFIG_BOARD_NXP_ADSP_IMX8X=y
+
+CONFIG_GEN_ISR_TABLES=y
+CONFIG_GEN_IRQ_VECTOR_TABLE=n
+
+CONFIG_XTENSA_RESET_VECTOR=y
+
+CONFIG_XTENSA_USE_CORE_CRT1=y
+
+CONFIG_XTENSA_SMALL_VECTOR_TABLE_ENTRY=y
+
+CONFIG_MULTI_LEVEL_INTERRUPTS=n
+CONFIG_2ND_LEVEL_INTERRUPTS=n
+
+CONFIG_BOOTLOADER_SRAM_SIZE=192
+CONFIG_BUILD_OUTPUT_BIN=n
+CONFIG_CLEANUP_INTERMEDIATE_FILES=y