x86: mitigate swapgs Spectre V1 attacks
See CVE-2019-1125. We mitigate this by adding an 'lfence' upon interrupt/exception entry after the decision has been made whether it's necessary to invoke 'swapgs' or not. Only applies to x86_64, 32-bit doesn't use swapgs. Signed-off-by: Andrew Boie <andrew.p.boie@intel.com>
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2 changed files with 17 additions and 4 deletions
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@ -188,8 +188,9 @@ config X86_NO_SPECTRE_V1
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bool
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bool
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help
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help
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This hidden option should be set on a per-SOC basis to indicate that
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This hidden option should be set on a per-SOC basis to indicate that
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a particular SOC is not vulnerable to the Spectre V1, V1.1, and V1.2
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a particular SOC is not vulnerable to the Spectre V1, V1.1, V1.2, and
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CPU vulnerabilities as described in CVE-2017-5753 and CVE-2018-3693.
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swapgs CPU vulnerabilities as described in CVE-2017-5753,
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CVE-2018-3693, and CVE-2019-1125.
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config X86_NO_SPECTRE_V2
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config X86_NO_SPECTRE_V2
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bool
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bool
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@ -310,8 +310,12 @@ __resume:
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jz 1f
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jz 1f
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swapgs
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swapgs
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#endif /* CONFIG_USERSPACE */
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#endif /* CONFIG_USERSPACE */
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1:
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1: iretq
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#ifdef CONFIG_X86_BOUNDS_CHECK_BYPASS_MITIGATION
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/* swapgs variant of Spectre V1. Disable speculation past this point */
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lfence
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#endif /* CONFIG_X86_BOUNDS_CHECK_BYPASS_MITIGATION */
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iretq
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@ -329,6 +333,10 @@ except: /*
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jz 1f
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jz 1f
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swapgs
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swapgs
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1:
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1:
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#ifdef CONFIG_X86_BOUNDS_CHECK_BYPASS_MITIGATION
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/* swapgs variant of Spectre V1. Disable speculation past this point */
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lfence
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#endif /* CONFIG_X86_BOUNDS_CHECK_BYPASS_MITIGATION */
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#endif /* CONFIG_USERSPACE */
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#endif /* CONFIG_USERSPACE */
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pushq %r15
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pushq %r15
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subq $X86_FXSAVE_SIZE, %rsp
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subq $X86_FXSAVE_SIZE, %rsp
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@ -427,6 +435,10 @@ irq:
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jz 1f
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jz 1f
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swapgs
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swapgs
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1:
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1:
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#ifdef CONFIG_X86_BOUNDS_CHECK_BYPASS_MITIGATION
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/* swapgs variant of Spectre V1. Disable speculation past this point */
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lfence
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#endif /* CONFIG_X86_BOUNDS_CHECK_BYPASS_MITIGATION */
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#endif /* CONFIG_USERSPACE */
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#endif /* CONFIG_USERSPACE */
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pushq %rsi
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pushq %rsi
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movq %gs:__x86_tss64_t_cpu_OFFSET, %rsi
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movq %gs:__x86_tss64_t_cpu_OFFSET, %rsi
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