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kernel: rename z_arch_ to arch_

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Promote the private z_arch_* namespace, which specifies
the interface between the core kernel and the
architecture code, to a new top-level namespace named
arch_*.

This allows our documentation generation to create
online documentation for this set of interfaces,
and this set of interfaces is worth treating in a
more formal way anyway.

Signed-off-by: Andrew Boie <andrew.p.boie@intel.com>
This commit is contained in:
Andrew Boie 2019-11-07 12:43:29 -08:00 • committed by Andrew Boie
commit 4f77c2ad53
178 changed files with 912 additions and 910 deletions
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6
drivers/interrupt_controller/plic.c
View file

@ -33,7 +33,7 @@ static int save_irq;
*
* This routine enables a RISCV PLIC-specific interrupt line.
* riscv_plic_irq_enable is called by SOC_FAMILY_RISCV_PRIVILEGE
* z_arch_irq_enable function to enable external interrupts for
* arch_irq_enable function to enable external interrupts for
* IRQS level == 2, whenever CONFIG_RISCV_HAS_PLIC variable is set.
* @param irq IRQ number to enable
*
@ -57,7 +57,7 @@ void riscv_plic_irq_enable(u32_t irq)
*
* This routine disables a RISCV PLIC-specific interrupt line.
* riscv_plic_irq_disable is called by SOC_FAMILY_RISCV_PRIVILEGE
* z_arch_irq_disable function to disable external interrupts, for
* arch_irq_disable function to disable external interrupts, for
* IRQS level == 2, whenever CONFIG_RISCV_HAS_PLIC variable is set.
* @param irq IRQ number to disable
*
@ -98,7 +98,7 @@ int riscv_plic_irq_is_enabled(u32_t irq)
* @brief Set priority of a riscv PLIC-specific interrupt line
*
* This routine set the priority of a RISCV PLIC-specific interrupt line.
* riscv_plic_irq_set_prio is called by riscv z_arch_irq_priority_set to set
* riscv_plic_irq_set_prio is called by riscv arch_irq_priority_set to set
* the priority of an interrupt whenever CONFIG_RISCV_HAS_PLIC variable is set.
* @param irq IRQ number for which to set priority
*

4
drivers/interrupt_controller/system_apic.c
View file

@ -72,7 +72,7 @@ void z_irq_controller_irq_config(unsigned int vector, unsigned int irq,
*
* @return N/A
*/
void z_arch_irq_enable(unsigned int irq)
void arch_irq_enable(unsigned int irq)
{
if (IS_IOAPIC_IRQ(irq)) {
z_ioapic_irq_enable(irq);
@ -92,7 +92,7 @@ void z_arch_irq_enable(unsigned int irq)
*
* @return N/A
*/
void z_arch_irq_disable(unsigned int irq)
void arch_irq_disable(unsigned int irq)
{
if (IS_IOAPIC_IRQ(irq)) {
z_ioapic_irq_disable(irq);

6
drivers/interrupt_controller/vexriscv_litex.c
View file

@ -83,17 +83,17 @@ static void vexriscv_litex_irq_handler(void *device)
#endif
}
void z_arch_irq_enable(unsigned int irq)
void arch_irq_enable(unsigned int irq)
{
vexriscv_litex_irq_setmask(vexriscv_litex_irq_getmask() | (1 << irq));
}
void z_arch_irq_disable(unsigned int irq)
void arch_irq_disable(unsigned int irq)
{
vexriscv_litex_irq_setmask(vexriscv_litex_irq_getmask() & ~(1 << irq));
}
int z_arch_irq_is_enabled(unsigned int irq)
int arch_irq_is_enabled(unsigned int irq)
{
return vexriscv_litex_irq_getmask() & (1 << irq);
}