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dts: nrf5: Changed GPIO and GPIOTE define names

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Changed names using nrf5 to nrf for consistency with other drivers.

Signed-off-by: Mieszko Mierunski <mieszko.mierunski@nordicsemi.no>
This commit is contained in:
Mieszko Mierunski 2018-07-18 13:05:13 +02:00 • committed by Anas Nashif
commit 4f6aac1a67
28 changed files with 107 additions and 104 deletions
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6
arch/arm/soc/nordic_nrf/nrf51/dts.fixup
View file

@ -9,9 +9,9 @@
#define FLASH_DEV_NAME NRF_NRF51_FLASH_CONTROLLER_4001E000_LABEL
#define CONFIG_GPIO_NRF5_P0_DEV_NAME NORDIC_NRF5_GPIO_50000000_LABEL
#define CONFIG_GPIOTE_NRF5_IRQ_PRI NORDIC_NRF5_GPIOTE_40006000_IRQ_0_PRIORITY
#define CONFIG_GPIOTE_NRF5_IRQ NORDIC_NRF5_GPIOTE_40006000_IRQ_0
#define CONFIG_GPIO_P0_DEV_NAME NORDIC_NRF_GPIO_50000000_LABEL
#define CONFIG_GPIOTE_IRQ_PRI NORDIC_NRF_GPIOTE_40006000_IRQ_0_PRIORITY
#define CONFIG_GPIOTE_IRQ NORDIC_NRF_GPIOTE_40006000_IRQ_0
#define CONFIG_I2C_0_BASE_ADDR NORDIC_NRF5_I2C_40003000_BASE_ADDRESS
#define CONFIG_I2C_0_NAME NORDIC_NRF5_I2C_40003000_LABEL

10
arch/arm/soc/nordic_nrf/nrf52/dts.fixup
View file

@ -23,10 +23,12 @@
#define FLASH_DEV_NAME NRF_NRF52_FLASH_CONTROLLER_4001E000_LABEL
#define CONFIG_GPIO_NRF5_P0_DEV_NAME NORDIC_NRF5_GPIO_50000000_LABEL
#define CONFIG_GPIO_NRF5_P1_DEV_NAME NORDIC_NRF5_GPIO_50000300_LABEL
#define CONFIG_GPIOTE_NRF5_IRQ_PRI NORDIC_NRF5_GPIOTE_40006000_IRQ_0_PRIORITY
#define CONFIG_GPIOTE_NRF5_IRQ NORDIC_NRF5_GPIOTE_40006000_IRQ_0
#define CONFIG_GPIO_P0_DEV_NAME NORDIC_NRF_GPIO_50000000_LABEL
#if CONFIG_HAS_HW_NRF_GPIO1
#define CONFIG_GPIO_P1_DEV_NAME NORDIC_NRF_GPIO_50000300_LABEL
#endif
#define CONFIG_GPIOTE_IRQ_PRI NORDIC_NRF_GPIOTE_40006000_IRQ_0_PRIORITY
#define CONFIG_GPIOTE_IRQ NORDIC_NRF_GPIOTE_40006000_IRQ_0
#define CONFIG_I2C_0_BASE_ADDR NORDIC_NRF5_I2C_40003000_BASE_ADDRESS
#define CONFIG_I2C_0_NAME NORDIC_NRF5_I2C_40003000_LABEL

6
boards/arm/96b_nitrogen/board.h
View file

@ -11,15 +11,15 @@
/* Onboard USR1 GREEN LED */
#define USR1_GPIO_PIN 29
#define USR1_GPIO_PORT CONFIG_GPIO_NRF5_P0_DEV_NAME
#define USR1_GPIO_PORT CONFIG_GPIO_P0_DEV_NAME
/* Onboard BT BLUE LED */
#define BT_GPIO_PIN 28
#define BT_GPIO_PORT CONFIG_GPIO_NRF5_P0_DEV_NAME
#define BT_GPIO_PORT CONFIG_GPIO_P0_DEV_NAME
/* USER push button */
#define USER_PB_GPIO_PIN 27
#define USER_PB_GPIO_PORT CONFIG_GPIO_NRF5_P0_DEV_NAME
#define USER_PB_GPIO_PORT CONFIG_GPIO_P0_DEV_NAME
/* Aliases to make the basic samples (e.g. LED, button) work */
#define LED0_GPIO_PIN USR1_GPIO_PIN

28
boards/arm/bbc_microbit/board.h
View file

@ -11,59 +11,59 @@
/* Push button switch 0 (BTN_A) */
#define SW0_GPIO_PIN 17
#define SW0_GPIO_NAME CONFIG_GPIO_NRF5_P0_DEV_NAME
#define SW0_GPIO_NAME CONFIG_GPIO_P0_DEV_NAME
/* Push button switch 1 (BTN_B) */
#define SW1_GPIO_PIN 26
#define SW1_GPIO_NAME CONFIG_GPIO_NRF5_P0_DEV_NAME
#define SW1_GPIO_NAME CONFIG_GPIO_P0_DEV_NAME
/* Onboard LED Row 1 */
#define LED_ROW1_GPIO_PIN 13
#define LED_ROW1_GPIO_PORT CONFIG_GPIO_NRF5_P0_DEV_NAME
#define LED_ROW1_GPIO_PORT CONFIG_GPIO_P0_DEV_NAME
/* Onboard LED Row 2 */
#define LED_ROW2_GPIO_PIN 14
#define LED_ROW2_GPIO_PORT CONFIG_GPIO_NRF5_P0_DEV_NAME
#define LED_ROW2_GPIO_PORT CONFIG_GPIO_P0_DEV_NAME
/* Onboard LED Row 3 */
#define LED_ROW3_GPIO_PIN 15
#define LED_ROW3_GPIO_PORT CONFIG_GPIO_NRF5_P0_DEV_NAME
#define LED_ROW3_GPIO_PORT CONFIG_GPIO_P0_DEV_NAME
/* Onboard LED Column 1 */
#define LED_COL1_GPIO_PIN 4
#define LED_COL1_GPIO_PORT CONFIG_GPIO_NRF5_P0_DEV_NAME
#define LED_COL1_GPIO_PORT CONFIG_GPIO_P0_DEV_NAME
/* Onboard LED Column 2 */
#define LED_COL2_GPIO_PIN 5
#define LED_COL2_GPIO_PORT CONFIG_GPIO_NRF5_P0_DEV_NAME
#define LED_COL2_GPIO_PORT CONFIG_GPIO_P0_DEV_NAME
/* Onboard LED Column 3 */
#define LED_COL3_GPIO_PIN 6
#define LED_COL3_GPIO_PORT CONFIG_GPIO_NRF5_P0_DEV_NAME
#define LED_COL3_GPIO_PORT CONFIG_GPIO_P0_DEV_NAME
/* Onboard LED Column 4 */
#define LED_COL4_GPIO_PIN 7
#define LED_COL4_GPIO_PORT CONFIG_GPIO_NRF5_P0_DEV_NAME
#define LED_COL4_GPIO_PORT CONFIG_GPIO_P0_DEV_NAME
/* Onboard LED Column 5 */
#define LED_COL5_GPIO_PIN 8
#define LED_COL5_GPIO_PORT CONFIG_GPIO_NRF5_P0_DEV_NAME
#define LED_COL5_GPIO_PORT CONFIG_GPIO_P0_DEV_NAME
/* Onboard LED Column 6 */
#define LED_COL6_GPIO_PIN 9
#define LED_COL6_GPIO_PORT CONFIG_GPIO_NRF5_P0_DEV_NAME
#define LED_COL6_GPIO_PORT CONFIG_GPIO_P0_DEV_NAME
/* Onboard LED Column 7 */
#define LED_COL7_GPIO_PIN 10
#define LED_COL7_GPIO_PORT CONFIG_GPIO_NRF5_P0_DEV_NAME
#define LED_COL7_GPIO_PORT CONFIG_GPIO_P0_DEV_NAME
/* Onboard LED Column 8 */
#define LED_COL8_GPIO_PIN 11
#define LED_COL8_GPIO_PORT CONFIG_GPIO_NRF5_P0_DEV_NAME
#define LED_COL8_GPIO_PORT CONFIG_GPIO_P0_DEV_NAME
/* Onboard LED Column 9 */
#define LED_COL9_GPIO_PIN 12
#define LED_COL9_GPIO_PORT CONFIG_GPIO_NRF5_P0_DEV_NAME
#define LED_COL9_GPIO_PORT CONFIG_GPIO_P0_DEV_NAME
/* External edge connector pin mappings to nRF51 GPIO pin numbers.
* More information:

14
boards/arm/nrf51_ble400/board.h
View file

@ -11,32 +11,32 @@
/* Push button switch 0 KEY1 */
#define SW0_GPIO_PIN 16
#define SW0_GPIO_NAME CONFIG_GPIO_NRF5_P0_DEV_NAME
#define SW0_GPIO_NAME CONFIG_GPIO_P0_DEV_NAME
#define SW0_GPIO_PIN_PUD GPIO_PUD_PULL_UP
/* Push button switch 1 KEY2 */
#define SW1_GPIO_PIN 17
#define SW1_GPIO_NAME CONFIG_GPIO_NRF5_P0_DEV_NAME
#define SW1_GPIO_NAME CONFIG_GPIO_P0_DEV_NAME
#define SW1_GPIO_PIN_PUD GPIO_PUD_PULL_UP
/* Onboard RED LED 0 */
#define LED0_GPIO_PIN 18
#define LED0_GPIO_PORT CONFIG_GPIO_NRF5_P0_DEV_NAME
#define LED0_GPIO_PORT CONFIG_GPIO_P0_DEV_NAME
/* Onboard RED LED 1 */
#define LED1_GPIO_PIN 19
#define LED1_GPIO_PORT CONFIG_GPIO_NRF5_P0_DEV_NAME
#define LED1_GPIO_PORT CONFIG_GPIO_P0_DEV_NAME
/* Onboard RED LED 2 */
#define LED2_GPIO_PIN 20
#define LED2_GPIO_PORT CONFIG_GPIO_NRF5_P0_DEV_NAME
#define LED2_GPIO_PORT CONFIG_GPIO_P0_DEV_NAME
/* Onboard RED LED 3 */
#define LED3_GPIO_PIN 21
#define LED3_GPIO_PORT CONFIG_GPIO_NRF5_P0_DEV_NAME
#define LED3_GPIO_PORT CONFIG_GPIO_P0_DEV_NAME
/* Onboard RED LED 4 */
#define LED4_GPIO_PIN 22
#define LED4_GPIO_PORT CONFIG_GPIO_NRF5_P0_DEV_NAME
#define LED4_GPIO_PORT CONFIG_GPIO_P0_DEV_NAME
#endif /* __INC_BOARD_H */

2
boards/arm/nrf51_blenano/board.h
View file

@ -11,6 +11,6 @@
/* Onboard LED P0_19 */
#define LED0_GPIO_PIN 19
#define LED0_GPIO_PORT CONFIG_GPIO_NRF5_P0_DEV_NAME
#define LED0_GPIO_PORT CONFIG_GPIO_P0_DEV_NAME
#endif /* __INC_BOARD_H */

16
boards/arm/nrf51_pca10028/board.h
View file

@ -12,38 +12,38 @@
/* Push button switch 0 */
#define SW0_GPIO_PIN 17
#define SW0_GPIO_NAME CONFIG_GPIO_NRF5_P0_DEV_NAME
#define SW0_GPIO_NAME CONFIG_GPIO_P0_DEV_NAME
#define SW0_GPIO_PIN_PUD GPIO_PUD_PULL_UP
/* Push button switch 1 */
#define SW1_GPIO_PIN 18
#define SW1_GPIO_NAME CONFIG_GPIO_NRF5_P0_DEV_NAME
#define SW1_GPIO_NAME CONFIG_GPIO_P0_DEV_NAME
#define SW1_GPIO_PIN_PUD GPIO_PUD_PULL_UP
/* Push button switch 2 */
#define SW2_GPIO_PIN 19
#define SW2_GPIO_NAME CONFIG_GPIO_NRF5_P0_DEV_NAME
#define SW2_GPIO_NAME CONFIG_GPIO_P0_DEV_NAME
#define SW2_GPIO_PIN_PUD GPIO_PUD_PULL_UP
/* Push button switch 3 */
#define SW3_GPIO_PIN 20
#define SW3_GPIO_NAME CONFIG_GPIO_NRF5_P0_DEV_NAME
#define SW3_GPIO_NAME CONFIG_GPIO_P0_DEV_NAME
#define SW3_GPIO_PIN_PUD GPIO_PUD_PULL_UP
/* Onboard GREEN LED 0 */
#define LED0_GPIO_PIN 21
#define LED0_GPIO_PORT CONFIG_GPIO_NRF5_P0_DEV_NAME
#define LED0_GPIO_PORT CONFIG_GPIO_P0_DEV_NAME
/* Onboard GREEN LED 1 */
#define LED1_GPIO_PIN 22
#define LED1_GPIO_PORT CONFIG_GPIO_NRF5_P0_DEV_NAME
#define LED1_GPIO_PORT CONFIG_GPIO_P0_DEV_NAME
/* Onboard GREEN LED 2 */
#define LED2_GPIO_PIN 23
#define LED2_GPIO_PORT CONFIG_GPIO_NRF5_P0_DEV_NAME
#define LED2_GPIO_PORT CONFIG_GPIO_P0_DEV_NAME
/* Onboard GREEN LED 3 */
#define LED3_GPIO_PIN 24
#define LED3_GPIO_PORT CONFIG_GPIO_NRF5_P0_DEV_NAME
#define LED3_GPIO_PORT CONFIG_GPIO_P0_DEV_NAME
#endif /* __INC_BOARD_H */

4
boards/arm/nrf51_vbluno51/board.h
View file

@ -11,13 +11,13 @@
/* Button*/
#define BUT_GPIO_PIN 15
#define BUT_GPIO_NAME CONFIG_GPIO_NRF5_P0_DEV_NAME
#define BUT_GPIO_NAME CONFIG_GPIO_P0_DEV_NAME
#define SW0_GPIO_PIN BUT_GPIO_PIN
#define SW0_GPIO_NAME BUT_GPIO_NAME
/* Onboard GREEN LED 0 */
#define LED0_GPIO_PIN 7
#define LED0_GPIO_PORT CONFIG_GPIO_NRF5_P0_DEV_NAME
#define LED0_GPIO_PORT CONFIG_GPIO_P0_DEV_NAME
#define LED_GPIO_PIN LED0_GPIO_PIN
#define LED_GPIO_PORT LED0_GPIO_PORT

16
boards/arm/nrf52840_pca10056/board.h
View file

@ -11,38 +11,38 @@
/* Push button switch 0 */
#define SW0_GPIO_PIN 11
#define SW0_GPIO_NAME CONFIG_GPIO_NRF5_P0_DEV_NAME
#define SW0_GPIO_NAME CONFIG_GPIO_P0_DEV_NAME
#define SW0_GPIO_PIN_PUD GPIO_PUD_PULL_UP
/* Push button switch 1 */
#define SW1_GPIO_PIN 12
#define SW1_GPIO_NAME CONFIG_GPIO_NRF5_P0_DEV_NAME
#define SW1_GPIO_NAME CONFIG_GPIO_P0_DEV_NAME
#define SW1_GPIO_PIN_PUD GPIO_PUD_PULL_UP
/* Push button switch 2 */
#define SW2_GPIO_PIN 24
#define SW2_GPIO_NAME CONFIG_GPIO_NRF5_P0_DEV_NAME
#define SW2_GPIO_NAME CONFIG_GPIO_P0_DEV_NAME
#define SW2_GPIO_PIN_PUD GPIO_PUD_PULL_UP
/* Push button switch 3 */
#define SW3_GPIO_PIN 25
#define SW3_GPIO_NAME CONFIG_GPIO_NRF5_P0_DEV_NAME
#define SW3_GPIO_NAME CONFIG_GPIO_P0_DEV_NAME
#define SW3_GPIO_PIN_PUD GPIO_PUD_PULL_UP
/* Onboard GREEN LED 0 */
#define LED0_GPIO_PIN 13
#define LED0_GPIO_PORT CONFIG_GPIO_NRF5_P0_DEV_NAME
#define LED0_GPIO_PORT CONFIG_GPIO_P0_DEV_NAME
/* Onboard GREEN LED 1 */
#define LED1_GPIO_PIN 14
#define LED1_GPIO_PORT CONFIG_GPIO_NRF5_P0_DEV_NAME
#define LED1_GPIO_PORT CONFIG_GPIO_P0_DEV_NAME
/* Onboard GREEN LED 2 */
#define LED2_GPIO_PIN 15
#define LED2_GPIO_PORT CONFIG_GPIO_NRF5_P0_DEV_NAME
#define LED2_GPIO_PORT CONFIG_GPIO_P0_DEV_NAME
/* Onboard GREEN LED 3 */
#define LED3_GPIO_PIN 16
#define LED3_GPIO_PORT CONFIG_GPIO_NRF5_P0_DEV_NAME
#define LED3_GPIO_PORT CONFIG_GPIO_P0_DEV_NAME
#endif /* __INC_BOARD_H */

6
boards/arm/nrf52_adafruit_feather/board.h
View file

@ -11,16 +11,16 @@
/* Push button switch 0 */
#define SW0_GPIO_PIN 20
#define SW0_GPIO_NAME CONFIG_GPIO_NRF5_P0_DEV_NAME
#define SW0_GPIO_NAME CONFIG_GPIO_P0_DEV_NAME
#define SW0_GPIO_INT_CONF (GPIO_INT_EDGE | GPIO_INT_ACTIVE_LOW | GPIO_PUD_PULL_UP)
/* Onboard RED LED 0 */
#define LED0_GPIO_PIN 17
#define LED0_GPIO_PORT CONFIG_GPIO_NRF5_P0_DEV_NAME
#define LED0_GPIO_PORT CONFIG_GPIO_P0_DEV_NAME
/* Onboard BLUE LED 1 */
#define LED1_GPIO_PIN 19
#define LED1_GPIO_PORT CONFIG_GPIO_NRF5_P0_DEV_NAME
#define LED1_GPIO_PORT CONFIG_GPIO_P0_DEV_NAME
/* External edge connector pin mappings to nRF52 GPIO pin numbers.
* More information:

2
boards/arm/nrf52_blenano2/board.h
View file

@ -11,6 +11,6 @@
/* Onboard LED P0_11 */
#define LED0_GPIO_PIN 11
#define LED0_GPIO_PORT CONFIG_GPIO_NRF5_P0_DEV_NAME
#define LED0_GPIO_PORT CONFIG_GPIO_P0_DEV_NAME
#endif /* __INC_BOARD_H */

16
boards/arm/nrf52_pca10040/board.h
View file

@ -11,38 +11,38 @@
/* Push button switch 0 */
#define SW0_GPIO_PIN 13
#define SW0_GPIO_NAME CONFIG_GPIO_NRF5_P0_DEV_NAME
#define SW0_GPIO_NAME CONFIG_GPIO_P0_DEV_NAME
#define SW0_GPIO_PIN_PUD GPIO_PUD_PULL_UP
/* Push button switch 1 */
#define SW1_GPIO_PIN 14
#define SW1_GPIO_NAME CONFIG_GPIO_NRF5_P0_DEV_NAME
#define SW1_GPIO_NAME CONFIG_GPIO_P0_DEV_NAME
#define SW1_GPIO_PIN_PUD GPIO_PUD_PULL_UP
/* Push button switch 2 */
#define SW2_GPIO_PIN 15
#define SW2_GPIO_NAME CONFIG_GPIO_NRF5_P0_DEV_NAME
#define SW2_GPIO_NAME CONFIG_GPIO_P0_DEV_NAME
#define SW2_GPIO_PIN_PUD GPIO_PUD_PULL_UP
/* Push button switch 3 */
#define SW3_GPIO_PIN 16
#define SW3_GPIO_NAME CONFIG_GPIO_NRF5_P0_DEV_NAME
#define SW3_GPIO_NAME CONFIG_GPIO_P0_DEV_NAME
#define SW3_GPIO_PIN_PUD GPIO_PUD_PULL_UP
/* Onboard GREEN LED 0 */
#define LED0_GPIO_PIN 17
#define LED0_GPIO_PORT CONFIG_GPIO_NRF5_P0_DEV_NAME
#define LED0_GPIO_PORT CONFIG_GPIO_P0_DEV_NAME
/* Onboard GREEN LED 1 */
#define LED1_GPIO_PIN 18
#define LED1_GPIO_PORT CONFIG_GPIO_NRF5_P0_DEV_NAME
#define LED1_GPIO_PORT CONFIG_GPIO_P0_DEV_NAME
/* Onboard GREEN LED 2 */
#define LED2_GPIO_PIN 19
#define LED2_GPIO_PORT CONFIG_GPIO_NRF5_P0_DEV_NAME
#define LED2_GPIO_PORT CONFIG_GPIO_P0_DEV_NAME
/* Onboard GREEN LED 3 */
#define LED3_GPIO_PIN 20
#define LED3_GPIO_PORT CONFIG_GPIO_NRF5_P0_DEV_NAME
#define LED3_GPIO_PORT CONFIG_GPIO_P0_DEV_NAME
#endif /* __INC_BOARD_H */

2
boards/arm/nrf52_pca20020/Kconfig
View file

@ -12,7 +12,7 @@ config BOARD_VDD_PWR_CTRL_INIT_PRIORITY
depends on GPIO
help
Initialization priority for the VDD power rail. Has to be greater
than GPIO_NRF5_INIT_PRIORITY.
than GPIO_NRF_INIT_PRIORITY.
config BOARD_CCS_VDD_PWR_CTRL_INIT_PRIORITY
int "CCS_VDD power rail init priority"

7
boards/arm/nrf52_pca20020/board.c
View file

@ -44,12 +44,13 @@ static int pwr_ctrl_init(struct device *dev)
* constraits.
*/
#if CONFIG_BOARD_VDD_PWR_CTRL_INIT_PRIORITY <= CONFIG_GPIO_NRF5_INIT_PRIORITY
#error GPIO_NRF5_INIT_PRIORITY must be lower than BOARD_VDD_PWR_CTRL_INIT_PRIORITY
#if CONFIG_BOARD_VDD_PWR_CTRL_INIT_PRIORITY <= CONFIG_GPIO_NRF_INIT_PRIORITY
#error GPIO_NRF_INIT_PRIORITY must be lower than \
BOARD_VDD_PWR_CTRL_INIT_PRIORITY
#endif
static const struct pwr_ctrl_cfg vdd_pwr_ctrl_cfg = {
.port = CONFIG_GPIO_NRF5_P0_DEV_NAME,
.port = CONFIG_GPIO_P0_DEV_NAME,
.pin = VDD_PWR_CTRL_GPIO_PIN,
};

2
boards/arm/nrf52_pca20020/board.h
View file

@ -11,7 +11,7 @@
/* Push button switch 0 */
#define SW0_GPIO_PIN 11
#define SW0_GPIO_NAME CONFIG_GPIO_NRF5_P0_DEV_NAME
#define SW0_GPIO_NAME CONFIG_GPIO_P0_DEV_NAME
#define LIGHTWELL_PORT CONFIG_GPIO_SX1509B_DEV_NAME
#define LIGHTWELL_R_PIN 7

4
boards/arm/nrf52_sparkfun/board.h
View file

@ -12,10 +12,10 @@
/* Onboard LED P0_07 */
#define LED0_GPIO_PIN 7
#define LED0_GPIO_PORT CONFIG_GPIO_NRF5_P0_DEV_NAME
#define LED0_GPIO_PORT CONFIG_GPIO_P0_DEV_NAME
/* Onboard BUTTON P0_06 */
#define SW0_GPIO_PIN 6
#define SW0_GPIO_PORT CONFIG_GPIO_NRF5_P0_DEV_NAME
#define SW0_GPIO_PORT CONFIG_GPIO_P0_DEV_NAME
#endif /* __INC_BOARD_H */

4
boards/arm/nrf52_vbluno52/board.h
View file

@ -11,13 +11,13 @@
/* Button*/
#define BUT_GPIO_PIN 17
#define BUT_GPIO_NAME CONFIG_GPIO_NRF5_P0_DEV_NAME
#define BUT_GPIO_NAME CONFIG_GPIO_P0_DEV_NAME
#define SW0_GPIO_PIN BUT_GPIO_PIN
#define SW0_GPIO_NAME BUT_GPIO_NAME
/* Onboard GREEN LED 0 */
#define LED0_GPIO_PIN 12
#define LED0_GPIO_PORT CONFIG_GPIO_NRF5_P0_DEV_NAME
#define LED0_GPIO_PORT CONFIG_GPIO_P0_DEV_NAME
#define LED_GPIO_PIN LED0_GPIO_PIN
#define LED_GPIO_PORT LED0_GPIO_PORT

2
drivers/display/mb_display.c
View file

@ -386,7 +386,7 @@ static int mb_display_init(struct device *dev)
{
ARG_UNUSED(dev);
display.dev = device_get_binding(CONFIG_GPIO_NRF5_P0_DEV_NAME);
display.dev = device_get_binding(CONFIG_GPIO_P0_DEV_NAME);
__ASSERT(dev, "No GPIO device found");

6
drivers/gpio/gpio_nrfx.c
View file

@ -418,10 +418,10 @@ static int gpio_nrfx_init(struct device *port)
if (!gpio_initialized) {
gpio_initialized = true;
IRQ_CONNECT(CONFIG_GPIOTE_NRF5_IRQ, CONFIG_GPIOTE_NRF5_IRQ_PRI,
IRQ_CONNECT(CONFIG_GPIOTE_IRQ, CONFIG_GPIOTE_IRQ_PRI,
gpiote_event_handler, NULL, 0);
irq_enable(CONFIG_GPIOTE_NRF5_IRQ);
irq_enable(CONFIG_GPIOTE_IRQ);
nrf_gpiote_int_enable(NRF_GPIOTE_INT_PORT_MASK);
}
@ -441,7 +441,7 @@ static int gpio_nrfx_init(struct device *port)
static struct gpio_nrfx_data gpio_nrfx_p##id##_data; \
\
DEVICE_AND_API_INIT(gpio_nrfx_p##id, \
CONFIG_GPIO_NRF5_P##id##_DEV_NAME, \
CONFIG_GPIO_P##id##_DEV_NAME, \
gpio_nrfx_init, \
&gpio_nrfx_p##id##_data, \
&gpio_nrfx_p##id##_cfg, \

2
drivers/modem/Kconfig
View file

@ -45,7 +45,7 @@ config MODEM_WNCM14A2A
select MODEM_RECEIVER
select NET_OFFLOAD
select UART_MCUX_2 if BOARD_FRDM_K64F
select GPIO_NRF5_P1 if SOC_NRF52840
select GPIO_NRF_P1 if SOC_NRF52840
select UART_1_NRF_UARTE if SOC_NRF52840
select UART_1_NRF_FLOW_CONTROL if SOC_NRF52840
help

4
dts/arm/nordic/nrf51822.dtsi
View file

@ -47,7 +47,7 @@
};
gpiote: gpiote@40006000 {
compatible = "nordic,nrf5-gpiote";
compatible = "nordic,nrf-gpiote";
reg = <0x40006000 0x1000>;
interrupts = <6 1>;
interrupt-names = "gpiote";
@ -56,7 +56,7 @@
};
gpio0: gpio@50000000 {
compatible = "nordic,nrf5-gpio";
compatible = "nordic,nrf-gpio";
gpio-controller;
reg = <0x50000000 0x800>;
#gpio-cells = <2>;

4
dts/arm/nordic/nrf52810.dtsi
View file

@ -48,7 +48,7 @@
};
gpiote: gpiote@40006000 {
compatible = "nordic,nrf5-gpiote";
compatible = "nordic,nrf-gpiote";
reg = <0x40006000 0x1000>;
interrupts = <6 5>;
interrupt-names = "gpiote";
@ -57,7 +57,7 @@
};
gpio0: gpio@50000000 {
compatible = "nordic,nrf5-gpio";
compatible = "nordic,nrf-gpio";
gpio-controller;
reg = <0x50000000 0x200
0x50000500 0x300>;

4
dts/arm/nordic/nrf52832.dtsi
View file

@ -48,7 +48,7 @@
};
gpiote: gpiote@40006000 {
compatible = "nordic,nrf5-gpiote";
compatible = "nordic,nrf-gpiote";
reg = <0x40006000 0x1000>;
interrupts = <6 5>;
interrupt-names = "gpiote";
@ -57,7 +57,7 @@
};
gpio0: gpio@50000000 {
compatible = "nordic,nrf5-gpio";
compatible = "nordic,nrf-gpio";
gpio-controller;
reg = <0x50000000 0x200
0x50000500 0x300>;

6
dts/arm/nordic/nrf52840.dtsi
View file

@ -58,7 +58,7 @@
};
gpiote: gpiote@40006000 {
compatible = "nordic,nrf5-gpiote";
compatible = "nordic,nrf-gpiote";
reg = <0x40006000 0x1000>;
interrupts = <6 5>;
interrupt-names = "gpiote";
@ -67,7 +67,7 @@
};
gpio0: gpio@50000000 {
compatible = "nordic,nrf5-gpio";
compatible = "nordic,nrf-gpio";
gpio-controller;
reg = <0x50000000 0x200
0x50000500 0x300>;
@ -77,7 +77,7 @@
};
gpio1: gpio@50000300 {
compatible = "nordic,nrf5-gpio";
compatible = "nordic,nrf-gpio";
gpio-controller;
reg = <0x50000300 0x200
0x50000800 0x300>;

8
dts/bindings/gpio/nordic,nrf5-gpio.yaml → dts/bindings/gpio/nordic,nrf-gpio.yaml
View file

@ -4,19 +4,19 @@
# SPDX-License-Identifier: Apache-2.0
#
---
title: NRF5 GPIO
id: nordic,nrf5-gpio
title: nRF GPIO
id: nordic,nrf-gpio
version: 0.1
description: >
This is a representation of the NRF5 GPIO nodes
This is a representation of the nRF GPIO nodes
properties:
compatible:
type: string
category: required
description: compatible strings
constraint: "nordic,nrf5-gpio"
constraint: "nordic,nrf-gpio"
reg:
type: int

8
dts/bindings/gpio/nordic,nrf5-gpiote.yaml → dts/bindings/gpio/nordic,nrf-gpiote.yaml
View file

@ -4,19 +4,19 @@
# SPDX-License-Identifier: Apache-2.0
#
---
title: NRF5 GPIOTE
id: nordic,nrf5-gpiote
title: nRF GPIOTE
id: nordic,nrf-gpiote
version: 0.1
description: >
This is a representation of the NRF5 GPIOTE node
This is a representation of the nRF GPIOTE node
properties:
compatible:
type: string
category: required
description: compatible strings
constraint: "nordic,nrf5-gpiote"
constraint: "nordic,nrf-gpiote"
reg:
type: int

16
samples/application_development/out_of_tree_board/boards/arm/nrf52840_pca10056/board.h
View file

@ -11,34 +11,34 @@
/* Push button switch 0 */
#define SW0_GPIO_PIN 11
#define SW0_GPIO_NAME CONFIG_GPIO_NRF5_P0_DEV_NAME
#define SW0_GPIO_NAME CONFIG_GPIO_P0_DEV_NAME
/* Push button switch 1 */
#define SW1_GPIO_PIN 12
#define SW1_GPIO_NAME CONFIG_GPIO_NRF5_P0_DEV_NAME
#define SW1_GPIO_NAME CONFIG_GPIO_P0_DEV_NAME
/* Push button switch 2 */
#define SW2_GPIO_PIN 24
#define SW2_GPIO_NAME CONFIG_GPIO_NRF5_P0_DEV_NAME
#define SW2_GPIO_NAME CONFIG_GPIO_P0_DEV_NAME
/* Push button switch 3 */
#define SW3_GPIO_PIN 25
#define SW3_GPIO_NAME CONFIG_GPIO_NRF5_P0_DEV_NAME
#define SW3_GPIO_NAME CONFIG_GPIO_P0_DEV_NAME
/* Onboard GREEN LED 0 */
#define LED0_GPIO_PIN 13
#define LED0_GPIO_PORT CONFIG_GPIO_NRF5_P0_DEV_NAME
#define LED0_GPIO_PORT CONFIG_GPIO_P0_DEV_NAME
/* Onboard GREEN LED 1 */
#define LED1_GPIO_PIN 14
#define LED1_GPIO_PORT CONFIG_GPIO_NRF5_P0_DEV_NAME
#define LED1_GPIO_PORT CONFIG_GPIO_P0_DEV_NAME
/* Onboard GREEN LED 2 */
#define LED2_GPIO_PIN 15
#define LED2_GPIO_PORT CONFIG_GPIO_NRF5_P0_DEV_NAME
#define LED2_GPIO_PORT CONFIG_GPIO_P0_DEV_NAME
/* Onboard GREEN LED 3 */
#define LED3_GPIO_PIN 16
#define LED3_GPIO_PORT CONFIG_GPIO_NRF5_P0_DEV_NAME
#define LED3_GPIO_PORT CONFIG_GPIO_P0_DEV_NAME
#endif /* __INC_BOARD_H */

6
tests/drivers/gpio/gpio_basic_api/src/test_gpio.h
View file

@ -41,15 +41,15 @@
#define PIN_OUT 20 /* PA20 / pin 6 */
#define PIN_IN 15 /* PA15 / pin 5 */
#elif defined(CONFIG_BOARD_NRF52840_PCA10056)
#define DEV_NAME CONFIG_GPIO_NRF5_P1_DEV_NAME
#define DEV_NAME CONFIG_GPIO_P1_DEV_NAME
#define PIN_OUT 1 /* P1.01 */
#define PIN_IN 2 /* P1.02 */
#elif defined(CONFIG_BOARD_NRF52_PCA10040)
#define DEV_NAME CONFIG_GPIO_NRF5_P0_DEV_NAME
#define DEV_NAME CONFIG_GPIO_P0_DEV_NAME
#define PIN_OUT 11 /* P0.11 */
#define PIN_IN 12 /* P0.12 */
#elif defined(CONFIG_BOARD_NRF51_PCA10028)
#define DEV_NAME CONFIG_GPIO_NRF5_P0_DEV_NAME
#define DEV_NAME CONFIG_GPIO_P0_DEV_NAME
#define PIN_OUT 12 /* P0.12 */
#define PIN_IN 13 /* P0.13 */
#else