dts: nrf5: Changed GPIO and GPIOTE define names

Changed names using nrf5 to nrf for consistency with other drivers.

Signed-off-by: Mieszko Mierunski <mieszko.mierunski@nordicsemi.no>
This commit is contained in:
Mieszko Mierunski 2018-07-18 13:05:13 +02:00 committed by Anas Nashif
commit 4f6aac1a67
28 changed files with 107 additions and 104 deletions

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@ -9,9 +9,9 @@
#define FLASH_DEV_NAME NRF_NRF51_FLASH_CONTROLLER_4001E000_LABEL #define FLASH_DEV_NAME NRF_NRF51_FLASH_CONTROLLER_4001E000_LABEL
#define CONFIG_GPIO_NRF5_P0_DEV_NAME NORDIC_NRF5_GPIO_50000000_LABEL #define CONFIG_GPIO_P0_DEV_NAME NORDIC_NRF_GPIO_50000000_LABEL
#define CONFIG_GPIOTE_NRF5_IRQ_PRI NORDIC_NRF5_GPIOTE_40006000_IRQ_0_PRIORITY #define CONFIG_GPIOTE_IRQ_PRI NORDIC_NRF_GPIOTE_40006000_IRQ_0_PRIORITY
#define CONFIG_GPIOTE_NRF5_IRQ NORDIC_NRF5_GPIOTE_40006000_IRQ_0 #define CONFIG_GPIOTE_IRQ NORDIC_NRF_GPIOTE_40006000_IRQ_0
#define CONFIG_I2C_0_BASE_ADDR NORDIC_NRF5_I2C_40003000_BASE_ADDRESS #define CONFIG_I2C_0_BASE_ADDR NORDIC_NRF5_I2C_40003000_BASE_ADDRESS
#define CONFIG_I2C_0_NAME NORDIC_NRF5_I2C_40003000_LABEL #define CONFIG_I2C_0_NAME NORDIC_NRF5_I2C_40003000_LABEL

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@ -23,10 +23,12 @@
#define FLASH_DEV_NAME NRF_NRF52_FLASH_CONTROLLER_4001E000_LABEL #define FLASH_DEV_NAME NRF_NRF52_FLASH_CONTROLLER_4001E000_LABEL
#define CONFIG_GPIO_NRF5_P0_DEV_NAME NORDIC_NRF5_GPIO_50000000_LABEL #define CONFIG_GPIO_P0_DEV_NAME NORDIC_NRF_GPIO_50000000_LABEL
#define CONFIG_GPIO_NRF5_P1_DEV_NAME NORDIC_NRF5_GPIO_50000300_LABEL #if CONFIG_HAS_HW_NRF_GPIO1
#define CONFIG_GPIOTE_NRF5_IRQ_PRI NORDIC_NRF5_GPIOTE_40006000_IRQ_0_PRIORITY #define CONFIG_GPIO_P1_DEV_NAME NORDIC_NRF_GPIO_50000300_LABEL
#define CONFIG_GPIOTE_NRF5_IRQ NORDIC_NRF5_GPIOTE_40006000_IRQ_0 #endif
#define CONFIG_GPIOTE_IRQ_PRI NORDIC_NRF_GPIOTE_40006000_IRQ_0_PRIORITY
#define CONFIG_GPIOTE_IRQ NORDIC_NRF_GPIOTE_40006000_IRQ_0
#define CONFIG_I2C_0_BASE_ADDR NORDIC_NRF5_I2C_40003000_BASE_ADDRESS #define CONFIG_I2C_0_BASE_ADDR NORDIC_NRF5_I2C_40003000_BASE_ADDRESS
#define CONFIG_I2C_0_NAME NORDIC_NRF5_I2C_40003000_LABEL #define CONFIG_I2C_0_NAME NORDIC_NRF5_I2C_40003000_LABEL

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@ -11,15 +11,15 @@
/* Onboard USR1 GREEN LED */ /* Onboard USR1 GREEN LED */
#define USR1_GPIO_PIN 29 #define USR1_GPIO_PIN 29
#define USR1_GPIO_PORT CONFIG_GPIO_NRF5_P0_DEV_NAME #define USR1_GPIO_PORT CONFIG_GPIO_P0_DEV_NAME
/* Onboard BT BLUE LED */ /* Onboard BT BLUE LED */
#define BT_GPIO_PIN 28 #define BT_GPIO_PIN 28
#define BT_GPIO_PORT CONFIG_GPIO_NRF5_P0_DEV_NAME #define BT_GPIO_PORT CONFIG_GPIO_P0_DEV_NAME
/* USER push button */ /* USER push button */
#define USER_PB_GPIO_PIN 27 #define USER_PB_GPIO_PIN 27
#define USER_PB_GPIO_PORT CONFIG_GPIO_NRF5_P0_DEV_NAME #define USER_PB_GPIO_PORT CONFIG_GPIO_P0_DEV_NAME
/* Aliases to make the basic samples (e.g. LED, button) work */ /* Aliases to make the basic samples (e.g. LED, button) work */
#define LED0_GPIO_PIN USR1_GPIO_PIN #define LED0_GPIO_PIN USR1_GPIO_PIN

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@ -11,59 +11,59 @@
/* Push button switch 0 (BTN_A) */ /* Push button switch 0 (BTN_A) */
#define SW0_GPIO_PIN 17 #define SW0_GPIO_PIN 17
#define SW0_GPIO_NAME CONFIG_GPIO_NRF5_P0_DEV_NAME #define SW0_GPIO_NAME CONFIG_GPIO_P0_DEV_NAME
/* Push button switch 1 (BTN_B) */ /* Push button switch 1 (BTN_B) */
#define SW1_GPIO_PIN 26 #define SW1_GPIO_PIN 26
#define SW1_GPIO_NAME CONFIG_GPIO_NRF5_P0_DEV_NAME #define SW1_GPIO_NAME CONFIG_GPIO_P0_DEV_NAME
/* Onboard LED Row 1 */ /* Onboard LED Row 1 */
#define LED_ROW1_GPIO_PIN 13 #define LED_ROW1_GPIO_PIN 13
#define LED_ROW1_GPIO_PORT CONFIG_GPIO_NRF5_P0_DEV_NAME #define LED_ROW1_GPIO_PORT CONFIG_GPIO_P0_DEV_NAME
/* Onboard LED Row 2 */ /* Onboard LED Row 2 */
#define LED_ROW2_GPIO_PIN 14 #define LED_ROW2_GPIO_PIN 14
#define LED_ROW2_GPIO_PORT CONFIG_GPIO_NRF5_P0_DEV_NAME #define LED_ROW2_GPIO_PORT CONFIG_GPIO_P0_DEV_NAME
/* Onboard LED Row 3 */ /* Onboard LED Row 3 */
#define LED_ROW3_GPIO_PIN 15 #define LED_ROW3_GPIO_PIN 15
#define LED_ROW3_GPIO_PORT CONFIG_GPIO_NRF5_P0_DEV_NAME #define LED_ROW3_GPIO_PORT CONFIG_GPIO_P0_DEV_NAME
/* Onboard LED Column 1 */ /* Onboard LED Column 1 */
#define LED_COL1_GPIO_PIN 4 #define LED_COL1_GPIO_PIN 4
#define LED_COL1_GPIO_PORT CONFIG_GPIO_NRF5_P0_DEV_NAME #define LED_COL1_GPIO_PORT CONFIG_GPIO_P0_DEV_NAME
/* Onboard LED Column 2 */ /* Onboard LED Column 2 */
#define LED_COL2_GPIO_PIN 5 #define LED_COL2_GPIO_PIN 5
#define LED_COL2_GPIO_PORT CONFIG_GPIO_NRF5_P0_DEV_NAME #define LED_COL2_GPIO_PORT CONFIG_GPIO_P0_DEV_NAME
/* Onboard LED Column 3 */ /* Onboard LED Column 3 */
#define LED_COL3_GPIO_PIN 6 #define LED_COL3_GPIO_PIN 6
#define LED_COL3_GPIO_PORT CONFIG_GPIO_NRF5_P0_DEV_NAME #define LED_COL3_GPIO_PORT CONFIG_GPIO_P0_DEV_NAME
/* Onboard LED Column 4 */ /* Onboard LED Column 4 */
#define LED_COL4_GPIO_PIN 7 #define LED_COL4_GPIO_PIN 7
#define LED_COL4_GPIO_PORT CONFIG_GPIO_NRF5_P0_DEV_NAME #define LED_COL4_GPIO_PORT CONFIG_GPIO_P0_DEV_NAME
/* Onboard LED Column 5 */ /* Onboard LED Column 5 */
#define LED_COL5_GPIO_PIN 8 #define LED_COL5_GPIO_PIN 8
#define LED_COL5_GPIO_PORT CONFIG_GPIO_NRF5_P0_DEV_NAME #define LED_COL5_GPIO_PORT CONFIG_GPIO_P0_DEV_NAME
/* Onboard LED Column 6 */ /* Onboard LED Column 6 */
#define LED_COL6_GPIO_PIN 9 #define LED_COL6_GPIO_PIN 9
#define LED_COL6_GPIO_PORT CONFIG_GPIO_NRF5_P0_DEV_NAME #define LED_COL6_GPIO_PORT CONFIG_GPIO_P0_DEV_NAME
/* Onboard LED Column 7 */ /* Onboard LED Column 7 */
#define LED_COL7_GPIO_PIN 10 #define LED_COL7_GPIO_PIN 10
#define LED_COL7_GPIO_PORT CONFIG_GPIO_NRF5_P0_DEV_NAME #define LED_COL7_GPIO_PORT CONFIG_GPIO_P0_DEV_NAME
/* Onboard LED Column 8 */ /* Onboard LED Column 8 */
#define LED_COL8_GPIO_PIN 11 #define LED_COL8_GPIO_PIN 11
#define LED_COL8_GPIO_PORT CONFIG_GPIO_NRF5_P0_DEV_NAME #define LED_COL8_GPIO_PORT CONFIG_GPIO_P0_DEV_NAME
/* Onboard LED Column 9 */ /* Onboard LED Column 9 */
#define LED_COL9_GPIO_PIN 12 #define LED_COL9_GPIO_PIN 12
#define LED_COL9_GPIO_PORT CONFIG_GPIO_NRF5_P0_DEV_NAME #define LED_COL9_GPIO_PORT CONFIG_GPIO_P0_DEV_NAME
/* External edge connector pin mappings to nRF51 GPIO pin numbers. /* External edge connector pin mappings to nRF51 GPIO pin numbers.
* More information: * More information:

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@ -11,32 +11,32 @@
/* Push button switch 0 KEY1 */ /* Push button switch 0 KEY1 */
#define SW0_GPIO_PIN 16 #define SW0_GPIO_PIN 16
#define SW0_GPIO_NAME CONFIG_GPIO_NRF5_P0_DEV_NAME #define SW0_GPIO_NAME CONFIG_GPIO_P0_DEV_NAME
#define SW0_GPIO_PIN_PUD GPIO_PUD_PULL_UP #define SW0_GPIO_PIN_PUD GPIO_PUD_PULL_UP
/* Push button switch 1 KEY2 */ /* Push button switch 1 KEY2 */
#define SW1_GPIO_PIN 17 #define SW1_GPIO_PIN 17
#define SW1_GPIO_NAME CONFIG_GPIO_NRF5_P0_DEV_NAME #define SW1_GPIO_NAME CONFIG_GPIO_P0_DEV_NAME
#define SW1_GPIO_PIN_PUD GPIO_PUD_PULL_UP #define SW1_GPIO_PIN_PUD GPIO_PUD_PULL_UP
/* Onboard RED LED 0 */ /* Onboard RED LED 0 */
#define LED0_GPIO_PIN 18 #define LED0_GPIO_PIN 18
#define LED0_GPIO_PORT CONFIG_GPIO_NRF5_P0_DEV_NAME #define LED0_GPIO_PORT CONFIG_GPIO_P0_DEV_NAME
/* Onboard RED LED 1 */ /* Onboard RED LED 1 */
#define LED1_GPIO_PIN 19 #define LED1_GPIO_PIN 19
#define LED1_GPIO_PORT CONFIG_GPIO_NRF5_P0_DEV_NAME #define LED1_GPIO_PORT CONFIG_GPIO_P0_DEV_NAME
/* Onboard RED LED 2 */ /* Onboard RED LED 2 */
#define LED2_GPIO_PIN 20 #define LED2_GPIO_PIN 20
#define LED2_GPIO_PORT CONFIG_GPIO_NRF5_P0_DEV_NAME #define LED2_GPIO_PORT CONFIG_GPIO_P0_DEV_NAME
/* Onboard RED LED 3 */ /* Onboard RED LED 3 */
#define LED3_GPIO_PIN 21 #define LED3_GPIO_PIN 21
#define LED3_GPIO_PORT CONFIG_GPIO_NRF5_P0_DEV_NAME #define LED3_GPIO_PORT CONFIG_GPIO_P0_DEV_NAME
/* Onboard RED LED 4 */ /* Onboard RED LED 4 */
#define LED4_GPIO_PIN 22 #define LED4_GPIO_PIN 22
#define LED4_GPIO_PORT CONFIG_GPIO_NRF5_P0_DEV_NAME #define LED4_GPIO_PORT CONFIG_GPIO_P0_DEV_NAME
#endif /* __INC_BOARD_H */ #endif /* __INC_BOARD_H */

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@ -11,6 +11,6 @@
/* Onboard LED P0_19 */ /* Onboard LED P0_19 */
#define LED0_GPIO_PIN 19 #define LED0_GPIO_PIN 19
#define LED0_GPIO_PORT CONFIG_GPIO_NRF5_P0_DEV_NAME #define LED0_GPIO_PORT CONFIG_GPIO_P0_DEV_NAME
#endif /* __INC_BOARD_H */ #endif /* __INC_BOARD_H */

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@ -12,38 +12,38 @@
/* Push button switch 0 */ /* Push button switch 0 */
#define SW0_GPIO_PIN 17 #define SW0_GPIO_PIN 17
#define SW0_GPIO_NAME CONFIG_GPIO_NRF5_P0_DEV_NAME #define SW0_GPIO_NAME CONFIG_GPIO_P0_DEV_NAME
#define SW0_GPIO_PIN_PUD GPIO_PUD_PULL_UP #define SW0_GPIO_PIN_PUD GPIO_PUD_PULL_UP
/* Push button switch 1 */ /* Push button switch 1 */
#define SW1_GPIO_PIN 18 #define SW1_GPIO_PIN 18
#define SW1_GPIO_NAME CONFIG_GPIO_NRF5_P0_DEV_NAME #define SW1_GPIO_NAME CONFIG_GPIO_P0_DEV_NAME
#define SW1_GPIO_PIN_PUD GPIO_PUD_PULL_UP #define SW1_GPIO_PIN_PUD GPIO_PUD_PULL_UP
/* Push button switch 2 */ /* Push button switch 2 */
#define SW2_GPIO_PIN 19 #define SW2_GPIO_PIN 19
#define SW2_GPIO_NAME CONFIG_GPIO_NRF5_P0_DEV_NAME #define SW2_GPIO_NAME CONFIG_GPIO_P0_DEV_NAME
#define SW2_GPIO_PIN_PUD GPIO_PUD_PULL_UP #define SW2_GPIO_PIN_PUD GPIO_PUD_PULL_UP
/* Push button switch 3 */ /* Push button switch 3 */
#define SW3_GPIO_PIN 20 #define SW3_GPIO_PIN 20
#define SW3_GPIO_NAME CONFIG_GPIO_NRF5_P0_DEV_NAME #define SW3_GPIO_NAME CONFIG_GPIO_P0_DEV_NAME
#define SW3_GPIO_PIN_PUD GPIO_PUD_PULL_UP #define SW3_GPIO_PIN_PUD GPIO_PUD_PULL_UP
/* Onboard GREEN LED 0 */ /* Onboard GREEN LED 0 */
#define LED0_GPIO_PIN 21 #define LED0_GPIO_PIN 21
#define LED0_GPIO_PORT CONFIG_GPIO_NRF5_P0_DEV_NAME #define LED0_GPIO_PORT CONFIG_GPIO_P0_DEV_NAME
/* Onboard GREEN LED 1 */ /* Onboard GREEN LED 1 */
#define LED1_GPIO_PIN 22 #define LED1_GPIO_PIN 22
#define LED1_GPIO_PORT CONFIG_GPIO_NRF5_P0_DEV_NAME #define LED1_GPIO_PORT CONFIG_GPIO_P0_DEV_NAME
/* Onboard GREEN LED 2 */ /* Onboard GREEN LED 2 */
#define LED2_GPIO_PIN 23 #define LED2_GPIO_PIN 23
#define LED2_GPIO_PORT CONFIG_GPIO_NRF5_P0_DEV_NAME #define LED2_GPIO_PORT CONFIG_GPIO_P0_DEV_NAME
/* Onboard GREEN LED 3 */ /* Onboard GREEN LED 3 */
#define LED3_GPIO_PIN 24 #define LED3_GPIO_PIN 24
#define LED3_GPIO_PORT CONFIG_GPIO_NRF5_P0_DEV_NAME #define LED3_GPIO_PORT CONFIG_GPIO_P0_DEV_NAME
#endif /* __INC_BOARD_H */ #endif /* __INC_BOARD_H */

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@ -11,13 +11,13 @@
/* Button*/ /* Button*/
#define BUT_GPIO_PIN 15 #define BUT_GPIO_PIN 15
#define BUT_GPIO_NAME CONFIG_GPIO_NRF5_P0_DEV_NAME #define BUT_GPIO_NAME CONFIG_GPIO_P0_DEV_NAME
#define SW0_GPIO_PIN BUT_GPIO_PIN #define SW0_GPIO_PIN BUT_GPIO_PIN
#define SW0_GPIO_NAME BUT_GPIO_NAME #define SW0_GPIO_NAME BUT_GPIO_NAME
/* Onboard GREEN LED 0 */ /* Onboard GREEN LED 0 */
#define LED0_GPIO_PIN 7 #define LED0_GPIO_PIN 7
#define LED0_GPIO_PORT CONFIG_GPIO_NRF5_P0_DEV_NAME #define LED0_GPIO_PORT CONFIG_GPIO_P0_DEV_NAME
#define LED_GPIO_PIN LED0_GPIO_PIN #define LED_GPIO_PIN LED0_GPIO_PIN
#define LED_GPIO_PORT LED0_GPIO_PORT #define LED_GPIO_PORT LED0_GPIO_PORT

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@ -11,38 +11,38 @@
/* Push button switch 0 */ /* Push button switch 0 */
#define SW0_GPIO_PIN 11 #define SW0_GPIO_PIN 11
#define SW0_GPIO_NAME CONFIG_GPIO_NRF5_P0_DEV_NAME #define SW0_GPIO_NAME CONFIG_GPIO_P0_DEV_NAME
#define SW0_GPIO_PIN_PUD GPIO_PUD_PULL_UP #define SW0_GPIO_PIN_PUD GPIO_PUD_PULL_UP
/* Push button switch 1 */ /* Push button switch 1 */
#define SW1_GPIO_PIN 12 #define SW1_GPIO_PIN 12
#define SW1_GPIO_NAME CONFIG_GPIO_NRF5_P0_DEV_NAME #define SW1_GPIO_NAME CONFIG_GPIO_P0_DEV_NAME
#define SW1_GPIO_PIN_PUD GPIO_PUD_PULL_UP #define SW1_GPIO_PIN_PUD GPIO_PUD_PULL_UP
/* Push button switch 2 */ /* Push button switch 2 */
#define SW2_GPIO_PIN 24 #define SW2_GPIO_PIN 24
#define SW2_GPIO_NAME CONFIG_GPIO_NRF5_P0_DEV_NAME #define SW2_GPIO_NAME CONFIG_GPIO_P0_DEV_NAME
#define SW2_GPIO_PIN_PUD GPIO_PUD_PULL_UP #define SW2_GPIO_PIN_PUD GPIO_PUD_PULL_UP
/* Push button switch 3 */ /* Push button switch 3 */
#define SW3_GPIO_PIN 25 #define SW3_GPIO_PIN 25
#define SW3_GPIO_NAME CONFIG_GPIO_NRF5_P0_DEV_NAME #define SW3_GPIO_NAME CONFIG_GPIO_P0_DEV_NAME
#define SW3_GPIO_PIN_PUD GPIO_PUD_PULL_UP #define SW3_GPIO_PIN_PUD GPIO_PUD_PULL_UP
/* Onboard GREEN LED 0 */ /* Onboard GREEN LED 0 */
#define LED0_GPIO_PIN 13 #define LED0_GPIO_PIN 13
#define LED0_GPIO_PORT CONFIG_GPIO_NRF5_P0_DEV_NAME #define LED0_GPIO_PORT CONFIG_GPIO_P0_DEV_NAME
/* Onboard GREEN LED 1 */ /* Onboard GREEN LED 1 */
#define LED1_GPIO_PIN 14 #define LED1_GPIO_PIN 14
#define LED1_GPIO_PORT CONFIG_GPIO_NRF5_P0_DEV_NAME #define LED1_GPIO_PORT CONFIG_GPIO_P0_DEV_NAME
/* Onboard GREEN LED 2 */ /* Onboard GREEN LED 2 */
#define LED2_GPIO_PIN 15 #define LED2_GPIO_PIN 15
#define LED2_GPIO_PORT CONFIG_GPIO_NRF5_P0_DEV_NAME #define LED2_GPIO_PORT CONFIG_GPIO_P0_DEV_NAME
/* Onboard GREEN LED 3 */ /* Onboard GREEN LED 3 */
#define LED3_GPIO_PIN 16 #define LED3_GPIO_PIN 16
#define LED3_GPIO_PORT CONFIG_GPIO_NRF5_P0_DEV_NAME #define LED3_GPIO_PORT CONFIG_GPIO_P0_DEV_NAME
#endif /* __INC_BOARD_H */ #endif /* __INC_BOARD_H */

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@ -11,16 +11,16 @@
/* Push button switch 0 */ /* Push button switch 0 */
#define SW0_GPIO_PIN 20 #define SW0_GPIO_PIN 20
#define SW0_GPIO_NAME CONFIG_GPIO_NRF5_P0_DEV_NAME #define SW0_GPIO_NAME CONFIG_GPIO_P0_DEV_NAME
#define SW0_GPIO_INT_CONF (GPIO_INT_EDGE | GPIO_INT_ACTIVE_LOW | GPIO_PUD_PULL_UP) #define SW0_GPIO_INT_CONF (GPIO_INT_EDGE | GPIO_INT_ACTIVE_LOW | GPIO_PUD_PULL_UP)
/* Onboard RED LED 0 */ /* Onboard RED LED 0 */
#define LED0_GPIO_PIN 17 #define LED0_GPIO_PIN 17
#define LED0_GPIO_PORT CONFIG_GPIO_NRF5_P0_DEV_NAME #define LED0_GPIO_PORT CONFIG_GPIO_P0_DEV_NAME
/* Onboard BLUE LED 1 */ /* Onboard BLUE LED 1 */
#define LED1_GPIO_PIN 19 #define LED1_GPIO_PIN 19
#define LED1_GPIO_PORT CONFIG_GPIO_NRF5_P0_DEV_NAME #define LED1_GPIO_PORT CONFIG_GPIO_P0_DEV_NAME
/* External edge connector pin mappings to nRF52 GPIO pin numbers. /* External edge connector pin mappings to nRF52 GPIO pin numbers.
* More information: * More information:

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@ -11,6 +11,6 @@
/* Onboard LED P0_11 */ /* Onboard LED P0_11 */
#define LED0_GPIO_PIN 11 #define LED0_GPIO_PIN 11
#define LED0_GPIO_PORT CONFIG_GPIO_NRF5_P0_DEV_NAME #define LED0_GPIO_PORT CONFIG_GPIO_P0_DEV_NAME
#endif /* __INC_BOARD_H */ #endif /* __INC_BOARD_H */

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@ -11,38 +11,38 @@
/* Push button switch 0 */ /* Push button switch 0 */
#define SW0_GPIO_PIN 13 #define SW0_GPIO_PIN 13
#define SW0_GPIO_NAME CONFIG_GPIO_NRF5_P0_DEV_NAME #define SW0_GPIO_NAME CONFIG_GPIO_P0_DEV_NAME
#define SW0_GPIO_PIN_PUD GPIO_PUD_PULL_UP #define SW0_GPIO_PIN_PUD GPIO_PUD_PULL_UP
/* Push button switch 1 */ /* Push button switch 1 */
#define SW1_GPIO_PIN 14 #define SW1_GPIO_PIN 14
#define SW1_GPIO_NAME CONFIG_GPIO_NRF5_P0_DEV_NAME #define SW1_GPIO_NAME CONFIG_GPIO_P0_DEV_NAME
#define SW1_GPIO_PIN_PUD GPIO_PUD_PULL_UP #define SW1_GPIO_PIN_PUD GPIO_PUD_PULL_UP
/* Push button switch 2 */ /* Push button switch 2 */
#define SW2_GPIO_PIN 15 #define SW2_GPIO_PIN 15
#define SW2_GPIO_NAME CONFIG_GPIO_NRF5_P0_DEV_NAME #define SW2_GPIO_NAME CONFIG_GPIO_P0_DEV_NAME
#define SW2_GPIO_PIN_PUD GPIO_PUD_PULL_UP #define SW2_GPIO_PIN_PUD GPIO_PUD_PULL_UP
/* Push button switch 3 */ /* Push button switch 3 */
#define SW3_GPIO_PIN 16 #define SW3_GPIO_PIN 16
#define SW3_GPIO_NAME CONFIG_GPIO_NRF5_P0_DEV_NAME #define SW3_GPIO_NAME CONFIG_GPIO_P0_DEV_NAME
#define SW3_GPIO_PIN_PUD GPIO_PUD_PULL_UP #define SW3_GPIO_PIN_PUD GPIO_PUD_PULL_UP
/* Onboard GREEN LED 0 */ /* Onboard GREEN LED 0 */
#define LED0_GPIO_PIN 17 #define LED0_GPIO_PIN 17
#define LED0_GPIO_PORT CONFIG_GPIO_NRF5_P0_DEV_NAME #define LED0_GPIO_PORT CONFIG_GPIO_P0_DEV_NAME
/* Onboard GREEN LED 1 */ /* Onboard GREEN LED 1 */
#define LED1_GPIO_PIN 18 #define LED1_GPIO_PIN 18
#define LED1_GPIO_PORT CONFIG_GPIO_NRF5_P0_DEV_NAME #define LED1_GPIO_PORT CONFIG_GPIO_P0_DEV_NAME
/* Onboard GREEN LED 2 */ /* Onboard GREEN LED 2 */
#define LED2_GPIO_PIN 19 #define LED2_GPIO_PIN 19
#define LED2_GPIO_PORT CONFIG_GPIO_NRF5_P0_DEV_NAME #define LED2_GPIO_PORT CONFIG_GPIO_P0_DEV_NAME
/* Onboard GREEN LED 3 */ /* Onboard GREEN LED 3 */
#define LED3_GPIO_PIN 20 #define LED3_GPIO_PIN 20
#define LED3_GPIO_PORT CONFIG_GPIO_NRF5_P0_DEV_NAME #define LED3_GPIO_PORT CONFIG_GPIO_P0_DEV_NAME
#endif /* __INC_BOARD_H */ #endif /* __INC_BOARD_H */

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@ -12,7 +12,7 @@ config BOARD_VDD_PWR_CTRL_INIT_PRIORITY
depends on GPIO depends on GPIO
help help
Initialization priority for the VDD power rail. Has to be greater Initialization priority for the VDD power rail. Has to be greater
than GPIO_NRF5_INIT_PRIORITY. than GPIO_NRF_INIT_PRIORITY.
config BOARD_CCS_VDD_PWR_CTRL_INIT_PRIORITY config BOARD_CCS_VDD_PWR_CTRL_INIT_PRIORITY
int "CCS_VDD power rail init priority" int "CCS_VDD power rail init priority"

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@ -44,12 +44,13 @@ static int pwr_ctrl_init(struct device *dev)
* constraits. * constraits.
*/ */
#if CONFIG_BOARD_VDD_PWR_CTRL_INIT_PRIORITY <= CONFIG_GPIO_NRF5_INIT_PRIORITY #if CONFIG_BOARD_VDD_PWR_CTRL_INIT_PRIORITY <= CONFIG_GPIO_NRF_INIT_PRIORITY
#error GPIO_NRF5_INIT_PRIORITY must be lower than BOARD_VDD_PWR_CTRL_INIT_PRIORITY #error GPIO_NRF_INIT_PRIORITY must be lower than \
BOARD_VDD_PWR_CTRL_INIT_PRIORITY
#endif #endif
static const struct pwr_ctrl_cfg vdd_pwr_ctrl_cfg = { static const struct pwr_ctrl_cfg vdd_pwr_ctrl_cfg = {
.port = CONFIG_GPIO_NRF5_P0_DEV_NAME, .port = CONFIG_GPIO_P0_DEV_NAME,
.pin = VDD_PWR_CTRL_GPIO_PIN, .pin = VDD_PWR_CTRL_GPIO_PIN,
}; };

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@ -11,7 +11,7 @@
/* Push button switch 0 */ /* Push button switch 0 */
#define SW0_GPIO_PIN 11 #define SW0_GPIO_PIN 11
#define SW0_GPIO_NAME CONFIG_GPIO_NRF5_P0_DEV_NAME #define SW0_GPIO_NAME CONFIG_GPIO_P0_DEV_NAME
#define LIGHTWELL_PORT CONFIG_GPIO_SX1509B_DEV_NAME #define LIGHTWELL_PORT CONFIG_GPIO_SX1509B_DEV_NAME
#define LIGHTWELL_R_PIN 7 #define LIGHTWELL_R_PIN 7

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@ -12,10 +12,10 @@
/* Onboard LED P0_07 */ /* Onboard LED P0_07 */
#define LED0_GPIO_PIN 7 #define LED0_GPIO_PIN 7
#define LED0_GPIO_PORT CONFIG_GPIO_NRF5_P0_DEV_NAME #define LED0_GPIO_PORT CONFIG_GPIO_P0_DEV_NAME
/* Onboard BUTTON P0_06 */ /* Onboard BUTTON P0_06 */
#define SW0_GPIO_PIN 6 #define SW0_GPIO_PIN 6
#define SW0_GPIO_PORT CONFIG_GPIO_NRF5_P0_DEV_NAME #define SW0_GPIO_PORT CONFIG_GPIO_P0_DEV_NAME
#endif /* __INC_BOARD_H */ #endif /* __INC_BOARD_H */

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@ -11,13 +11,13 @@
/* Button*/ /* Button*/
#define BUT_GPIO_PIN 17 #define BUT_GPIO_PIN 17
#define BUT_GPIO_NAME CONFIG_GPIO_NRF5_P0_DEV_NAME #define BUT_GPIO_NAME CONFIG_GPIO_P0_DEV_NAME
#define SW0_GPIO_PIN BUT_GPIO_PIN #define SW0_GPIO_PIN BUT_GPIO_PIN
#define SW0_GPIO_NAME BUT_GPIO_NAME #define SW0_GPIO_NAME BUT_GPIO_NAME
/* Onboard GREEN LED 0 */ /* Onboard GREEN LED 0 */
#define LED0_GPIO_PIN 12 #define LED0_GPIO_PIN 12
#define LED0_GPIO_PORT CONFIG_GPIO_NRF5_P0_DEV_NAME #define LED0_GPIO_PORT CONFIG_GPIO_P0_DEV_NAME
#define LED_GPIO_PIN LED0_GPIO_PIN #define LED_GPIO_PIN LED0_GPIO_PIN
#define LED_GPIO_PORT LED0_GPIO_PORT #define LED_GPIO_PORT LED0_GPIO_PORT

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@ -386,7 +386,7 @@ static int mb_display_init(struct device *dev)
{ {
ARG_UNUSED(dev); ARG_UNUSED(dev);
display.dev = device_get_binding(CONFIG_GPIO_NRF5_P0_DEV_NAME); display.dev = device_get_binding(CONFIG_GPIO_P0_DEV_NAME);
__ASSERT(dev, "No GPIO device found"); __ASSERT(dev, "No GPIO device found");

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@ -418,10 +418,10 @@ static int gpio_nrfx_init(struct device *port)
if (!gpio_initialized) { if (!gpio_initialized) {
gpio_initialized = true; gpio_initialized = true;
IRQ_CONNECT(CONFIG_GPIOTE_NRF5_IRQ, CONFIG_GPIOTE_NRF5_IRQ_PRI, IRQ_CONNECT(CONFIG_GPIOTE_IRQ, CONFIG_GPIOTE_IRQ_PRI,
gpiote_event_handler, NULL, 0); gpiote_event_handler, NULL, 0);
irq_enable(CONFIG_GPIOTE_NRF5_IRQ); irq_enable(CONFIG_GPIOTE_IRQ);
nrf_gpiote_int_enable(NRF_GPIOTE_INT_PORT_MASK); nrf_gpiote_int_enable(NRF_GPIOTE_INT_PORT_MASK);
} }
@ -441,7 +441,7 @@ static int gpio_nrfx_init(struct device *port)
static struct gpio_nrfx_data gpio_nrfx_p##id##_data; \ static struct gpio_nrfx_data gpio_nrfx_p##id##_data; \
\ \
DEVICE_AND_API_INIT(gpio_nrfx_p##id, \ DEVICE_AND_API_INIT(gpio_nrfx_p##id, \
CONFIG_GPIO_NRF5_P##id##_DEV_NAME, \ CONFIG_GPIO_P##id##_DEV_NAME, \
gpio_nrfx_init, \ gpio_nrfx_init, \
&gpio_nrfx_p##id##_data, \ &gpio_nrfx_p##id##_data, \
&gpio_nrfx_p##id##_cfg, \ &gpio_nrfx_p##id##_cfg, \

View file

@ -45,7 +45,7 @@ config MODEM_WNCM14A2A
select MODEM_RECEIVER select MODEM_RECEIVER
select NET_OFFLOAD select NET_OFFLOAD
select UART_MCUX_2 if BOARD_FRDM_K64F select UART_MCUX_2 if BOARD_FRDM_K64F
select GPIO_NRF5_P1 if SOC_NRF52840 select GPIO_NRF_P1 if SOC_NRF52840
select UART_1_NRF_UARTE if SOC_NRF52840 select UART_1_NRF_UARTE if SOC_NRF52840
select UART_1_NRF_FLOW_CONTROL if SOC_NRF52840 select UART_1_NRF_FLOW_CONTROL if SOC_NRF52840
help help

View file

@ -47,7 +47,7 @@
}; };
gpiote: gpiote@40006000 { gpiote: gpiote@40006000 {
compatible = "nordic,nrf5-gpiote"; compatible = "nordic,nrf-gpiote";
reg = <0x40006000 0x1000>; reg = <0x40006000 0x1000>;
interrupts = <6 1>; interrupts = <6 1>;
interrupt-names = "gpiote"; interrupt-names = "gpiote";
@ -56,7 +56,7 @@
}; };
gpio0: gpio@50000000 { gpio0: gpio@50000000 {
compatible = "nordic,nrf5-gpio"; compatible = "nordic,nrf-gpio";
gpio-controller; gpio-controller;
reg = <0x50000000 0x800>; reg = <0x50000000 0x800>;
#gpio-cells = <2>; #gpio-cells = <2>;

View file

@ -48,7 +48,7 @@
}; };
gpiote: gpiote@40006000 { gpiote: gpiote@40006000 {
compatible = "nordic,nrf5-gpiote"; compatible = "nordic,nrf-gpiote";
reg = <0x40006000 0x1000>; reg = <0x40006000 0x1000>;
interrupts = <6 5>; interrupts = <6 5>;
interrupt-names = "gpiote"; interrupt-names = "gpiote";
@ -57,7 +57,7 @@
}; };
gpio0: gpio@50000000 { gpio0: gpio@50000000 {
compatible = "nordic,nrf5-gpio"; compatible = "nordic,nrf-gpio";
gpio-controller; gpio-controller;
reg = <0x50000000 0x200 reg = <0x50000000 0x200
0x50000500 0x300>; 0x50000500 0x300>;

View file

@ -48,7 +48,7 @@
}; };
gpiote: gpiote@40006000 { gpiote: gpiote@40006000 {
compatible = "nordic,nrf5-gpiote"; compatible = "nordic,nrf-gpiote";
reg = <0x40006000 0x1000>; reg = <0x40006000 0x1000>;
interrupts = <6 5>; interrupts = <6 5>;
interrupt-names = "gpiote"; interrupt-names = "gpiote";
@ -57,7 +57,7 @@
}; };
gpio0: gpio@50000000 { gpio0: gpio@50000000 {
compatible = "nordic,nrf5-gpio"; compatible = "nordic,nrf-gpio";
gpio-controller; gpio-controller;
reg = <0x50000000 0x200 reg = <0x50000000 0x200
0x50000500 0x300>; 0x50000500 0x300>;

View file

@ -58,7 +58,7 @@
}; };
gpiote: gpiote@40006000 { gpiote: gpiote@40006000 {
compatible = "nordic,nrf5-gpiote"; compatible = "nordic,nrf-gpiote";
reg = <0x40006000 0x1000>; reg = <0x40006000 0x1000>;
interrupts = <6 5>; interrupts = <6 5>;
interrupt-names = "gpiote"; interrupt-names = "gpiote";
@ -67,7 +67,7 @@
}; };
gpio0: gpio@50000000 { gpio0: gpio@50000000 {
compatible = "nordic,nrf5-gpio"; compatible = "nordic,nrf-gpio";
gpio-controller; gpio-controller;
reg = <0x50000000 0x200 reg = <0x50000000 0x200
0x50000500 0x300>; 0x50000500 0x300>;
@ -77,7 +77,7 @@
}; };
gpio1: gpio@50000300 { gpio1: gpio@50000300 {
compatible = "nordic,nrf5-gpio"; compatible = "nordic,nrf-gpio";
gpio-controller; gpio-controller;
reg = <0x50000300 0x200 reg = <0x50000300 0x200
0x50000800 0x300>; 0x50000800 0x300>;

View file

@ -4,19 +4,19 @@
# SPDX-License-Identifier: Apache-2.0 # SPDX-License-Identifier: Apache-2.0
# #
--- ---
title: NRF5 GPIO title: nRF GPIO
id: nordic,nrf5-gpio id: nordic,nrf-gpio
version: 0.1 version: 0.1
description: > description: >
This is a representation of the NRF5 GPIO nodes This is a representation of the nRF GPIO nodes
properties: properties:
compatible: compatible:
type: string type: string
category: required category: required
description: compatible strings description: compatible strings
constraint: "nordic,nrf5-gpio" constraint: "nordic,nrf-gpio"
reg: reg:
type: int type: int

View file

@ -4,19 +4,19 @@
# SPDX-License-Identifier: Apache-2.0 # SPDX-License-Identifier: Apache-2.0
# #
--- ---
title: NRF5 GPIOTE title: nRF GPIOTE
id: nordic,nrf5-gpiote id: nordic,nrf-gpiote
version: 0.1 version: 0.1
description: > description: >
This is a representation of the NRF5 GPIOTE node This is a representation of the nRF GPIOTE node
properties: properties:
compatible: compatible:
type: string type: string
category: required category: required
description: compatible strings description: compatible strings
constraint: "nordic,nrf5-gpiote" constraint: "nordic,nrf-gpiote"
reg: reg:
type: int type: int

View file

@ -11,34 +11,34 @@
/* Push button switch 0 */ /* Push button switch 0 */
#define SW0_GPIO_PIN 11 #define SW0_GPIO_PIN 11
#define SW0_GPIO_NAME CONFIG_GPIO_NRF5_P0_DEV_NAME #define SW0_GPIO_NAME CONFIG_GPIO_P0_DEV_NAME
/* Push button switch 1 */ /* Push button switch 1 */
#define SW1_GPIO_PIN 12 #define SW1_GPIO_PIN 12
#define SW1_GPIO_NAME CONFIG_GPIO_NRF5_P0_DEV_NAME #define SW1_GPIO_NAME CONFIG_GPIO_P0_DEV_NAME
/* Push button switch 2 */ /* Push button switch 2 */
#define SW2_GPIO_PIN 24 #define SW2_GPIO_PIN 24
#define SW2_GPIO_NAME CONFIG_GPIO_NRF5_P0_DEV_NAME #define SW2_GPIO_NAME CONFIG_GPIO_P0_DEV_NAME
/* Push button switch 3 */ /* Push button switch 3 */
#define SW3_GPIO_PIN 25 #define SW3_GPIO_PIN 25
#define SW3_GPIO_NAME CONFIG_GPIO_NRF5_P0_DEV_NAME #define SW3_GPIO_NAME CONFIG_GPIO_P0_DEV_NAME
/* Onboard GREEN LED 0 */ /* Onboard GREEN LED 0 */
#define LED0_GPIO_PIN 13 #define LED0_GPIO_PIN 13
#define LED0_GPIO_PORT CONFIG_GPIO_NRF5_P0_DEV_NAME #define LED0_GPIO_PORT CONFIG_GPIO_P0_DEV_NAME
/* Onboard GREEN LED 1 */ /* Onboard GREEN LED 1 */
#define LED1_GPIO_PIN 14 #define LED1_GPIO_PIN 14
#define LED1_GPIO_PORT CONFIG_GPIO_NRF5_P0_DEV_NAME #define LED1_GPIO_PORT CONFIG_GPIO_P0_DEV_NAME
/* Onboard GREEN LED 2 */ /* Onboard GREEN LED 2 */
#define LED2_GPIO_PIN 15 #define LED2_GPIO_PIN 15
#define LED2_GPIO_PORT CONFIG_GPIO_NRF5_P0_DEV_NAME #define LED2_GPIO_PORT CONFIG_GPIO_P0_DEV_NAME
/* Onboard GREEN LED 3 */ /* Onboard GREEN LED 3 */
#define LED3_GPIO_PIN 16 #define LED3_GPIO_PIN 16
#define LED3_GPIO_PORT CONFIG_GPIO_NRF5_P0_DEV_NAME #define LED3_GPIO_PORT CONFIG_GPIO_P0_DEV_NAME
#endif /* __INC_BOARD_H */ #endif /* __INC_BOARD_H */

View file

@ -41,15 +41,15 @@
#define PIN_OUT 20 /* PA20 / pin 6 */ #define PIN_OUT 20 /* PA20 / pin 6 */
#define PIN_IN 15 /* PA15 / pin 5 */ #define PIN_IN 15 /* PA15 / pin 5 */
#elif defined(CONFIG_BOARD_NRF52840_PCA10056) #elif defined(CONFIG_BOARD_NRF52840_PCA10056)
#define DEV_NAME CONFIG_GPIO_NRF5_P1_DEV_NAME #define DEV_NAME CONFIG_GPIO_P1_DEV_NAME
#define PIN_OUT 1 /* P1.01 */ #define PIN_OUT 1 /* P1.01 */
#define PIN_IN 2 /* P1.02 */ #define PIN_IN 2 /* P1.02 */
#elif defined(CONFIG_BOARD_NRF52_PCA10040) #elif defined(CONFIG_BOARD_NRF52_PCA10040)
#define DEV_NAME CONFIG_GPIO_NRF5_P0_DEV_NAME #define DEV_NAME CONFIG_GPIO_P0_DEV_NAME
#define PIN_OUT 11 /* P0.11 */ #define PIN_OUT 11 /* P0.11 */
#define PIN_IN 12 /* P0.12 */ #define PIN_IN 12 /* P0.12 */
#elif defined(CONFIG_BOARD_NRF51_PCA10028) #elif defined(CONFIG_BOARD_NRF51_PCA10028)
#define DEV_NAME CONFIG_GPIO_NRF5_P0_DEV_NAME #define DEV_NAME CONFIG_GPIO_P0_DEV_NAME
#define PIN_OUT 12 /* P0.12 */ #define PIN_OUT 12 /* P0.12 */
#define PIN_IN 13 /* P0.13 */ #define PIN_IN 13 /* P0.13 */
#else #else