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gpio: Add a driver for Intel's SCH controller

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Such controller is found in legacy bridge on Intel's platforms. Such as
Poulsbo or Quark x1000.

Change-Id: I30f205f1e73aaa680092e92717fdacbb74046fa3
Signed-off-by: Tomasz Bursztyka <tomasz.bursztyka@linux.intel.com>
This commit is contained in:
Tomasz Bursztyka 2015-11-11 11:43:15 +01:00 • committed by Anas Nashif
commit 4effd20617
4 changed files with 511 additions and 0 deletions
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59
drivers/gpio/gpio_sch.h Normal file
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/* gpio_sch.h - Descriptions of registers for Intel SCH GPIO controller */
/*
* Copyright (c) 2015 Intel Corporation.
*
* Licensed under the Apache License, Version 2.0 (the "License");
* you may not use this file except in compliance with the License.
* You may obtain a copy of the License at
*
* http://www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS,
* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
* See the License for the specific language governing permissions and
* limitations under the License.
*/
#ifndef __GPIO_SCH_H__
#define __GPIO_SCH_H__
#include <stdint.h>
#include <nanokernel.h>
#include <gpio.h>
#define GPIO_SCH_REG_GEN (0x00)
#define GPIO_SCH_REG_GIO (0x04)
#define GPIO_SCH_REG_GLVL (0x08)
#define GPIO_SCH_REG_GTPE (0x0C)
#define GPIO_SCH_REG_GTNE (0x10)
#define GPIO_SCH_REG_GGPE (0x14)
#define GPIO_SCH_REG_GSMI (0x18)
#define GPIO_SCH_REG_GTS (0x1C)
struct gpio_sch_config {
uint32_t regs;
uint8_t bits;
};
#define GPIO_SCH_POLLING_STACK_SIZE 1024
#define GPIO_SCH_POLLING_TICKS (sys_clock_ticks_per_sec / 5)
struct gpio_sch_data {
char __stack polling_stack[GPIO_SCH_POLLING_STACK_SIZE];
gpio_callback_t callback;
struct nano_timer poll_timer;
uint8_t poll;
struct {
uint32_t gtpe;
uint32_t gtne;
} int_regs;
uint32_t cb_enabled;
uint8_t port_cb;
};
#endif /* __GPIO_SCH_H__ */