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x86: Refactor how UART is configured

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Now for x86 platforms, UART is configured statically or dynamically into
the driver and not anymore in the board's system.c. Thus limiting the
information to be scattered into 2 files instead of 3. Then in future,
it will also be possible to remove driver specific informations from the
generic UART API structure.

Change-Id: I7b7fa37f10f88316a4d375c99de3bbacf152a3e3
Signed-off-by: Tomasz Bursztyka <tomasz.bursztyka@linux.intel.com>
This commit is contained in:
Tomasz Bursztyka 2015-05-20 14:35:45 +03:00 • committed by Anas Nashif
commit 4eb6aab3ad
5 changed files with 65 additions and 53 deletions
Download patch file Download diff file Expand all files Collapse all files

17
arch/x86/generic_pc/board.h
View file

@ -124,10 +124,25 @@ the 'generic_pc' BSP.
#define CONFIG_UART_BAUDRATE COM1_BAUD_RATE
#define CONFIG_UART_NUM_PORTS \
(CONFIG_UART_NUM_SYSTEM_PORTS + CONFIG_UART_NUM_EXTRA_PORTS)
#define CONFIG_UART_PORT_0_REGS COM1_BASE_ADRS
#define CONFIG_UART_PORT_0_IRQ COM1_INT_LVL
#define CONFIG_UART_PORT_1_REGS COM2_BASE_ADRS
#define CONFIG_UART_PORT_1_IRQ COM2_INT_LVL
#define CONFIGURE_UART_PORTS(__type, __name) \
static __type __name[CONFIG_UART_NUM_PORTS] = { \
{ \
.port = CONFIG_UART_PORT_0_REGS, \
.irq = CONFIG_UART_PORT_0_IRQ \
}, \
{ \
.port = CONFIG_UART_PORT_1_REGS, \
.irq = CONFIG_UART_PORT_1_IRQ \
} \
}
/* Console definitions */
#define CONFIG_UART_CONSOLE_INDEX 0
#define CONFIG_UART_CONSOLE_REGS COM1_BASE_ADRS
#define CONFIG_UART_CONSOLE_IRQ COM1_INT_LVL
#define CONFIG_UART_CONSOLE_INT_PRI COM1_INT_PRI

8
arch/x86/generic_pc/system.c
View file

@ -101,6 +101,7 @@ static void uartGenericInfoInit(struct uart_init_info *p_info)
p_info->options = 0;
p_info->sys_clk_freq = UART_XTAL_FREQ;
p_info->baud_rate = CONFIG_UART_BAUDRATE;
p_info->int_pri = CONFIG_UART_CONSOLE_INT_PRI;
}
#endif /* DO_CONSOLE_INIT */
@ -130,13 +131,6 @@ static void consoleInit(void)
struct uart_init_info info;
uartGenericInfoInit(&info);
/*
* Need type casting to avoid compiler warnings about assigning a
* pointer to a smaller integer. We know the size is right...
*/
info.regs = (uint16_t)((unsigned long)CONFIG_UART_CONSOLE_REGS);
info.irq = CONFIG_UART_CONSOLE_IRQ;
info.int_pri = CONFIG_UART_CONSOLE_INT_PRI;
uart_init(CONFIG_UART_CONSOLE_INDEX, &info);
uart_console_init();
}

2
arch/x86/quark/board.h
View file

@ -96,6 +96,8 @@ the 'Quark' BSP.
/* uart configuration settings */
/* Generic definitions */
#define CONFIG_UART_PCI_VENDOR_ID 0x8086
#define CONFIG_UART_PCI_DEVICE_ID 0x0936
#define CONFIG_UART_NUM_SYSTEM_PORTS 2
#define CONFIG_UART_NUM_EXTRA_PORTS 0
#define CONFIG_UART_BAUDRATE COM1_BAUD_RATE

42
arch/x86/quark/system.c
View file

@ -48,32 +48,11 @@ Handlers for the secondary serial port have not been added.
#include <drivers/uart.h>
#include <drivers/ioapic.h>
#include <drivers/loapic.h>
#include <pci/pci.h>
#include <pci/pci_mgr.h>
#if defined(CONFIG_PRINTK) || defined(CONFIG_STDOUT_CONSOLE)
#define DO_CONSOLE_INIT
#endif
/*******************************************************************************
*
* _SysPciMap - maps PCI memory region
*
* This routine is defined in the BSP as the memory layout of the board is
* board specific. However, the prototype is located in pci.h.
*
* RETURNS: virtual address
*
*/
uint32_t _SysPciMap(uint32_t addr, uint32_t size)
{
ARG_UNUSED(size);
return addr;
}
#if defined(DO_CONSOLE_INIT)
/*******************************************************************************
@ -109,32 +88,11 @@ static void uartGenericInfoInit(struct uart_init_info *p_info)
static void consoleInit(void)
{
struct pci_dev_info dev_info = {
.class = PCI_CLASS_COMM_CTLR,
.vendor_id = 0x8086,
.device_id = 0x0936,
};
struct uart_init_info info;
int i;
uartGenericInfoInit(&info);
pci_bus_scan_init();
i = 0;
while (pci_bus_scan(&dev_info) && i < CONFIG_UART_CONSOLE_PCI_IDX) {
i++;
}
info.regs = _SysPciMap(dev_info.addr, dev_info.size);
info.irq = dev_info.irq;
uart_init(CONFIG_UART_CONSOLE_INDEX, &info);
uart_console_init();
#ifdef PCI_DEBUG
pci_show(&dev_info);
#endif /* PCI_DEBUG */
}
#else

49
drivers/serial/ns16550.c
View file

@ -66,6 +66,10 @@ INCLUDE FILES: drivers/uart.h
#include <toolchain.h>
#include <sections.h>
#include <drivers/uart.h>
#ifdef CONFIG_PCI
#include <pci/pci.h>
#include <pci/pci_mgr.h>
#endif /* CONFIG_PCI */
/* defines */
@ -235,7 +239,46 @@ struct ns16550 {
/* locals */
static struct ns16550 __noinit uart[CONFIG_UART_NUM_SYSTEM_PORTS];
#if !(defined(CONFIGURE_UART_PORTS)) && !(defined(CONFIG_PCI))
#error "CONFIG_PCI or CONFIGURE_UART_PORTS is needed"
#elif !(defined(CONFIGURE_UART_PORTS)) && defined(CONFIG_PCI)
static struct ns16550 uart[CONFIG_UART_NUM_SYSTEM_PORTS] = {};
static inline void ns16550_uart_init()
{
struct pci_dev_info dev_info = {
.class = PCI_CLASS_COMM_CTLR,
.vendor_id = CONFIG_UART_PCI_VENDOR_ID,
.device_id = CONFIG_UART_PCI_DEVICE_ID,
};
int i;
if (uart[0].port && uart[0].irq)
return;
pci_bus_scan_init();
for (i = 0; pci_bus_scan(&dev_info) &&
i < CONFIG_UART_NUM_SYSTEM_PORTS; i++) {
uart[i].port = dev_info.addr;
uart[i].irq = dev_info.irq;
#ifdef PCI_DEBUG
pci_show(&dev_info);
#endif /* PCI_DEBUG */
}
}
#else
#define ns16550_uart_init() \
do {} while ((0))
CONFIGURE_UART_PORTS(struct ns16550, uart);
#endif /* CONFIGURE_UART_PORTS */
/*******************************************************************************
*
@ -253,8 +296,8 @@ void uart_init(int port, /* UART channel to initialize */
int oldLevel; /* old interrupt lock level */
uint32_t divisor; /* baud rate divisor */
uart[port].port = init_info->regs;
uart[port].irq = init_info->irq;
ns16550_uart_init();
uart[port].intPri = init_info->int_pri;
uart[port].iirCache = 0;