diff --git a/CODEOWNERS b/CODEOWNERS index 1bc0f7c8b42..91b8d96e9e4 100644 --- a/CODEOWNERS +++ b/CODEOWNERS @@ -215,6 +215,9 @@ /dts/arm/nxp/ @MaureenHelm /dts/arm/microchip/ @franciscomunoz @albertofloyd @scottwcpg /dts/arm/silabs/efm32gg11b* @oanerer +/dts/arm/silabs/efm32_jg_pg* @chrta +/dts/arm/silabs/efm32jg12b* @chrta +/dts/arm/silabs/efm32pg12b* @chrta /dts/riscv/microsemi-miv.dtsi @galak /dts/riscv/rv32m1* @MaureenHelm /dts/riscv/riscv32-fe310.dtsi @nategraff-sifive diff --git a/dts/arm/silabs/efm32_jg_pg_12b.dtsi b/dts/arm/silabs/efm32_jg_pg_12b.dtsi new file mode 100644 index 00000000000..90d75bbe0a8 --- /dev/null +++ b/dts/arm/silabs/efm32_jg_pg_12b.dtsi @@ -0,0 +1,187 @@ +/* + * Copyright (c) 2018 Christian Taedcke + * Copyright (c) 2019 Lemonbeat GmbH + * + * SPDX-License-Identifier: Apache-2.0 + */ + +#include +#include +#include +#include "gpio_gecko.h" + +/ { + cpus { + #address-cells = <1>; + #size-cells = <0>; + + }; + + sram0: memory@20000000 { + compatible = "mmio-sram"; + }; + + soc { + flash-controller@400e0000 { + compatible = "silabs,gecko-flash-controller"; + label = "FLASH_CTRL"; + reg = <0x400e0000 0x104>; + interrupts = <25 0>; + + #address-cells = <1>; + #size-cells = <1>; + + flash0: flash@0 { + compatible = "soc-nv-flash"; + label = "FLASH_0"; + write-block-size = <4>; + erase-block-size = <2048>; + }; + }; + + usart0: usart@40010000 { /* USART0 */ + compatible = "silabs,gecko-usart"; + reg = <0x40010000 0x400>; + interrupts = <12 0 13 0>; + interrupt-names = "rx", "tx"; + peripheral-id = <0>; + status = "disabled"; + label = "USART_0"; + }; + + usart1: usart@40010400 { /* USART1 */ + compatible = "silabs,gecko-usart"; + reg = <0x40010400 0x400>; + interrupts = <20 0 21 0>; + interrupt-names = "rx", "tx"; + peripheral-id = <1>; + status = "disabled"; + label = "USART_1"; + }; + + usart2: usart@40010800 { /* USART2 */ + compatible = "silabs,gecko-usart"; + reg = <0x40010800 0x400>; + interrupts = <40 0 41 0>; + interrupt-names = "rx", "tx"; + peripheral-id = <2>; + status = "disabled"; + label = "USART_2"; + }; + + usart3: usart@40010c00 { /* USART3 */ + compatible = "silabs,gecko-usart"; + reg = <0x40010c00 0x400>; + interrupts = <43 0 44 0>; + interrupt-names = "rx", "tx"; + peripheral-id = <3>; + status = "disabled"; + label = "USART_3"; + }; + + leuart0: leuart@4004a000 { /* LEUART0 */ + compatible = "silabs,gecko-leuart"; + reg = <0x4004a000 0x400>; + interrupts = <22 0>; + peripheral-id = <0>; + status = "disabled"; + label = "LEUART_0"; + }; + + i2c0: i2c@4000c000 { + compatible = "silabs,gecko-i2c"; + clock-frequency = ; + #address-cells = <1>; + #size-cells = <0>; + reg = <0x4000c000 0x400>; + interrupts = <17 0>; + label = "I2C_0"; + status = "disabled"; + }; + + i2c1: i2c@4000c400 { + compatible = "silabs,gecko-i2c"; + clock-frequency = ; + #address-cells = <1>; + #size-cells = <0>; + reg = <0x4000c400 0x400>; + interrupts = <42 0>; + label = "I2C_1"; + status = "disabled"; + }; + + rtcc0: rtcc@40042000 { + compatible = "silabs,gecko-rtcc"; + reg = <0x40042000 0x184>; + interrupts = <30 0>; + clock-frequency = <32768>; + prescaler = <1>; + status = "disabled"; + label = "RTCC_0"; + }; + + gpio: gpio@4000a400 { + compatible = "silabs,efm32-gpio"; + reg = <0x4000a400 0xf00>; + interrupts = <1 2 11 2>; + interrupt-names = "GPIO_EVEN", "GPIO_ODD"; + label = "GPIO"; + + ranges; + #address-cells = <1>; + #size-cells = <1>; + + gpioa: gpio@4000a000 { + compatible = "silabs,efm32-gpio-port"; + reg = <0x4000a000 0x30>; + label = "GPIO_A"; + gpio-controller; + #gpio-cells = <2>; + }; + + gpiob: gpio@4000a030 { + compatible = "silabs,efm32-gpio-port"; + reg = <0x4000a030 0x30>; + label = "GPIO_B"; + gpio-controller; + #gpio-cells = <2>; + }; + + gpioc: gpio@4000a060 { + compatible = "silabs,efm32-gpio-port"; + reg = <0x4000a060 0x30>; + label = "GPIO_C"; + gpio-controller; + #gpio-cells = <2>; + }; + + gpiod: gpio@4000a090 { + compatible = "silabs,efm32-gpio-port"; + reg = <0x4000a090 0x30>; + label = "GPIO_D"; + gpio-controller; + #gpio-cells = <2>; + }; + + gpioe: gpio@4000a0c0 { + compatible = "silabs,efm32-gpio-port"; + reg = <0x4000a0c0 0x30>; + label = "GPIO_E"; + gpio-controller; + #gpio-cells = <2>; + }; + + gpiof: gpio@4000a0f0 { + compatible = "silabs,efm32-gpio-port"; + reg = <0x4000a0f0 0x30>; + label = "GPIO_F"; + gpio-controller; + #gpio-cells = <2>; + }; + }; + }; +}; + +&nvic { + arm,num-irq-priority-bits = <3>; +}; diff --git a/dts/arm/silabs/efm32jg12b.dtsi b/dts/arm/silabs/efm32jg12b.dtsi new file mode 100644 index 00000000000..45b6c967c2c --- /dev/null +++ b/dts/arm/silabs/efm32jg12b.dtsi @@ -0,0 +1,17 @@ +/* + * Copyright (c) 2018 Christian Taedcke + * Copyright (c) 2019 Lemonbeat GmbH + * + * SPDX-License-Identifier: Apache-2.0 + */ + +#include + +/ { + cpus { + cpu0: cpu@0 { + compatible = "arm,cortex-m3"; + reg = <0>; + }; + }; +}; diff --git a/dts/arm/silabs/efm32jg12b500f1024gl125.dtsi b/dts/arm/silabs/efm32jg12b500f1024gl125.dtsi new file mode 100644 index 00000000000..47b44bacd26 --- /dev/null +++ b/dts/arm/silabs/efm32jg12b500f1024gl125.dtsi @@ -0,0 +1,25 @@ +/* + * Copyright (c) 2019 Lemonbeat GmbH + * + * SPDX-License-Identifier: Apache-2.0 + */ + +#include +#include + +/ { + sram0: memory@20000000 { + reg = <0x20000000 DT_SIZE_K(256)>; + }; + + soc { + compatible = "silabs,efm32jg12b500f1024gl125", "silabs,efm32jg12b", "silabs,efm32", "simple-bus"; + + flash-controller@400e0000 { + flash0: flash@0 { + reg = <0 DT_SIZE_K(1024)>; + }; + }; + }; + +}; diff --git a/dts/arm/silabs/efm32pg12b.dtsi b/dts/arm/silabs/efm32pg12b.dtsi index fd402a5cb05..bf8e0e7ab38 100644 --- a/dts/arm/silabs/efm32pg12b.dtsi +++ b/dts/arm/silabs/efm32pg12b.dtsi @@ -1,190 +1,17 @@ /* * Copyright (c) 2018 Christian Taedcke + * Copyright (c) 2019 Lemonbeat GmbH * * SPDX-License-Identifier: Apache-2.0 */ -#include -#include -#include -#include "gpio_gecko.h" +#include / { cpus { - #address-cells = <1>; - #size-cells = <0>; - cpu0: cpu@0 { compatible = "arm,cortex-m4f"; reg = <0>; }; }; - - sram0: memory@20000000 { - compatible = "mmio-sram"; - }; - - soc { - flash-controller@400e0000 { - compatible = "silabs,gecko-flash-controller"; - label = "FLASH_CTRL"; - reg = <0x400e0000 0x104>; - interrupts = <25 0>; - - #address-cells = <1>; - #size-cells = <1>; - - flash0: flash@0 { - compatible = "soc-nv-flash"; - label = "FLASH_0"; - write-block-size = <4>; - erase-block-size = <2048>; - }; - }; - - usart0: usart@40010000 { /* USART0 */ - compatible = "silabs,gecko-usart"; - reg = <0x40010000 0x400>; - interrupts = <12 0 13 0>; - interrupt-names = "rx", "tx"; - peripheral-id = <0>; - status = "disabled"; - label = "USART_0"; - }; - - usart1: usart@40010400 { /* USART1 */ - compatible = "silabs,gecko-usart"; - reg = <0x40010400 0x400>; - interrupts = <20 0 21 0>; - interrupt-names = "rx", "tx"; - peripheral-id = <1>; - status = "disabled"; - label = "USART_1"; - }; - - usart2: usart@40010800 { /* USART2 */ - compatible = "silabs,gecko-usart"; - reg = <0x40010800 0x400>; - interrupts = <40 0 41 0>; - interrupt-names = "rx", "tx"; - peripheral-id = <2>; - status = "disabled"; - label = "USART_2"; - }; - - usart3: usart@40010c00 { /* USART3 */ - compatible = "silabs,gecko-usart"; - reg = <0x40010c00 0x400>; - interrupts = <43 0 44 0>; - interrupt-names = "rx", "tx"; - peripheral-id = <3>; - status = "disabled"; - label = "USART_3"; - }; - - leuart0: leuart@4004a000 { /* LEUART0 */ - compatible = "silabs,gecko-leuart"; - reg = <0x4004a000 0x400>; - interrupts = <22 0>; - peripheral-id = <0>; - status = "disabled"; - label = "LEUART_0"; - }; - - i2c0: i2c@4000c000 { - compatible = "silabs,gecko-i2c"; - clock-frequency = ; - #address-cells = <1>; - #size-cells = <0>; - reg = <0x4000c000 0x400>; - interrupts = <17 0>; - label = "I2C_0"; - status = "disabled"; - }; - - i2c1: i2c@4000c400 { - compatible = "silabs,gecko-i2c"; - clock-frequency = ; - #address-cells = <1>; - #size-cells = <0>; - reg = <0x4000c400 0x400>; - interrupts = <42 0>; - label = "I2C_1"; - status = "disabled"; - }; - - rtcc0: rtcc@40042000 { - compatible = "silabs,gecko-rtcc"; - reg = <0x40042000 0x184>; - interrupts = <30 0>; - clock-frequency = <32768>; - prescaler = <1>; - status = "disabled"; - label = "RTCC_0"; - }; - - gpio: gpio@4000a400 { - compatible = "silabs,efm32-gpio"; - reg = <0x4000a400 0xf00>; - interrupts = <1 2 11 2>; - interrupt-names = "GPIO_EVEN", "GPIO_ODD"; - label = "GPIO"; - - ranges; - #address-cells = <1>; - #size-cells = <1>; - - gpioa: gpio@4000a000 { - compatible = "silabs,efm32-gpio-port"; - reg = <0x4000a000 0x30>; - label = "GPIO_A"; - gpio-controller; - #gpio-cells = <2>; - }; - - gpiob: gpio@4000a030 { - compatible = "silabs,efm32-gpio-port"; - reg = <0x4000a030 0x30>; - label = "GPIO_B"; - gpio-controller; - #gpio-cells = <2>; - }; - - gpioc: gpio@4000a060 { - compatible = "silabs,efm32-gpio-port"; - reg = <0x4000a060 0x30>; - label = "GPIO_C"; - gpio-controller; - #gpio-cells = <2>; - }; - - gpiod: gpio@4000a090 { - compatible = "silabs,efm32-gpio-port"; - reg = <0x4000a090 0x30>; - label = "GPIO_D"; - gpio-controller; - #gpio-cells = <2>; - }; - - gpioe: gpio@4000a0c0 { - compatible = "silabs,efm32-gpio-port"; - reg = <0x4000a0c0 0x30>; - label = "GPIO_E"; - gpio-controller; - #gpio-cells = <2>; - }; - - gpiof: gpio@4000a0f0 { - compatible = "silabs,efm32-gpio-port"; - reg = <0x4000a0f0 0x30>; - label = "GPIO_F"; - gpio-controller; - #gpio-cells = <2>; - }; - }; - }; -}; - -&nvic { - arm,num-irq-priority-bits = <3>; }; diff --git a/soc/arm/silabs_exx32/efm32jg12b/Kconfig.defconfig.efm32jg12b b/soc/arm/silabs_exx32/efm32jg12b/Kconfig.defconfig.efm32jg12b new file mode 100644 index 00000000000..25d33770e81 --- /dev/null +++ b/soc/arm/silabs_exx32/efm32jg12b/Kconfig.defconfig.efm32jg12b @@ -0,0 +1,35 @@ +# Silicon Labs EFM32JG12B configuration options + +# Copyright (c) 2019 Lemonbeat GmbH +# SPDX-License-Identifier: Apache-2.0 + +if GPIO + +config GPIO_GECKO + default y + +endif # GPIO + +if SERIAL + +config UART_GECKO + default y + +config LEUART_GECKO + default y + +endif # SERIAL + +if I2C + +config I2C_GECKO + default y + +endif # I2C + +if FLASH + +config SOC_FLASH_GECKO + default y + +endif # FLASH diff --git a/soc/arm/silabs_exx32/efm32jg12b/Kconfig.defconfig.series b/soc/arm/silabs_exx32/efm32jg12b/Kconfig.defconfig.series new file mode 100644 index 00000000000..1d22bf16f13 --- /dev/null +++ b/soc/arm/silabs_exx32/efm32jg12b/Kconfig.defconfig.series @@ -0,0 +1,20 @@ +# EFM32JG12B series configuration options + +# Copyright (c) 2019 Lemonbeat GmbH +# SPDX-License-Identifier: Apache-2.0 + +if SOC_SERIES_EFM32JG12B + +config SOC_SERIES + default "efm32jg12b" + +config SOC_PART_NUMBER + default "EFM32JG12B500F1024GL125" if SOC_PART_NUMBER_EFM32JG12B500F1024GL125 + +config NUM_IRQS + # must be >= the highest interrupt number used + default 50 + +source "soc/arm/silabs_exx32/efm32jg12b/Kconfig.defconfig.efm32jg12b" + +endif # SOC_SERIES_EFM32JG12B diff --git a/soc/arm/silabs_exx32/efm32jg12b/Kconfig.series b/soc/arm/silabs_exx32/efm32jg12b/Kconfig.series new file mode 100644 index 00000000000..8c77a9e90e1 --- /dev/null +++ b/soc/arm/silabs_exx32/efm32jg12b/Kconfig.series @@ -0,0 +1,20 @@ +# EFM32JG12B MCU line + +# Copyright (c) 2019 Lemonbeat GmbH +# SPDX-License-Identifier: Apache-2.0 + +config SOC_SERIES_EFM32JG12B + bool "EFM32JG12B Series MCU" + select HAS_SILABS_GECKO + select HAS_SWO + select CPU_CORTEX_M3 + select SOC_FAMILY_EXX32 + select HAS_SYS_POWER_STATE_SLEEP_1 + select HAS_SYS_POWER_STATE_SLEEP_2 + select HAS_SYS_POWER_STATE_SLEEP_3 + select SOC_GECKO_HAS_INDIVIDUAL_PIN_LOCATION + select SOC_GECKO_CMU + select SOC_GECKO_EMU + select SOC_GECKO_GPIO + help + Enable support for EFM32 JadeGecko MCU series diff --git a/soc/arm/silabs_exx32/efm32jg12b/Kconfig.soc b/soc/arm/silabs_exx32/efm32jg12b/Kconfig.soc new file mode 100644 index 00000000000..dd8214bbfaa --- /dev/null +++ b/soc/arm/silabs_exx32/efm32jg12b/Kconfig.soc @@ -0,0 +1,11 @@ +# EFM32JG12B (Jade Gecko) MCU line + +# Copyright (c) 2019 Lemonbeat GmbH +# SPDX-License-Identifier: Apache-2.0 + +if SOC_SERIES_EFM32JG12B + +config SOC_PART_NUMBER_EFM32JG12B500F1024GL125 + bool + +endif # SOC_SERIES_EFM32JG12B diff --git a/soc/arm/silabs_exx32/efm32jg12b/dts_fixup.h b/soc/arm/silabs_exx32/efm32jg12b/dts_fixup.h new file mode 100644 index 00000000000..f72de756107 --- /dev/null +++ b/soc/arm/silabs_exx32/efm32jg12b/dts_fixup.h @@ -0,0 +1,29 @@ +/* + * Copyright (c) 2019 Lemonbeat GmbH + * + * SPDX-License-Identifier: Apache-2.0 + */ + +/* SoC level DTS fixup file */ + +#define DT_NUM_IRQ_PRIO_BITS DT_ARM_V7M_NVIC_E000E100_ARM_NUM_IRQ_PRIORITY_BITS +#define DT_CPU_CLOCK_FREQUENCY DT_ARM_CORTEX_M4F_0_CLOCK_FREQUENCY + +#define DT_FLASH_DEV_BASE_ADDRESS DT_SILABS_GECKO_FLASH_CONTROLLER_400E0000_BASE_ADDRESS +#define DT_FLASH_DEV_NAME DT_SILABS_GECKO_FLASH_CONTROLLER_400E0000_LABEL + +#define DT_GPIO_GECKO_COMMON_NAME DT_SILABS_EFM32_GPIO_4000A400_LABEL +#define DT_GPIO_GECKO_COMMON_EVEN_IRQ DT_SILABS_EFM32_GPIO_4000A400_IRQ_GPIO_EVEN +#define DT_GPIO_GECKO_COMMON_EVEN_PRI DT_SILABS_EFM32_GPIO_4000A400_IRQ_GPIO_EVEN_PRIORITY +#define DT_GPIO_GECKO_COMMON_ODD_IRQ DT_SILABS_EFM32_GPIO_4000A400_IRQ_GPIO_ODD +#define DT_GPIO_GECKO_COMMON_ODD_PRI DT_SILABS_EFM32_GPIO_4000A400_IRQ_GPIO_ODD_PRIORITY +#define DT_GPIO_GECKO_SWO_LOCATION DT_SILABS_EFM32_GPIO_4000A400_LOCATION_SWO + +#define DT_GPIO_GECKO_PORTA_NAME DT_SILABS_EFM32_GPIO_PORT_4000A000_LABEL +#define DT_GPIO_GECKO_PORTB_NAME DT_SILABS_EFM32_GPIO_PORT_4000A030_LABEL +#define DT_GPIO_GECKO_PORTC_NAME DT_SILABS_EFM32_GPIO_PORT_4000A060_LABEL +#define DT_GPIO_GECKO_PORTD_NAME DT_SILABS_EFM32_GPIO_PORT_4000A090_LABEL +#define DT_GPIO_GECKO_PORTE_NAME DT_SILABS_EFM32_GPIO_PORT_4000A0C0_LABEL +#define DT_GPIO_GECKO_PORTF_NAME DT_SILABS_EFM32_GPIO_PORT_4000A0F0_LABEL + +/* End of SoC Level DTS fixup file */ diff --git a/soc/arm/silabs_exx32/efm32jg12b/linker.ld b/soc/arm/silabs_exx32/efm32jg12b/linker.ld new file mode 100644 index 00000000000..6e9283bec25 --- /dev/null +++ b/soc/arm/silabs_exx32/efm32jg12b/linker.ld @@ -0,0 +1,16 @@ +/* + * Copyright (c) 2018 Christian Taedcke + * + * SPDX-License-Identifier: Apache-2.0 + */ + +/** + * @file + * @brief Linker command/script file + * + * This is the linker script for both standard images. + */ + +#include + +#include diff --git a/soc/arm/silabs_exx32/efm32jg12b/soc.h b/soc/arm/silabs_exx32/efm32jg12b/soc.h new file mode 100644 index 00000000000..d1779826475 --- /dev/null +++ b/soc/arm/silabs_exx32/efm32jg12b/soc.h @@ -0,0 +1,29 @@ +/* + * Copyright (c) 2017 Christian Taedcke + * + * SPDX-License-Identifier: Apache-2.0 + */ + +/** + * @file + * @brief Board configuration macros for the efm32jg12b soc + * + */ + +#ifndef _SOC__H_ +#define _SOC__H_ + +#include + +#ifndef _ASMLANGUAGE + +#include +#include +#include + +#include "soc_pinmap.h" +#include "../common/soc_gpio.h" + +#endif /* !_ASMLANGUAGE */ + +#endif /* _SOC__H_ */ diff --git a/soc/arm/silabs_exx32/efm32jg12b/soc_pinmap.h b/soc/arm/silabs_exx32/efm32jg12b/soc_pinmap.h new file mode 100644 index 00000000000..7cf3a2f2c39 --- /dev/null +++ b/soc/arm/silabs_exx32/efm32jg12b/soc_pinmap.h @@ -0,0 +1,32 @@ +/* + * Copyright (c) 2018 Christian Taedcke + * SPDX-License-Identifier: Apache-2.0 + */ + +/** @file + * @brief Silabs EFM32JG12B MCU pin definitions. + * + * This file contains pin configuration data required by different MCU + * modules to correctly configure GPIO controller. + */ + +#ifndef _SILABS_EFM32JG12B_SOC_PINMAP_H_ +#define _SILABS_EFM32JG12B_SOC_PINMAP_H_ + +#include +#include + +/* Serial Wire Output (SWO) */ +#if (DT_GPIO_GECKO_SWO_LOCATION == 0) +#define PIN_SWO {gpioPortF, 2, gpioModePushPull, 1} +#elif (DT_GPIO_GECKO_SWO_LOCATION == 1) +#define PIN_SWO {gpioPortB, 13, gpioModePushPull, 1} +#elif (DT_GPIO_GECKO_SWO_LOCATION == 2) +#define PIN_SWO {gpioPortD, 15, gpioModePushPull, 1} +#elif (DT_GPIO_GECKO_SWO_LOCATION == 3) +#define PIN_SWO {gpioPortC, 11, gpioModePushPull, 1} +#elif (DT_GPIO_GECKO_SWO_LOCATION >= 4) +#error ("Invalid SWO pin location") +#endif + +#endif /* _SILABS_EFM32JG12B_SOC_PINMAP_H_ */ diff --git a/west.yml b/west.yml index 71451c314b9..2856a4b881d 100644 --- a/west.yml +++ b/west.yml @@ -56,7 +56,7 @@ manifest: revision: 85302959c0c659311cf90ac51d133e5ce19c9288 path: modules/hal/microchip - name: hal_silabs - revision: ff34fe15b64f82ce7ed507cccae75877c540d9ab + revision: 9a3fe1af3a14bf88c86b9cda3bf2a0921d5a97a1 path: modules/hal/silabs - name: hal_st revision: fa481784b3c49780f18d50bafe00390ccb62b2ec