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SoC: Intel: ADSP: ACE30: add .imrdata to MMU definitions

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On ACE30 platforms adding a section to the linker script isn't
enough, it should also be added to the xtensa_soc_mmu_ranges[] array.

Signed-off-by: Guennadi Liakhovetski <guennadi.liakhovetski@linux.intel.com>
This commit is contained in:
Guennadi Liakhovetski 2025-05-26 15:34:42 +02:00 • committed by Anas Nashif
commit 4de0c9abc0
2 changed files with 10 additions and 0 deletions
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2
soc/intel/intel_adsp/ace/ace-link.ld
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@ -170,7 +170,9 @@ SECTIONS {
* .text.
*/
.imrdata : ALIGN(4096) {
__imr_data_start = .;
*(.imrdata .imrdata.*)
__imr_data_end = .;
} >imr
/* Cold code in IMR memory */

8
soc/intel/intel_adsp/ace/mmu_ace30.c
View file

@ -21,6 +21,8 @@ extern char __common_ram_region_start[];
extern char __common_ram_region_end[];
extern char __cold_start[];
extern char __cold_end[];
extern char __imr_data_start[];
extern char __imr_data_end[];
extern char __coldrodata_start[];
@ -133,6 +135,12 @@ const struct xtensa_mmu_range xtensa_soc_mmu_ranges[] = {
.end = (uint32_t)_imr_end,
.name = "imr coldrodata",
},
{
.start = (uint32_t)__imr_data_start,
.end = (uint32_t)__imr_data_end,
.attrs = XTENSA_MMU_PERM_W | XTENSA_MMU_CACHED_WB,
.name = "imr data",
},
{
.start = (uint32_t)IMR_L3_HEAP_BASE,
.end = (uint32_t)(IMR_L3_HEAP_BASE + IMR_L3_HEAP_SIZE),