diff --git a/boards/riscv/it8xxx2_evb/it8xxx2_evb.dts b/boards/riscv/it8xxx2_evb/it8xxx2_evb.dts index b3754e11cb5..a36ca270851 100644 --- a/boards/riscv/it8xxx2_evb/it8xxx2_evb.dts +++ b/boards/riscv/it8xxx2_evb/it8xxx2_evb.dts @@ -7,7 +7,6 @@ #include #include -#include #include / { diff --git a/boards/riscv/it8xxx2_evb/it8xxx2_evb_defconfig b/boards/riscv/it8xxx2_evb/it8xxx2_evb_defconfig index 16ec7dc35e2..b0cc99f4ba7 100644 --- a/boards/riscv/it8xxx2_evb/it8xxx2_evb_defconfig +++ b/boards/riscv/it8xxx2_evb/it8xxx2_evb_defconfig @@ -6,7 +6,6 @@ CONFIG_SOC_IT8XXX2=y CONFIG_BOARD_IT8XXX2_EVB=y CONFIG_BOOT_DELAY=1 -CONFIG_PINMUX=y CONFIG_GEN_IRQ_VECTOR_TABLE=n CONFIG_CONSOLE=y CONFIG_SERIAL=y diff --git a/drivers/pinmux/CMakeLists.txt b/drivers/pinmux/CMakeLists.txt index cec7520d431..c6d8389819d 100644 --- a/drivers/pinmux/CMakeLists.txt +++ b/drivers/pinmux/CMakeLists.txt @@ -3,7 +3,6 @@ # Board initialization zephyr_sources_ifdef(CONFIG_PINMUX_HSDK pinmux_hsdk.c) zephyr_sources_ifdef(CONFIG_PINMUX_INTEL_S1000 pinmux_intel_s1000.c) -zephyr_sources_ifdef(CONFIG_PINMUX_ITE_IT8XXX2 pinmux_ite_it8xxx2.c) zephyr_sources_ifdef(CONFIG_PINMUX_LPC11U6X pinmux_lpc11u6x.c) zephyr_sources_ifdef(CONFIG_PINMUX_MCUX pinmux_mcux.c) zephyr_sources_ifdef(CONFIG_PINMUX_MCUX_LPC pinmux_mcux_lpc.c) diff --git a/drivers/pinmux/Kconfig b/drivers/pinmux/Kconfig index a13c8d16f6f..4a3df42d2cb 100644 --- a/drivers/pinmux/Kconfig +++ b/drivers/pinmux/Kconfig @@ -30,8 +30,6 @@ source "drivers/pinmux/Kconfig.hsdk" source "drivers/pinmux/Kconfig.intel_s1000" -source "drivers/pinmux/Kconfig.it8xxx2" - source "drivers/pinmux/Kconfig.lpc11u6x" source "drivers/pinmux/Kconfig.mcux" diff --git a/drivers/pinmux/Kconfig.it8xxx2 b/drivers/pinmux/Kconfig.it8xxx2 deleted file mode 100644 index 927e6148379..00000000000 --- a/drivers/pinmux/Kconfig.it8xxx2 +++ /dev/null @@ -1,7 +0,0 @@ -# Copyright (c) 2020 ITE Corporation. All Rights Reserved. -# SPDX-License-Identifier: Apache-2.0 - -config PINMUX_ITE_IT8XXX2 - bool "IT8XXX2 pinmux driver" - help - Enable driver for the IT8XXX2 pinmux driver diff --git a/drivers/pinmux/pinmux_ite_it8xxx2.c b/drivers/pinmux/pinmux_ite_it8xxx2.c deleted file mode 100644 index faec19bf1cb..00000000000 --- a/drivers/pinmux/pinmux_ite_it8xxx2.c +++ /dev/null @@ -1,191 +0,0 @@ -/* - * Copyright (c) 2020 ITE Corporation. All Rights Reserved. - * - * SPDX-License-Identifier: Apache-2.0 - */ - -/** - * @brief PINMUX driver for the IT8xxx2 - */ - -#include -#include -#include -#include -#include - -#define DT_DRV_COMPAT ite_it8xxx2_pinmux - -#include -LOG_MODULE_REGISTER(pinmux_ite_it8xxx2, LOG_LEVEL_ERR); - -struct pinmux_it8xxx2_config { - /* gpio port control register (byte mapping to pin) */ - uintptr_t reg_gpcr; - /* function 3 general control register */ - uintptr_t func3_gcr[8]; - /* function 4 general control register */ - uintptr_t func4_gcr[8]; - /* function 3 enable mask */ - uint8_t func3_en_mask[8]; - /* function 4 enable mask */ - uint8_t func4_en_mask[8]; -}; - -static int pinmux_it8xxx2_set(const struct device *dev, - uint32_t pin, uint32_t func) -{ - const struct pinmux_it8xxx2_config *pinmux_config = dev->config; - - volatile uint8_t *reg_gpcr = - (uint8_t *)(pinmux_config->reg_gpcr + pin); - volatile uint8_t *reg_func3_gcr = - (uint8_t *)(pinmux_config->func3_gcr[pin]); - volatile uint8_t *reg_func4_gcr = - (uint8_t *)(pinmux_config->func4_gcr[pin]); - - if (pin >= IT8XXX2_PINMUX_PINS) { - return -EINVAL; - } - - /* Common settings for alternate function. */ - *reg_gpcr &= ~(GPCR_PORT_PIN_MODE_INPUT | - GPCR_PORT_PIN_MODE_OUTPUT); - - switch (func) { - case IT8XXX2_PINMUX_FUNC_1: - /* Func1: Alternate function has been set above. */ - break; - case IT8XXX2_PINMUX_FUNC_2: - /* Func2: WUI function: turn the pin into an input */ - *reg_gpcr |= GPCR_PORT_PIN_MODE_INPUT; - break; - case IT8XXX2_PINMUX_FUNC_3: - /* - * Func3: In addition to the alternate setting above, - * Func3 also need to set the general control. - */ - *reg_func3_gcr |= pinmux_config->func3_en_mask[pin]; - break; - case IT8XXX2_PINMUX_FUNC_4: - /* - * Func4: In addition to the alternate setting above, - * Func4 also need to set the general control. - */ - *reg_func4_gcr |= pinmux_config->func4_en_mask[pin]; - break; - default: - LOG_ERR("This function is not supported"); - return -EINVAL; - } - - return 0; -} - -static int pinmux_it8xxx2_get(const struct device *dev, - uint32_t pin, uint32_t *func) -{ - const struct pinmux_it8xxx2_config *pinmux_config = dev->config; - - volatile uint8_t *reg_gpcr = - (uint8_t *)(pinmux_config->reg_gpcr + pin); - - if (pin >= IT8XXX2_PINMUX_PINS || func == NULL) { - return -EINVAL; - } - - *func = (*reg_gpcr & (GPCR_PORT_PIN_MODE_INPUT | - GPCR_PORT_PIN_MODE_OUTPUT)) == GPCR_PORT_PIN_MODE_INPUT ? - IT8XXX2_PINMUX_FUNC_2 : IT8XXX2_PINMUX_FUNC_1; - - /* TODO: IT8XXX2_PINMUX_FUNC_3 & IT8XXX2_PINMUX_FUNC_4 */ - - return 0; -} - -static int pinmux_it8xxx2_pullup(const struct device *dev, - uint32_t pin, uint8_t func) -{ - const struct pinmux_it8xxx2_config *pinmux_config = dev->config; - - volatile uint8_t *reg_gpcr = - (uint8_t *)(pinmux_config->reg_gpcr + pin); - - if (func == PINMUX_PULLUP_ENABLE) { - *reg_gpcr = (*reg_gpcr | GPCR_PORT_PIN_MODE_PULLUP) & - ~GPCR_PORT_PIN_MODE_PULLDOWN; - } else if (func == PINMUX_PULLUP_DISABLE) { - *reg_gpcr &= ~(GPCR_PORT_PIN_MODE_PULLUP | - GPCR_PORT_PIN_MODE_PULLDOWN); - } else { - return -EINVAL; - } - - return 0; -} - -static int pinmux_it8xxx2_input(const struct device *dev, - uint32_t pin, uint8_t func) -{ - const struct pinmux_it8xxx2_config *pinmux_config = dev->config; - - volatile uint8_t *reg_gpcr = - (uint8_t *)(pinmux_config->reg_gpcr + pin); - - *reg_gpcr &= ~(GPCR_PORT_PIN_MODE_INPUT | - GPCR_PORT_PIN_MODE_OUTPUT); - - if (func == PINMUX_INPUT_ENABLED) { - *reg_gpcr |= GPCR_PORT_PIN_MODE_INPUT; - } else if (func == PINMUX_OUTPUT_ENABLED) { - *reg_gpcr |= GPCR_PORT_PIN_MODE_OUTPUT; - } else { - return -EINVAL; - } - - return 0; -} - -static int pinmux_it8xxx2_init(const struct device *dev) -{ - ARG_UNUSED(dev); - - /* - * The default value of LPCRSTEN is bit2:1 = 10b(GPD2) in GCR. - * If LPC reset is enabled on GPB7, we have to clear bit2:1 - * to 00b. - */ - IT8XXX2_GPIO_GCR &= ~(BIT(1) | BIT(2)); - - /* - * TODO: If UART2 swaps from bit2:1 to bit6:5 in H group, we - * have to set UART1PSEL = 1 in UART1PMR register. - */ - - return 0; -} - -static const struct pinmux_driver_api pinmux_it8xxx2_driver_api = { - .set = pinmux_it8xxx2_set, - .get = pinmux_it8xxx2_get, - .pullup = pinmux_it8xxx2_pullup, - .input = pinmux_it8xxx2_input, -}; - -#define PINMUX_ITE_INIT(inst) \ - static const struct pinmux_it8xxx2_config pinmux_it8xxx2_cfg_##inst = { \ - .reg_gpcr = DT_INST_REG_ADDR(inst), \ - .func3_gcr = DT_INST_PROP(inst, func3_gcr), \ - .func3_en_mask = DT_INST_PROP(inst, func3_en_mask), \ - .func4_gcr = DT_INST_PROP(inst, func4_gcr), \ - .func4_en_mask = DT_INST_PROP(inst, func4_en_mask), \ - }; \ - \ - DEVICE_DT_INST_DEFINE(inst, \ - &pinmux_it8xxx2_init, \ - NULL, NULL, &pinmux_it8xxx2_cfg_##inst, \ - PRE_KERNEL_1, \ - CONFIG_KERNEL_INIT_PRIORITY_DEFAULT, \ - &pinmux_it8xxx2_driver_api); - -DT_INST_FOREACH_STATUS_OKAY(PINMUX_ITE_INIT) diff --git a/dts/bindings/pinctrl/ite,it8xxx2-pinctrl-conf.yaml b/dts/bindings/pinctrl/ite,it8xxx2-pinctrl-conf.yaml deleted file mode 100644 index 1d0faac6286..00000000000 --- a/dts/bindings/pinctrl/ite,it8xxx2-pinctrl-conf.yaml +++ /dev/null @@ -1,13 +0,0 @@ -# Copyright (c) 2021 ITE Corporation. All Rights Reserved. -# SPDX-License-Identifier: Apache-2.0 - -description: ITE IT8XXX2 Pin-Mux Configuration - -compatible: "ite,it8xxx2-pinctrl-conf" -child-binding: - description: ITE Pinmux configuration child node - properties: - pinctrls: - type: phandle-array - required: true - description: Pin alternate function selection diff --git a/dts/bindings/pinctrl/ite,it8xxx2-pinmux.yaml b/dts/bindings/pinctrl/ite,it8xxx2-pinmux.yaml deleted file mode 100644 index 02956f87e90..00000000000 --- a/dts/bindings/pinctrl/ite,it8xxx2-pinmux.yaml +++ /dev/null @@ -1,32 +0,0 @@ -# Copyright (c) 2020 ITE Corporation. All Rights Reserved. -# SPDX-License-Identifier: Apache-2.0 - -description: ITE IT8XXX2 pinmux node - -compatible: "ite,it8xxx2-pinmux" - -include: base.yaml - -properties: - reg: - required: true - - func3_gcr: - type: array - required: true - - func3_en_mask: - type: array - required: true - - func4_gcr: - type: array - required: true - - func4_en_mask: - type: array - required: true - -pinctrl-cells: - - pin - - alt_func diff --git a/dts/riscv/it8xxx2-alts-map.dtsi b/dts/riscv/it8xxx2-alts-map.dtsi deleted file mode 100644 index 5a76c7a7aee..00000000000 --- a/dts/riscv/it8xxx2-alts-map.dtsi +++ /dev/null @@ -1,28 +0,0 @@ -/* - * Copyright (c) 2021 ITE Corporation. All Rights Reserved. - * - * SPDX-License-Identifier: Apache-2.0 - */ - -#include - -/ { - it8xxx2_alts_map { - compatible = "ite,it8xxx2-pinctrl-conf"; - - /* SHI alternate function */ - pinctrl_shi_mosi: shi_mosi { - pinctrls = <&pinmuxm 0 IT8XXX2_PINMUX_FUNC_1>; - }; - pinctrl_shi_miso: shi_miso { - pinctrls = <&pinmuxm 1 IT8XXX2_PINMUX_FUNC_1>; - }; - pinctrl_shi_clk: shi_clk { - pinctrls = <&pinmuxm 4 IT8XXX2_PINMUX_FUNC_1>; - }; - pinctrl_shi_cs: shi_cs { - pinctrls = <&pinmuxm 5 IT8XXX2_PINMUX_FUNC_1>; - }; - - }; -}; diff --git a/dts/riscv/it8xxx2.dtsi b/dts/riscv/it8xxx2.dtsi index a832965cd59..c858759fdc6 100644 --- a/dts/riscv/it8xxx2.dtsi +++ b/dts/riscv/it8xxx2.dtsi @@ -17,7 +17,6 @@ #include #include #include -#include "it8xxx2-alts-map.dtsi" #include "ite/it8xxx2-wuc-map.dtsi" / { @@ -326,188 +325,6 @@ }; }; - pinmuxa: pinmux@f01610 { - compatible = "ite,it8xxx2-pinmux"; - reg = <0x00f01610 0x0008>; - label = "PINMUXA"; - func3_gcr = ; - func3_en_mask = <0 0 0 0 - 0x02 0x02 0x10 0x0C >; - func4_gcr = ; - func4_en_mask = <0 0 0 0 - 0 0 0 0 >; - #pinctrl-cells = <2>; - }; - pinmuxb: pinmux@f01618 { - compatible = "ite,it8xxx2-pinmux"; - reg = <0x00f01618 0x0008>; - label = "PINMUXB"; - func3_gcr = <0xf016f5 0xf016f5 NO_FUNC NO_FUNC - NO_FUNC NO_FUNC NO_FUNC 0xf01600>; - func3_en_mask = <0x01 0x02 0 0 - 0 0 0 0x02 >; - func4_gcr = ; - func4_en_mask = <0 0 0 0 - 0 0 0 0x40 >; - #pinctrl-cells = <2>; - }; - pinmuxc: pinmux@f01620 { - compatible = "ite,it8xxx2-pinmux"; - reg = <0x00f01620 0x0008>; - label = "PINMUXC"; - func3_gcr = ; - func3_en_mask = <0 0 0 0x10 - 0 0x10 0 0x02 >; - func4_gcr = ; - func4_en_mask = <0 0 0 0 - 0 0 0 0x80 >; - #pinctrl-cells = <2>; - }; - pinmuxd: pinmux@f01628 { - compatible = "ite,it8xxx2-pinmux"; - reg = <0x00f01628 0x0008>; - label = "PINMUXD"; - func3_gcr = ; - func3_en_mask = <0 0 0 0 - 0 0x02 0 0 >; - func4_gcr = ; - func4_en_mask = <0 0 0 0 - 0 0 0 0 >; - #pinctrl-cells = <2>; - }; - pinmuxe: pinmux@f01630 { - compatible = "ite,it8xxx2-pinmux"; - reg = <0x00f01630 0x0008>; - label = "PINMUXE"; - func3_gcr = <0xf02032 NO_FUNC NO_FUNC NO_FUNC - NO_FUNC 0xf016f0 NO_FUNC 0xf02032>; - func3_en_mask = <0x01 0 0 0 - 0 0x08 0 0x01 >; - func4_gcr = <0xf016f3 NO_FUNC NO_FUNC NO_FUNC - NO_FUNC NO_FUNC NO_FUNC NO_FUNC >; - func4_en_mask = <0x01 0 0 0 - 0 0 0 0 >; - #pinctrl-cells = <2>; - }; - pinmuxf: pinmux@f01638 { - compatible = "ite,it8xxx2-pinmux"; - reg = <0x00f01638 0x0008>; - label = "PINMUXF"; - func3_gcr = ; - func3_en_mask = <0 0 0x02 0x02 - 0 0 0x10 0x10 >; - func4_gcr = ; - func4_en_mask = <0 0 0x40 0x40 - 0 0 0 0 >; - #pinctrl-cells = <2>; - }; - pinmuxg: pinmux@f01640 { - compatible = "ite,it8xxx2-pinmux"; - reg = <0x00f01640 0x0008>; - label = "PINMUXG"; - func3_gcr = <0xf016f0 0xf016f0 0xf016f0 NO_FUNC - NO_FUNC NO_FUNC 0xf016f0 NO_FUNC>; - func3_en_mask = <0x20 0x08 0x10 0 - 0 0 0x02 0 >; - func4_gcr = ; - func4_en_mask = <0 0 0 0 - 0 0 0 0 >; - #pinctrl-cells = <2>; - }; - pinmuxh: pinmux@f01648 { - compatible = "ite,it8xxx2-pinmux"; - reg = <0x00f01648 0x0008>; - label = "PINMUXH"; - func3_gcr = ; - func3_en_mask = <0 0x20 0x20 0 - 0 0x04 0x08 0 >; - func4_gcr = ; - func4_en_mask = <0 0x04 0x08 0 - 0 0 0 0 >; - #pinctrl-cells = <2>; - }; - pinmuxi: pinmux@f01650 { - compatible = "ite,it8xxx2-pinmux"; - reg = <0x00f01650 0x0008>; - label = "PINMUXI"; - func3_gcr = ; - func3_en_mask = <0 0 0 0 - 0 0x08 0x08 0x08 >; - func4_gcr = ; - func4_en_mask = <0 0 0 0 - 0 0 0 0 >; - #pinctrl-cells = <2>; - }; - pinmuxj: pinmux@f01658 { - compatible = "ite,it8xxx2-pinmux"; - reg = <0x00f01658 0x0008>; - label = "PINMUXJ"; - func3_gcr = <0xf016f4 NO_FUNC 0xf016f4 0xf016f4 - 0xf016f0 0xf016f0 NO_FUNC NO_FUNC>; - func3_en_mask = <0x01 0 0x01 0x02 - 0x02 0x03 0 0 >; - func4_gcr = ; - func4_en_mask = <0 0 0 0 - 0 0 0 0 >; - #pinctrl-cells = <2>; - }; - pinmuxk: pinmux@f01690 { - compatible = "ite,it8xxx2-pinmux"; - reg = <0x00f01690 0x0008>; - label = "PINMUXK"; - func3_gcr = ; - func3_en_mask = <0 0 0 0 - 0 0 0 0 >; - func4_gcr = ; - func4_en_mask = <0 0 0 0 - 0 0 0 0 >; - #pinctrl-cells = <2>; - }; - pinmuxl: pinmux@f01698 { - compatible = "ite,it8xxx2-pinmux"; - reg = <0x00f01698 0x0008>; - label = "PINMUXL"; - func3_gcr = ; - func3_en_mask = <0 0 0 0 - 0 0 0 0 >; - func4_gcr = ; - func4_en_mask = <0 0 0 0 - 0 0 0 0 >; - #pinctrl-cells = <2>; - }; - pinmuxm: pinmux@f016a0 { - compatible = "ite,it8xxx2-pinmux"; - reg = <0x00f016a0 0x0008>; - label = "PINMUXM"; - func3_gcr = ; - func3_en_mask = <0 0 0 0 - 0 0 0 0 >; - func4_gcr = ; - func4_en_mask = <0 0 0 0 - 0 0 0 0 >; - #pinctrl-cells = <2>; - }; sram0: memory@80101000 { compatible = "mmio-sram"; reg = <0x80101000 DT_SIZE_K(56)>; diff --git a/dts/riscv/ite/it8xxx2-pinctrl-map.dtsi b/dts/riscv/ite/it8xxx2-pinctrl-map.dtsi index 07b6943322b..2f439f81267 100644 --- a/dts/riscv/ite/it8xxx2-pinctrl-map.dtsi +++ b/dts/riscv/ite/it8xxx2-pinctrl-map.dtsi @@ -130,6 +130,20 @@ pinmuxs = <&pinctrla 7 IT8XXX2_ALT_FUNC_1>; }; + /* SHI alternate function */ + shi_mosi_gpm0_default: shi_mosi_gpm0_default { + pinmuxs = <&pinctrlm 0 IT8XXX2_ALT_FUNC_1>; + }; + shi_miso_gpm1_default: shi_miso_gpm1_default { + pinmuxs = <&pinctrlm 1 IT8XXX2_ALT_FUNC_1>; + }; + shi_clk_gpm4_default: shi_clk_gpm4_default { + pinmuxs = <&pinctrlm 4 IT8XXX2_ALT_FUNC_1>; + }; + shi_cs_gpm5_default: shi_cs_gpm5_default { + pinmuxs = <&pinctrlm 5 IT8XXX2_ALT_FUNC_1>; + }; + /* Tachometer alternate function */ tach0a_gpd6_default: tach0a_gpd6_default { pinmuxs = <&pinctrld 6 IT8XXX2_ALT_FUNC_1>; diff --git a/include/zephyr/dt-bindings/pinctrl/it8xxx2-pinctrl.h b/include/zephyr/dt-bindings/pinctrl/it8xxx2-pinctrl.h index 39f4531ac4f..ab86c006efa 100644 --- a/include/zephyr/dt-bindings/pinctrl/it8xxx2-pinctrl.h +++ b/include/zephyr/dt-bindings/pinctrl/it8xxx2-pinctrl.h @@ -8,13 +8,6 @@ #define NO_FUNC 0 -/* PINMUX config */ -#define IT8XXX2_PINMUX_FUNC_1 0 -#define IT8XXX2_PINMUX_FUNC_2 1 -#define IT8XXX2_PINMUX_FUNC_3 2 -#define IT8XXX2_PINMUX_FUNC_4 3 -#define IT8XXX2_PINMUX_PINS 8 - /** * @brief PIN alternate function. */ diff --git a/soc/riscv/riscv-ite/it8xxx2/Kconfig.defconfig.series b/soc/riscv/riscv-ite/it8xxx2/Kconfig.defconfig.series index 9aa04f38b43..1332a8f1956 100644 --- a/soc/riscv/riscv-ite/it8xxx2/Kconfig.defconfig.series +++ b/soc/riscv/riscv-ite/it8xxx2/Kconfig.defconfig.series @@ -43,10 +43,6 @@ config UART_ITE_IT8XXX2 config RISCV_HAS_CPU_IDLE default y -config PINMUX_ITE_IT8XXX2 - default y - depends on PINMUX - config WDT_ITE_IT8XXX2 default y depends on WATCHDOG