arch: arm: Move header files to common location
These files will be used for Cortex-R support as well. Signed-off-by: Bradley Bolen <bbolen@lexmark.com>
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Bradley Bolen
Ioannis Glaropoulos
parent
e788290522
commit
4cee0eecdc
10 changed files with 15 additions and 14 deletions
162
include/arch/arm/irq.h
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162
include/arch/arm/irq.h
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/*
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* Copyright (c) 2013-2014 Wind River Systems, Inc.
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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/**
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* @file
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* @brief Cortex-M public interrupt handling
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*
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* ARM-specific kernel interrupt handling interface. Included by arm/arch.h.
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*/
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#ifndef ZEPHYR_INCLUDE_ARCH_ARM_CORTEX_M_IRQ_H_
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#define ZEPHYR_INCLUDE_ARCH_ARM_CORTEX_M_IRQ_H_
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#include <irq.h>
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#include <sw_isr_table.h>
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#include <stdbool.h>
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#ifdef __cplusplus
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extern "C" {
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#endif
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#ifdef _ASMLANGUAGE
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GTEXT(_IntExit);
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GTEXT(z_arch_irq_enable)
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GTEXT(z_arch_irq_disable)
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GTEXT(z_arch_irq_is_enabled)
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#else
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extern void z_arch_irq_enable(unsigned int irq);
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extern void z_arch_irq_disable(unsigned int irq);
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extern int z_arch_irq_is_enabled(unsigned int irq);
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extern void _IntExit(void);
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/* macros convert value of it's argument to a string */
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#define DO_TOSTR(s) #s
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#define TOSTR(s) DO_TOSTR(s)
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/* concatenate the values of the arguments into one */
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#define DO_CONCAT(x, y) x ## y
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#define CONCAT(x, y) DO_CONCAT(x, y)
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/* internal routine documented in C file, needed by IRQ_CONNECT() macro */
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extern void z_irq_priority_set(unsigned int irq, unsigned int prio,
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u32_t flags);
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/* Flags for use with IRQ_CONNECT() */
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#ifdef CONFIG_ZERO_LATENCY_IRQS
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/**
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* Set this interrupt up as a zero-latency IRQ. It has a fixed hardware
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* priority level (discarding what was supplied in the interrupt's priority
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* argument), and will run even if irq_lock() is active. Be careful!
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*/
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#define IRQ_ZERO_LATENCY BIT(0)
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#endif
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/**
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* Configure a static interrupt.
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*
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* All arguments must be computable by the compiler at build time.
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*
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* Z_ISR_DECLARE will populate the .intList section with the interrupt's
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* parameters, which will then be used by gen_irq_tables.py to create
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* the vector table and the software ISR table. This is all done at
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* build-time.
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*
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* We additionally set the priority in the interrupt controller at
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* runtime.
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*
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* @param irq_p IRQ line number
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* @param priority_p Interrupt priority
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* @param isr_p Interrupt service routine
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* @param isr_param_p ISR parameter
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* @param flags_p IRQ options
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*
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* @return The vector assigned to this interrupt
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*/
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#define Z_ARCH_IRQ_CONNECT(irq_p, priority_p, isr_p, isr_param_p, flags_p) \
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({ \
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Z_ISR_DECLARE(irq_p, 0, isr_p, isr_param_p); \
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z_irq_priority_set(irq_p, priority_p, flags_p); \
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irq_p; \
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})
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/**
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* Configure a 'direct' static interrupt.
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*
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* See include/irq.h for details.
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* All arguments must be computable at build time.
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*/
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#define Z_ARCH_IRQ_DIRECT_CONNECT(irq_p, priority_p, isr_p, flags_p) \
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({ \
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Z_ISR_DECLARE(irq_p, ISR_FLAG_DIRECT, isr_p, NULL); \
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z_irq_priority_set(irq_p, priority_p, flags_p); \
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irq_p; \
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})
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/* FIXME prefer these inline, but see GH-3056 */
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#ifdef CONFIG_SYS_POWER_MANAGEMENT
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extern void _arch_isr_direct_pm(void);
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#define Z_ARCH_ISR_DIRECT_PM() _arch_isr_direct_pm()
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#else
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#define Z_ARCH_ISR_DIRECT_PM() do { } while (false)
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#endif
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#define Z_ARCH_ISR_DIRECT_HEADER() z_arch_isr_direct_header()
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extern void z_arch_isr_direct_header(void);
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#define Z_ARCH_ISR_DIRECT_FOOTER(swap) z_arch_isr_direct_footer(swap)
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/* arch/arm/core/exc_exit.S */
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extern void _IntExit(void);
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#ifdef CONFIG_TRACING
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extern void z_sys_trace_isr_exit(void);
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#endif
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static inline void z_arch_isr_direct_footer(int maybe_swap)
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{
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#ifdef CONFIG_TRACING
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z_sys_trace_isr_exit();
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#endif
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if (maybe_swap) {
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_IntExit();
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}
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}
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#define Z_ARCH_ISR_DIRECT_DECLARE(name) \
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static inline int name##_body(void); \
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__attribute__ ((interrupt ("IRQ"))) void name(void) \
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{ \
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int check_reschedule; \
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ISR_DIRECT_HEADER(); \
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check_reschedule = name##_body(); \
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ISR_DIRECT_FOOTER(check_reschedule); \
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} \
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static inline int name##_body(void)
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/* Spurious interrupt handler. Throws an error if called */
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extern void z_irq_spurious(void *unused);
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#ifdef CONFIG_GEN_SW_ISR_TABLE
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/* Architecture-specific common entry point for interrupts from the vector
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* table. Most likely implemented in assembly. Looks up the correct handler
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* and parameter from the _sw_isr_table and executes it.
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*/
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extern void _isr_wrapper(void);
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#endif
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#endif /* _ASMLANGUAGE */
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#ifdef __cplusplus
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}
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#endif
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#endif /* ZEPHYR_INCLUDE_ARCH_ARM_CORTEX_M_IRQ_H_ */
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