From 4cac6583f7350645ec288a917b15a7935b9d80a4 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Benjamin=20Cab=C3=A9?= Date: Sat, 7 Jun 2025 21:54:39 +0200 Subject: [PATCH] soc: sensry: fix irq enable/disable MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit SET/CLR registers are write-only so trying to read/modify/write is inefficient & illegal Signed-off-by: Benjamin Cabé --- soc/sensry/ganymed/sy1xx/common/soc.c | 9 +++------ 1 file changed, 3 insertions(+), 6 deletions(-) diff --git a/soc/sensry/ganymed/sy1xx/common/soc.c b/soc/sensry/ganymed/sy1xx/common/soc.c index 18cb2ea309d..07fafd19b9f 100644 --- a/soc/sensry/ganymed/sy1xx/common/soc.c +++ b/soc/sensry/ganymed/sy1xx/common/soc.c @@ -25,6 +25,7 @@ LOG_MODULE_REGISTER(soc); #define SY1XX_ARCHI_ITC_ACK_SET_OFFSET 0x1c #define SY1XX_ARCHI_ITC_ACK_CLR_OFFSET 0x20 #define SY1XX_ARCHI_ITC_FIFO_OFFSET 0x24 +#define SY1XX_ARCHI_ITC_IRQ_MASK 0x1f void sys_arch_reboot(int type) { @@ -51,17 +52,13 @@ void riscv_clic_irq_priority_set(uint32_t irq, uint32_t prio, uint32_t flags) void soc_enable_irq(uint32_t idx) { - uint32_t current = sys_read32(SY1XX_ARCHI_FC_ITC_ADDR + SY1XX_ARCHI_ITC_MASK_SET_OFFSET); - - sys_write32(current | (1 << (idx & 0x1f)), + sys_write32(BIT(idx & SY1XX_ARCHI_ITC_IRQ_MASK), SY1XX_ARCHI_FC_ITC_ADDR + SY1XX_ARCHI_ITC_MASK_SET_OFFSET); } void soc_disable_irq(uint32_t idx) { - uint32_t current = sys_read32(SY1XX_ARCHI_FC_ITC_ADDR + SY1XX_ARCHI_ITC_MASK_CLR_OFFSET); - - sys_write32(current & (~(1 << (idx & 0x1f))), + sys_write32(BIT(idx & SY1XX_ARCHI_ITC_IRQ_MASK), SY1XX_ARCHI_FC_ITC_ADDR + SY1XX_ARCHI_ITC_MASK_CLR_OFFSET); }