diff --git a/boards/arm/nucleo_l412rb_p/nucleo_l412rb_p.dts b/boards/arm/nucleo_l412rb_p/nucleo_l412rb_p.dts
index d18a900c553..55f36e7d9da 100644
--- a/boards/arm/nucleo_l412rb_p/nucleo_l412rb_p.dts
+++ b/boards/arm/nucleo_l412rb_p/nucleo_l412rb_p.dts
@@ -42,6 +42,27 @@
 	};
 };
 
+&clk_hsi {
+	status = "okay";
+};
+
+&pll {
+	div-m = <1>;
+	mul-n = <10>;
+	div-q = <2>;
+	div-r = <2>;
+	clocks = <&clk_hsi>;
+	status = "okay";
+};
+
+&rcc {
+	clocks = <&pll>;
+	clock-frequency = <DT_FREQ_M(80)>;
+	ahb-prescaler = <1>;
+	apb1-prescaler = <1>;
+	apb2-prescaler = <1>;
+};
+
 &lpuart1 {
 	pinctrl-0 = <&lpuart1_tx_pa2 &lpuart1_rx_pa3>;
 	current-speed = <115200>;
diff --git a/boards/arm/nucleo_l412rb_p/nucleo_l412rb_p_defconfig b/boards/arm/nucleo_l412rb_p/nucleo_l412rb_p_defconfig
index 241738e3c66..3477183dbe2 100644
--- a/boards/arm/nucleo_l412rb_p/nucleo_l412rb_p_defconfig
+++ b/boards/arm/nucleo_l412rb_p/nucleo_l412rb_p_defconfig
@@ -2,8 +2,6 @@
 
 CONFIG_SOC_SERIES_STM32L4X=y
 CONFIG_SOC_STM32L412XX=y
-# 80MHz system clock
-CONFIG_SYS_CLOCK_HW_CYCLES_PER_SEC=80000000
 
 # Enable MPU
 CONFIG_ARM_MPU=y
@@ -24,17 +22,5 @@ CONFIG_PINMUX=y
 # enable GPIO
 CONFIG_GPIO=y
 
-# clock configuration
+# Enable Clocks
 CONFIG_CLOCK_CONTROL=y
-# SYSCLK selection
-CONFIG_CLOCK_STM32_SYSCLK_SRC_PLL=y
-# PLL configuration
-CONFIG_CLOCK_STM32_PLL_SRC_HSI=y
-# produce 80MHz clock at PLL output
-CONFIG_CLOCK_STM32_PLL_M_DIVISOR=1
-CONFIG_CLOCK_STM32_PLL_N_MULTIPLIER=10
-CONFIG_CLOCK_STM32_PLL_Q_DIVISOR=2
-CONFIG_CLOCK_STM32_PLL_R_DIVISOR=2
-CONFIG_CLOCK_STM32_AHB_PRESCALER=1
-CONFIG_CLOCK_STM32_APB1_PRESCALER=1
-CONFIG_CLOCK_STM32_APB2_PRESCALER=1