dts: arm/silabs: add dma node for efr32(mg2x/bg2x)

Update dts for efr32mg2x and efr32bg2x board that support silabs ldma

Signed-off-by: Martin Hoff <martin.hoff@silabs.com>
This commit is contained in:
Martin Hoff 2024-12-05 15:04:57 +01:00 committed by Benjamin Cabé
commit 4c3c67bf24
6 changed files with 60 additions and 0 deletions

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@ -54,6 +54,10 @@
clocks = <&cmu CLOCK_GPIO CLOCK_BRANCH_PCLK>;
};
&dma0 {
interrupts = <21 0>;
};
&i2c0 {
interrupts = <27 0>;
clocks = <&cmu CLOCK_I2C0 CLOCK_BRANCH_LSPCLK>;

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@ -103,3 +103,7 @@
&dcdc {
interrupts = <8 0>;
};
&dma0 {
interrupts = <26 0>;
};

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@ -343,6 +343,14 @@
reg = <0x5003c440 0xbc0>;
};
dma0: dma@40040000{
compatible = "silabs,ldma";
reg = <0x40040000 0x4000>;
#dma-cells = <3>;
dma_channels = <8>;
status = "disabled";
};
wdog0: wdog@4a018000 {
compatible = "silabs,gecko-wdog";
reg = <0x4A018000 0x3028>;

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@ -329,6 +329,15 @@
status = "okay";
};
dma0: dma@40040000{
compatible = "silabs,ldma";
reg = <0x40040000 0x4000>;
interrupts = <21 0>;
#dma-cells = <3>;
dma_channels = <8>;
status = "disabled";
};
wdog0: wdog@5a018000 {
compatible = "silabs,gecko-wdog";
reg = <0x5a018000 0x2C>;

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@ -394,6 +394,15 @@
reg = <0x5003c440 0xbc0>;
};
dma0: dma@40040000 {
compatible = "silabs,ldma";
reg = <0x40040000 0x4000>;
interrupts = <21 0>;
#dma-cells = <3>;
dma_channels = <8>;
status = "disabled";
};
wdog0: wdog@5b004000 {
compatible = "silabs,gecko-wdog";
reg = <0x5b004000 0x2C>;

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@ -0,0 +1,26 @@
# Copyright (c) 2024 Silicon Laboratories Inc.
# SPDX-License-Identifier: Apache-2.0
description: |
Silabs LDMA controller
The Silabs LDMA is a general-purpose direct memory access controller
capable of supporting 8 independent DMA channels. It supports specific
functions like scatter-gather.
It is present on silabs radio board devices like EFR32xG21
compatible: "silabs,ldma"
include: dma-controller.yaml
properties:
reg:
required: true
interrupts:
required: true
dma_channels:
type: int
required: true