dts: arm/silabs: add dma node for efr32(mg2x/bg2x)
Update dts for efr32mg2x and efr32bg2x board that support silabs ldma Signed-off-by: Martin Hoff <martin.hoff@silabs.com>
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6 changed files with 60 additions and 0 deletions
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@ -54,6 +54,10 @@
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clocks = <&cmu CLOCK_GPIO CLOCK_BRANCH_PCLK>;
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};
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&dma0 {
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interrupts = <21 0>;
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};
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&i2c0 {
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interrupts = <27 0>;
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clocks = <&cmu CLOCK_I2C0 CLOCK_BRANCH_LSPCLK>;
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@ -103,3 +103,7 @@
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&dcdc {
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interrupts = <8 0>;
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};
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&dma0 {
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interrupts = <26 0>;
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};
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@ -343,6 +343,14 @@
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reg = <0x5003c440 0xbc0>;
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};
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dma0: dma@40040000{
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compatible = "silabs,ldma";
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reg = <0x40040000 0x4000>;
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#dma-cells = <3>;
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dma_channels = <8>;
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status = "disabled";
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};
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wdog0: wdog@4a018000 {
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compatible = "silabs,gecko-wdog";
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reg = <0x4A018000 0x3028>;
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@ -329,6 +329,15 @@
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status = "okay";
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};
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dma0: dma@40040000{
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compatible = "silabs,ldma";
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reg = <0x40040000 0x4000>;
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interrupts = <21 0>;
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#dma-cells = <3>;
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dma_channels = <8>;
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status = "disabled";
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};
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wdog0: wdog@5a018000 {
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compatible = "silabs,gecko-wdog";
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reg = <0x5a018000 0x2C>;
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@ -394,6 +394,15 @@
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reg = <0x5003c440 0xbc0>;
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};
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dma0: dma@40040000 {
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compatible = "silabs,ldma";
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reg = <0x40040000 0x4000>;
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interrupts = <21 0>;
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#dma-cells = <3>;
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dma_channels = <8>;
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status = "disabled";
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};
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wdog0: wdog@5b004000 {
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compatible = "silabs,gecko-wdog";
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reg = <0x5b004000 0x2C>;
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26
dts/bindings/dma/silabs,ldma.yaml
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26
dts/bindings/dma/silabs,ldma.yaml
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@ -0,0 +1,26 @@
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# Copyright (c) 2024 Silicon Laboratories Inc.
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# SPDX-License-Identifier: Apache-2.0
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description: |
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Silabs LDMA controller
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The Silabs LDMA is a general-purpose direct memory access controller
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capable of supporting 8 independent DMA channels. It supports specific
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functions like scatter-gather.
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It is present on silabs radio board devices like EFR32xG21
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compatible: "silabs,ldma"
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include: dma-controller.yaml
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properties:
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reg:
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required: true
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interrupts:
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required: true
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dma_channels:
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type: int
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required: true
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