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style: add braces around if/while statements

Browse source 
Per guidelines, all statements should have braces around them. We do not
have a CI check for this, so a few went in unnoticed.

Signed-off-by: Anas Nashif <anas.nashif@intel.com>
This commit is contained in:
Anas Nashif 2019-06-04 10:52:23 -04:00 • committed by Carles Cufí
commit 4c32258606
63 changed files with 281 additions and 195 deletions
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3
arch/riscv32/core/fatal.c
View file

@ -105,9 +105,10 @@ FUNC_NORETURN void z_NanoFatalErrorHandler(unsigned int reason,
z_SysFatalErrorHandler(reason, esf);
/* spin forever */
for (;;)
for (;;) {
__asm__ volatile("nop");
}
}
/**

3
arch/riscv32/core/irq_offload.c
View file

@ -21,8 +21,9 @@ void z_irq_do_offload(void)
{
irq_offload_routine_t tmp;
if (!_offload_routine)
if (!_offload_routine) {
return;
}
tmp = _offload_routine;
_offload_routine = NULL;

3
arch/x86_64/core/xuk-stub16.c
View file

@ -56,8 +56,9 @@ void _start16(void)
*/
volatile unsigned short *vga = (unsigned short *)0xb8000;
for (int i = 0; i < 240; i++)
for (int i = 0; i < 240; i++) {
vga[i] = 0xcc20;
}
/* Spin again waiting on the BSP processor to give us a stack. We
* won't use it until the entry code of stub32, but we want to

12
drivers/adc/adc_intel_quark_d2000.c
View file

@ -136,8 +136,8 @@ static void adc_quark_d2000_set_mode(struct device *dev, int mode)
/* Set mode and wait for change */
adc_regs->op_mode = mode;
while ((adc_regs->op_mode & ADC_OP_MODE_OM_MASK) != mode)
;
while ((adc_regs->op_mode & ADC_OP_MODE_OM_MASK) != mode) {
}
/* Perform a dummy conversion if going into normal mode */
if (mode >= ADC_MODE_NORM_CAL) {
@ -149,8 +149,8 @@ static void adc_quark_d2000_set_mode(struct device *dev, int mode)
/* run dummy conversion and wait for completion */
adc_regs->cmd = (ADC_CMD_IE | ADC_CMD_START_SINGLE);
while (!(adc_regs->intr_status & ADC_INTR_STATUS_CC))
;
while (!(adc_regs->intr_status & ADC_INTR_STATUS_CC)) {
}
/* flush FIFO */
adc_regs->sample = ADC_FIFO_CLEAR;
@ -176,8 +176,8 @@ static void adc_quark_d2000_goto_normal_mode(struct device *dev)
/* start the calibration and wait for completion */
adc_regs->cmd = (ADC_CMD_IE | ADC_CMD_START_CAL);
while (!(adc_regs->intr_status & ADC_INTR_STATUS_CC))
;
while (!(adc_regs->intr_status & ADC_INTR_STATUS_CC)) {
}
/* clear command complete interrupt */
adc_regs->intr_status = ADC_INTR_STATUS_CC;

8
drivers/adc/adc_stm32.c
View file

@ -460,8 +460,8 @@ static void adc_stm32_calib(struct device *dev)
defined(CONFIG_SOC_SERIES_STM32L0X)
LL_ADC_StartCalibration(adc);
#endif
while (LL_ADC_IsCalibrationOnGoing(adc))
;
while (LL_ADC_IsCalibrationOnGoing(adc)) {
}
}
#endif
@ -560,8 +560,8 @@ static int adc_stm32_init(struct device *dev)
wait_cycles = CONFIG_SYS_CLOCK_HW_CYCLES_PER_SEC / adc_rate *
LL_ADC_DELAY_CALIB_ENABLE_ADC_CYCLES;
for (int i = wait_cycles; i >= 0; i--)
;
for (int i = wait_cycles; i >= 0; i--) {
}
#endif
LL_ADC_Enable(adc);

30
drivers/audio/intel_dmic.c
View file

@ -157,10 +157,11 @@ int find_equal_int16(s16_t idx[], s16_t vec[], int n, int vec_length,
for (i = 0; i < vec_length; i++) {
if (vec[i] == n) {
idx[nresults++] = i;
if (nresults == max_results)
if (nresults == max_results) {
break;
}
}
}
return nresults;
}
@ -171,8 +172,9 @@ s16_t find_min_int16(s16_t vec[], int vec_length)
int i;
int min = vec[0];
for (i = 1; i < vec_length; i++)
for (i = 1; i < vec_length; i++) {
min = (vec[i] < min) ? vec[i] : min;
}
return min;
}
@ -418,8 +420,9 @@ static struct pdm_decim *get_fir(struct dmic_configuration *cfg, int mfir)
struct pdm_decim *fir = NULL;
struct pdm_decim **fir_list;
if (mfir <= 0)
if (mfir <= 0) {
return fir;
}
cic_fs = DMIC_HW_IOCLK / cfg->clkdiv / cfg->mcic;
fs = cic_fs / mfir;
@ -467,8 +470,9 @@ static int fir_coef_scale(s32_t *fir_scale, int *fir_shift, int add_shift,
/* Scale max. tap value with FIR gain. */
new_amax = Q_MULTSR_32X32((s64_t)amax, fir_gain, 31,
DMIC_FIR_SCALE_Q, DMIC_FIR_SCALE_Q);
if (new_amax <= 0)
if (new_amax <= 0) {
return -EINVAL;
}
/* Get left shifts count to normalize the fractional value as 32 bit.
* We need right shifts count for scaling so need to invert. The
@ -483,14 +487,16 @@ static int fir_coef_scale(s32_t *fir_scale, int *fir_shift, int add_shift,
*/
*fir_shift = -shift + add_shift;
if (*fir_shift < DMIC_HW_FIR_SHIFT_MIN ||
*fir_shift > DMIC_HW_FIR_SHIFT_MAX)
*fir_shift > DMIC_HW_FIR_SHIFT_MAX) {
return -EINVAL;
}
/* Compensate shift into FIR coef scaler and store as Q4.20. */
if (shift < 0)
if (shift < 0) {
*fir_scale = (fir_gain << -shift);
else
} else {
*fir_scale = (fir_gain >> shift);
}
return 0;
}
@ -541,10 +547,11 @@ static int select_mode(struct dmic_configuration *cfg,
* factor in 1st element. If FIR A is not used get decimation factors
* from FIR B instead.
*/
if (modes->mfir_a[0] > 0)
if (modes->mfir_a[0] > 0) {
mfir = modes->mfir_a;
else
} else {
mfir = modes->mfir_b;
}
mmin = find_min_int16(mfir, modes->num_of_modes);
count = find_equal_int16(idx, mfir, mmin, modes->num_of_modes, 0);
@ -599,10 +606,11 @@ static int select_mode(struct dmic_configuration *cfg,
* values.
*/
fir_in_max = (1 << (DMIC_HW_BITS_FIR_INPUT - 1));
if (cfg->cic_shift >= 0)
if (cfg->cic_shift >= 0) {
cic_out_max = g_cic >> cfg->cic_shift;
else
} else {
cic_out_max = g_cic << -cfg->cic_shift;
}
gain_to_fir = (s32_t)((((s64_t)fir_in_max) << DMIC_FIR_SCALE_Q) /
cic_out_max);

10
drivers/bluetooth/hci/ipm_stm32wb.c
View file

@ -302,8 +302,9 @@ static void start_ble_rf(void)
/* Select LSE clock */
LL_RCC_LSE_Enable();
while (!LL_RCC_LSE_IsReady())
;
while (!LL_RCC_LSE_IsReady()) {
}
/* Select wakeup source of BLE RF */
LL_RCC_SetRFWKPClockSource(LL_RCC_RFWKP_CLKSOURCE_LSE);
LL_RCC_SetRTCClockSource(LL_RCC_RTC_CLKSOURCE_LSE);
@ -312,8 +313,9 @@ static void start_ble_rf(void)
LL_RCC_LSI1_Disable();
/* Set RNG on HSI48 */
LL_RCC_HSI48_Enable();
while (!LL_RCC_HSI48_IsReady())
;
while (!LL_RCC_HSI48_IsReady()) {
}
LL_RCC_SetCLK48ClockSource(LL_RCC_CLK48_CLKSOURCE_HSI48);
}

9
drivers/counter/counter_ll_stm32_rtc.c
View file

@ -269,8 +269,9 @@ static int rtc_stm32_init(struct device *dev)
#if defined(CONFIG_COUNTER_RTC_STM32_CLOCK_LSI)
LL_RCC_LSI_Enable();
while (LL_RCC_LSI_IsReady() != 1)
;
while (LL_RCC_LSI_IsReady() != 1) {
}
LL_RCC_SetRTCClockSource(LL_RCC_RTC_CLKSOURCE_LSI);
#else /* CONFIG_COUNTER_RTC_STM32_CLOCK_LSE */
@ -286,8 +287,8 @@ static int rtc_stm32_init(struct device *dev)
LL_RCC_LSE_Enable();
/* Wait until LSE is ready */
while (LL_RCC_LSE_IsReady() != 1)
;
while (LL_RCC_LSE_IsReady() != 1) {
}
LL_RCC_SetRTCClockSource(LL_RCC_RTC_CLKSOURCE_LSE);

3
drivers/dma/dma_stm32f4x.c
View file

@ -508,8 +508,9 @@ static int dma_stm32_stop(struct device *dev, u32_t id)
/* Disable stream */
ret = dma_stm32_disable_stream(ddata, id);
if (ret)
if (ret) {
return ret;
}
/* Clear remanent IRQs from previous transfers */
irqstatus = dma_stm32_irq_status(ddata, id);

4
drivers/flash/flash_stm32.c
View file

@ -45,8 +45,8 @@ static inline void flash_stm32_sem_take(struct device *dev)
{
#ifdef CONFIG_SOC_SERIES_STM32WBX
while (LL_HSEM_1StepLock(HSEM, CFG_HW_FLASH_SEMID))
;
while (LL_HSEM_1StepLock(HSEM, CFG_HW_FLASH_SEMID)) {
}
#endif /* CONFIG_SOC_SERIES_STM32WBX */
k_sem_take(&FLASH_STM32_PRIV(dev)->sem, K_FOREVER);

1
drivers/flash/soc_flash_nrf.c
View file

@ -128,7 +128,6 @@ static inline bool is_addr_valid(off_t addr, size_t len)
static void nvmc_wait_ready(void)
{
while (!nrfx_nvmc_write_done_check()) {
;
}
}

3
drivers/gpio/gpio_cc13xx_cc26xx.c
View file

@ -29,8 +29,9 @@ static int gpio_cc13xx_cc26xx_config(struct device *port, int access_op,
{
u32_t config;
if (access_op != GPIO_ACCESS_BY_PIN)
if (access_op != GPIO_ACCESS_BY_PIN) {
return -ENOTSUP;
}
__ASSERT_NO_MSG(pin < NUM_IO_MAX);

5
drivers/gpio/gpio_pcal9535a.c
View file

@ -60,11 +60,12 @@ static inline int has_i2c_master(struct device *dev)
(struct gpio_pcal9535a_drv_data * const)dev->driver_data;
struct device * const i2c_master = drv_data->i2c_master;
if (i2c_master)
if (i2c_master) {
return 1;
else
} else {
return 0;
}
}
/**
* @brief Read both port 0 and port 1 registers of certain register function.

71
drivers/gpio/gpio_sifive.c
View file

@ -79,15 +79,16 @@ static void gpio_sifive_irq_handler(void *arg)
* to indicate to GPIO controller that interrupt for the corresponding
* pin has been handled.
*/
if (gpio->rise_ip & pin_mask)
if (gpio->rise_ip & pin_mask) {
gpio->rise_ip = pin_mask;
else if (gpio->fall_ip & pin_mask)
} else if (gpio->fall_ip & pin_mask) {
gpio->fall_ip = pin_mask;
else if (gpio->high_ip & pin_mask)
} else if (gpio->high_ip & pin_mask) {
gpio->high_ip = pin_mask;
else if (gpio->low_ip & pin_mask)
} else if (gpio->low_ip & pin_mask) {
gpio->low_ip = pin_mask;
}
}
/**
* @brief Configure pin
@ -106,11 +107,13 @@ static int gpio_sifive_config(struct device *dev,
{
volatile struct gpio_sifive_t *gpio = DEV_GPIO(dev);
if (access_op != GPIO_ACCESS_BY_PIN)
if (access_op != GPIO_ACCESS_BY_PIN) {
return -ENOTSUP;
}
if (pin >= SIFIVE_PINMUX_PINS)
if (pin >= SIFIVE_PINMUX_PINS) {
return -EINVAL;
}
/* Configure gpio direction */
if (flags & GPIO_DIR_OUT) {
@ -121,30 +124,34 @@ static int gpio_sifive_config(struct device *dev,
* Account for polarity only for GPIO_DIR_OUT.
* invert register handles only output gpios
*/
if (flags & GPIO_POL_INV)
if (flags & GPIO_POL_INV) {
gpio->invert |= BIT(pin);
else
} else {
gpio->invert &= ~BIT(pin);
}
} else {
gpio->out_en &= ~BIT(pin);
gpio->in_en |= BIT(pin);
/* Polarity inversion is not supported for input gpio */
if (flags & GPIO_POL_INV)
if (flags & GPIO_POL_INV) {
return -EINVAL;
}
/*
* Pull-up can be configured only for input gpios.
* Only Pull-up can be enabled or disabled.
*/
if ((flags & GPIO_PUD_MASK) == GPIO_PUD_PULL_DOWN)
if ((flags & GPIO_PUD_MASK) == GPIO_PUD_PULL_DOWN) {
return -EINVAL;
}
if ((flags & GPIO_PUD_MASK) == GPIO_PUD_PULL_UP)
if ((flags & GPIO_PUD_MASK) == GPIO_PUD_PULL_UP) {
gpio->pue |= BIT(pin);
else
} else {
gpio->pue &= ~BIT(pin);
}
}
/*
* Configure interrupt if GPIO_INT is set.
@ -155,14 +162,16 @@ static int gpio_sifive_config(struct device *dev,
* 1) enabled only via a call to gpio_sifive_enable_callback.
* 2) disabled only via a call to gpio_sifive_disabled_callback.
*/
if (!(flags & GPIO_INT))
if (!(flags & GPIO_INT)) {
return 0;
}
/*
* Interrupt cannot be set for GPIO_DIR_OUT
*/
if (flags & GPIO_DIR_OUT)
if (flags & GPIO_DIR_OUT) {
return -EINVAL;
}
/* Edge or Level triggered ? */
if (flags & GPIO_INT_EDGE) {
@ -214,20 +223,23 @@ static int gpio_sifive_write(struct device *dev,
{
volatile struct gpio_sifive_t *gpio = DEV_GPIO(dev);
if (access_op != GPIO_ACCESS_BY_PIN)
if (access_op != GPIO_ACCESS_BY_PIN) {
return -ENOTSUP;
}
if (pin >= SIFIVE_PINMUX_PINS)
return -EINVAL;
/* If pin is configured as input return with error */
if (gpio->in_en & BIT(pin))
if (gpio->in_en & BIT(pin)) {
return -EINVAL;
}
if (value)
if (value) {
gpio->out_val |= BIT(pin);
else
} else {
gpio->out_val &= ~BIT(pin);
}
return 0;
}
@ -249,21 +261,24 @@ static int gpio_sifive_read(struct device *dev,
{
volatile struct gpio_sifive_t *gpio = DEV_GPIO(dev);
if (access_op != GPIO_ACCESS_BY_PIN)
if (access_op != GPIO_ACCESS_BY_PIN) {
return -ENOTSUP;
}
if (pin >= SIFIVE_PINMUX_PINS)
if (pin >= SIFIVE_PINMUX_PINS) {
return -EINVAL;
}
/*
* If gpio is configured as output,
* read gpio value from out_val register,
* otherwise read gpio value from in_val register
*/
if (gpio->out_en & BIT(pin))
if (gpio->out_en & BIT(pin)) {
*value = !!(gpio->out_val & BIT(pin));
else
} else {
*value = !!(gpio->in_val & BIT(pin));
}
return 0;
}
@ -283,11 +298,13 @@ static int gpio_sifive_enable_callback(struct device *dev,
{
const struct gpio_sifive_config *cfg = DEV_GPIO_CFG(dev);
if (access_op != GPIO_ACCESS_BY_PIN)
if (access_op != GPIO_ACCESS_BY_PIN) {
return -ENOTSUP;
}
if (pin >= SIFIVE_PINMUX_PINS)
if (pin >= SIFIVE_PINMUX_PINS) {
return -EINVAL;
}
/* Enable interrupt for the pin at PLIC level */
irq_enable(cfg->gpio_irq_base + pin);
@ -301,11 +318,13 @@ static int gpio_sifive_disable_callback(struct device *dev,
{
const struct gpio_sifive_config *cfg = DEV_GPIO_CFG(dev);
if (access_op != GPIO_ACCESS_BY_PIN)
if (access_op != GPIO_ACCESS_BY_PIN) {
return -ENOTSUP;
}
if (pin >= SIFIVE_PINMUX_PINS)
if (pin >= SIFIVE_PINMUX_PINS) {
return -EINVAL;
}
/* Disable interrupt for the pin at PLIC level */
irq_disable(cfg->gpio_irq_base + pin);

25
drivers/gpio/gpio_sx1509b.c
View file

@ -192,26 +192,30 @@ static int gpio_sx1509b_config(struct device *dev, int access_op, u32_t pin,
ret = i2c_reg_write_word_be(drv_data->i2c_master, cfg->i2c_slave_addr,
SX1509B_REG_DIR, pins->dir);
if (ret)
if (ret) {
goto out;
}
ret = i2c_reg_write_word_be(drv_data->i2c_master, cfg->i2c_slave_addr,
SX1509B_REG_INPUT_DISABLE,
pins->input_disable);
if (ret)
if (ret) {
goto out;
}
ret = i2c_reg_write_word_be(drv_data->i2c_master, cfg->i2c_slave_addr,
SX1509B_REG_PULL_UP,
pins->pull_up);
if (ret)
if (ret) {
goto out;
}
ret = i2c_reg_write_word_be(drv_data->i2c_master, cfg->i2c_slave_addr,
SX1509B_REG_PULL_DOWN,
pins->pull_down);
if (ret)
if (ret) {
goto out;
}
ret = i2c_reg_write_word_be(drv_data->i2c_master, cfg->i2c_slave_addr,
SX1509B_REG_OPEN_DRAIN,
@ -288,8 +292,9 @@ static int gpio_sx1509b_read(struct device *dev, int access_op, u32_t pin,
ret = i2c_burst_read(drv_data->i2c_master, cfg->i2c_slave_addr,
SX1509B_REG_DATA, (u8_t *)&pin_data,
sizeof(pin_data));
if (ret)
if (ret) {
goto out;
}
pin_data = sys_be16_to_cpu(pin_data);
@ -339,18 +344,22 @@ static int gpio_sx1509b_init(struct device *dev)
ret = i2c_reg_write_byte(drv_data->i2c_master, cfg->i2c_slave_addr,
SX1509B_REG_RESET, SX1509B_REG_RESET_MAGIC0);
if (ret)
if (ret) {
goto out;
}
ret = i2c_reg_write_byte(drv_data->i2c_master, cfg->i2c_slave_addr,
SX1509B_REG_RESET, SX1509B_REG_RESET_MAGIC1);
if (ret)
if (ret) {
goto out;
}
ret = i2c_reg_write_byte(drv_data->i2c_master, cfg->i2c_slave_addr,
SX1509B_REG_CLOCK,
SX1509B_REG_CLOCK_FOSC_INT_2MHZ);
if (ret)
if (ret) {
goto out;
}
out:
k_sem_give(&drv_data->lock);

3
drivers/i2c/i2c_imx.c
View file

@ -272,8 +272,9 @@ static void i2c_imx_isr(void *arg)
/* Exit the ISR if no transfer is happening for this instance. */
if (!transfer->isBusy)
if (!transfer->isBusy) {
return;
}
if (i2cModeMaster == transfer->currentMode) {
if (i2cDirectionTransmit == transfer->currentDir) {

15
drivers/i2c/i2c_ll_stm32_v1.c
View file

@ -317,7 +317,6 @@ s32_t stm32_i2c_msg_write(struct device *dev, struct i2c_msg *msg,
if (msg->flags & I2C_MSG_RESTART) {
LL_I2C_GenerateStartCondition(i2c);
while (!LL_I2C_IsActiveFlag_SB(i2c)) {
;
}
if (I2C_ADDR_10_BITS & data->dev_config) {
@ -326,8 +325,8 @@ s32_t stm32_i2c_msg_write(struct device *dev, struct i2c_msg *msg,
LL_I2C_TransmitData8(i2c, header);
while (!LL_I2C_IsActiveFlag_ADD10(i2c)) {
;
}
slave = data->slave_address & 0xFF;
LL_I2C_TransmitData8(i2c, slave);
} else {
@ -366,7 +365,6 @@ s32_t stm32_i2c_msg_write(struct device *dev, struct i2c_msg *msg,
}
while (!LL_I2C_IsActiveFlag_BTF(i2c)) {
;
}
if (msg->flags & I2C_MSG_STOP) {
@ -392,7 +390,6 @@ s32_t stm32_i2c_msg_read(struct device *dev, struct i2c_msg *msg,
if (msg->flags & I2C_MSG_RESTART) {
LL_I2C_GenerateStartCondition(i2c);
while (!LL_I2C_IsActiveFlag_SB(i2c)) {
;
}
if (I2C_ADDR_10_BITS & data->dev_config) {
@ -401,18 +398,18 @@ s32_t stm32_i2c_msg_read(struct device *dev, struct i2c_msg *msg,
LL_I2C_TransmitData8(i2c, header);
while (!LL_I2C_IsActiveFlag_ADD10(i2c)) {
;
}
slave = saddr & 0xFF;
LL_I2C_TransmitData8(i2c, slave);
while (!LL_I2C_IsActiveFlag_ADDR(i2c)) {
;
}
LL_I2C_ClearFlag_ADDR(i2c);
LL_I2C_GenerateStartCondition(i2c);
while (!LL_I2C_IsActiveFlag_SB(i2c)) {
;
}
header |= I2C_REQUEST_READ;
LL_I2C_TransmitData8(i2c, header);
} else {
@ -458,8 +455,8 @@ s32_t stm32_i2c_msg_read(struct device *dev, struct i2c_msg *msg,
break;
case 2:
while (!LL_I2C_IsActiveFlag_BTF(i2c)) {
;
}
/*
* Stop condition must be generated before reading the
* last two bytes.
@ -477,8 +474,8 @@ s32_t stm32_i2c_msg_read(struct device *dev, struct i2c_msg *msg,
break;
case 3:
while (!LL_I2C_IsActiveFlag_BTF(i2c)) {
;
}
/* Set NACK before reading N-2 byte*/
LL_I2C_AcknowledgeNextData(i2c, LL_I2C_NACK);
/* Fall through */

2
drivers/i2c/i2c_ll_stm32_v2.c
View file

@ -519,8 +519,8 @@ static inline int msg_done(struct device *dev, unsigned int current_msg_flags)
if (current_msg_flags & I2C_MSG_STOP) {
LL_I2C_GenerateStopCondition(i2c);
while (!LL_I2C_IsActiveFlag_STOP(i2c)) {
;
}
LL_I2C_ClearFlag_STOP(i2c);
LL_I2C_DisableReloadMode(i2c);
}

3
drivers/i2c/i2c_mchp_xec.c
View file

@ -278,8 +278,9 @@ static int i2c_xec_poll_read(struct device *dev, struct i2c_msg msg,
/* Read dummy byte */
byte = MCHP_I2C_SMB_DATA(ba);
ret = wait_completion(ba);
if (ret)
if (ret) {
return ret;
}
for (int i = 0U; i < msg.len; i++) {
while (MCHP_I2C_SMB_STS_RO(ba) & MCHP_I2C_SMB_STS_PIN) {

3
drivers/i2c/i2c_qmsi.c
View file

@ -157,8 +157,9 @@ static int i2c_qmsi_configure(struct device *dev, u32_t config)
qm_i2c_config_t qm_cfg;
/* This driver only supports master mode. */
if (!(I2C_MODE_MASTER & config))
if (!(I2C_MODE_MASTER & config)) {
return -EINVAL;
}
qm_cfg.mode = QM_I2C_MASTER;
if (I2C_ADDR_10_BITS & config) {

24
drivers/i2c/i2c_sifive.c
View file

@ -80,8 +80,8 @@ static int i2c_sifive_send_addr(struct device *dev,
u8_t command = 0U;
/* Wait for a previous transfer to complete */
while (i2c_sifive_busy(dev))
;
while (i2c_sifive_busy(dev)) {
}
/* Set transmit register to address with read/write flag */
sys_write8((addr | rw_flag), I2C_REG(config, REG_TRANSMIT));
@ -92,8 +92,8 @@ static int i2c_sifive_send_addr(struct device *dev,
/* Write the command register to start the transfer */
sys_write8(command, I2C_REG(config, REG_COMMAND));
while (i2c_sifive_busy(dev))
;
while (i2c_sifive_busy(dev)) {
}
if (IS_SET(config, REG_STATUS, SF_STATUS_RXACK)) {
LOG_ERR("I2C Rx failed to acknowledge\n");
@ -119,8 +119,8 @@ static int i2c_sifive_write_msg(struct device *dev,
for (u32_t i = 0; i < msg->len; i++) {
/* Wait for a previous transfer */
while (i2c_sifive_busy(dev))
;
while (i2c_sifive_busy(dev)) {
}
/* Put data in transmit reg */
sys_write8((msg->buf)[i], I2C_REG(config, REG_TRANSMIT));
@ -140,8 +140,8 @@ static int i2c_sifive_write_msg(struct device *dev,
sys_write8(command, I2C_REG(config, REG_COMMAND));
/* Wait for a previous transfer */
while (i2c_sifive_busy(dev))
;
while (i2c_sifive_busy(dev)) {
}
if (IS_SET(config, REG_STATUS, SF_STATUS_RXACK)) {
LOG_ERR("I2C Rx failed to acknowledge\n");
@ -161,8 +161,8 @@ static int i2c_sifive_read_msg(struct device *dev,
i2c_sifive_send_addr(dev, addr, SF_TX_READ);
while (i2c_sifive_busy(dev))
;
while (i2c_sifive_busy(dev)) {
}
for (int i = 0; i < msg->len; i++) {
/* Generate command byte */
@ -183,8 +183,8 @@ static int i2c_sifive_read_msg(struct device *dev,
sys_write8(command, I2C_REG(config, REG_COMMAND));
/* Wait for the read to complete */
while (i2c_sifive_busy(dev))
;
while (i2c_sifive_busy(dev)) {
}
/* Store the received byte */
(msg->buf)[i] = sys_read8(I2C_REG(config, REG_RECEIVE));

6
drivers/interrupt_controller/loapic_intr.c
View file

@ -244,11 +244,13 @@ static int loapic_init(struct device *unused)
LOAPIC_WRITE(LOAPIC_TIMER, LOAPIC_LVT_MASKED);
LOAPIC_WRITE(LOAPIC_ERROR, LOAPIC_LVT_MASKED);
if (loApicMaxLvt >= LOAPIC_LVT_P6)
if (loApicMaxLvt >= LOAPIC_LVT_P6) {
LOAPIC_WRITE(LOAPIC_PMC, LOAPIC_LVT_MASKED);
}
if (loApicMaxLvt >= LOAPIC_LVT_PENTIUM4)
if (loApicMaxLvt >= LOAPIC_LVT_PENTIUM4) {
LOAPIC_WRITE(LOAPIC_THERMAL, LOAPIC_LVT_MASKED);
}
#if CONFIG_LOAPIC_SPURIOUS_VECTOR
LOAPIC_WRITE(LOAPIC_SVR, (LOAPIC_READ(LOAPIC_SVR) & 0xFFFFFF00) |

3
drivers/pcie/msi.c
View file

@ -24,8 +24,9 @@ u32_t pcie_get_cap(pcie_bdf_t bdf, u32_t cap_id)
while (reg) {
data = pcie_conf_read(bdf, reg);
if (PCIE_CONF_CAP_ID(data) == cap_id)
if (PCIE_CONF_CAP_ID(data) == cap_id) {
break;
}
reg = PCIE_CONF_CAP_NEXT(data);
}

5
drivers/pwm/pwm_pca9685.c
View file

@ -49,11 +49,12 @@ static inline int has_i2c_master(struct device *dev)
(struct pwm_pca9685_drv_data * const)dev->driver_data;
struct device * const i2c_master = drv_data->i2c_master;
if (i2c_master)
if (i2c_master) {
return 1;
else
} else {
return 0;
}
}
/*
* period_count is always taken as 4095. To control the on period send

9
drivers/rtc/rtc_ll_stm32.c
View file

@ -228,8 +228,9 @@ static int rtc_stm32_init(struct device *dev)
#if defined(CONFIG_RTC_STM32_CLOCK_LSI)
LL_RCC_LSI_Enable();
while (LL_RCC_LSI_IsReady() != 1)
;
while (LL_RCC_LSI_IsReady() != 1) {
}
LL_RCC_SetRTCClockSource(LL_RCC_RTC_CLKSOURCE_LSI);
#else /* CONFIG_RTC_STM32_CLOCK_LSE */
@ -238,8 +239,8 @@ static int rtc_stm32_init(struct device *dev)
LL_RCC_LSE_Enable();
/* Wait untill LSE is ready */
while (LL_RCC_LSE_IsReady() != 1)
;
while (LL_RCC_LSE_IsReady() != 1) {
}
LL_RCC_SetRTCClockSource(LL_RCC_RTC_CLKSOURCE_LSE);

3
drivers/sensor/adt7420/adt7420.c
View file

@ -166,8 +166,9 @@ static int adt7420_probe(struct device *dev)
return ret;
}
if (value != ADT7420_DEFAULT_ID)
if (value != ADT7420_DEFAULT_ID) {
return -ENODEV;
}
ret = i2c_reg_write_byte(drv_data->i2c, cfg->i2c_addr,
ADT7420_REG_CONFIG, ADT7420_CONFIG_RESOLUTION |

1
drivers/sensor/hp206c/hp206c.c
View file

@ -111,7 +111,6 @@ static int hp206c_osr_set(struct device *dev, u16_t osr)
/* the following code translates OSR values to an index */
for (i = 0U; i < 6 && BIT(12 - i) != osr; i++) {
;
}
if (i == 6U) {

2
drivers/sensor/th02/th02.c
View file

@ -56,7 +56,6 @@ static u16_t get_humi(struct device *dev)
}
while (!is_ready(dev)) {
}
;
humidity = read8(dev, TH02_REG_DATA_H) << 8;
humidity |= read8(dev, TH02_REG_DATA_L);
@ -76,7 +75,6 @@ u16_t get_temp(struct device *dev)
}
while (!is_ready(dev)) {
}
;
temperature = read8(dev, TH02_REG_DATA_H) << 8;
temperature |= read8(dev, TH02_REG_DATA_L);

8
drivers/serial/uart_imx.c
View file

@ -98,8 +98,8 @@ static void uart_imx_poll_out(struct device *dev, unsigned char c)
{
UART_Type *uart = UART_STRUCT(dev);
while (!UART_GetStatusFlag(uart, uartStatusTxReady))
;
while (!UART_GetStatusFlag(uart, uartStatusTxReady)) {
}
UART_Putchar(uart, c);
}
@ -107,8 +107,8 @@ static int uart_imx_poll_in(struct device *dev, unsigned char *c)
{
UART_Type *uart = UART_STRUCT(dev);
while (!UART_GetStatusFlag(uart, uartStatusRxDataReady))
;
while (!UART_GetStatusFlag(uart, uartStatusRxDataReady)) {
}
*c = UART_Getchar(uart);
if (UART_GetStatusFlag(uart, uartStatusRxOverrun)) {

4
drivers/serial/uart_liteuart.c
View file

@ -54,8 +54,8 @@ struct uart_liteuart_data {
static void uart_liteuart_poll_out(struct device *dev, unsigned char c)
{
/* wait for space */
while (sys_read8(UART_TXFULL))
;
while (sys_read8(UART_TXFULL)) {
}
sys_write8(c, UART_RXTX);
}

4
drivers/serial/uart_mcux.c
View file

@ -47,8 +47,8 @@ static void uart_mcux_poll_out(struct device *dev, unsigned char c)
{
const struct uart_mcux_config *config = dev->config->config_info;
while (!(UART_GetStatusFlags(config->base) & kUART_TxDataRegEmptyFlag))
;
while (!(UART_GetStatusFlags(config->base) & kUART_TxDataRegEmptyFlag)) {
}
UART_WriteByte(config->base, c);
}

4
drivers/serial/uart_mcux_lpsci.c
View file

@ -47,8 +47,8 @@ static void mcux_lpsci_poll_out(struct device *dev, unsigned char c)
const struct mcux_lpsci_config *config = dev->config->config_info;
while (!(LPSCI_GetStatusFlags(config->base)
& kLPSCI_TxDataRegEmptyFlag))
;
& kLPSCI_TxDataRegEmptyFlag)) {
}
LPSCI_WriteByte(config->base, c);
}

4
drivers/serial/uart_mcux_lpuart.c
View file

@ -47,8 +47,8 @@ static void mcux_lpuart_poll_out(struct device *dev, unsigned char c)
const struct mcux_lpuart_config *config = dev->config->config_info;
while (!(LPUART_GetStatusFlags(config->base)
& kLPUART_TxDataRegEmptyFlag))
;
& kLPUART_TxDataRegEmptyFlag)) {
}
LPUART_WriteByte(config->base, c);
}

4
drivers/serial/uart_miv.c
View file

@ -155,8 +155,8 @@ static void uart_miv_poll_out(struct device *dev,
{
volatile struct uart_miv_regs_t *uart = DEV_UART(dev);
while (!(uart->status & STATUS_TXRDY_MASK))
;
while (!(uart->status & STATUS_TXRDY_MASK)) {
}
uart->tx = c;
}

10
drivers/serial/uart_ns16550.c
View file

@ -363,8 +363,9 @@ static int uart_ns16550_init(struct device *dev)
OUTBYTE(LCR(dev), LCR_CS8 | LCR_1_STB | LCR_PDIS);
mdc = MCR_OUT2 | MCR_RTS | MCR_DTR;
if ((dev_data->options & UART_OPTION_AFCE) == UART_OPTION_AFCE)
if ((dev_data->options & UART_OPTION_AFCE) == UART_OPTION_AFCE) {
mdc |= MCR_AFCE;
}
OUTBYTE(MDC(dev), mdc);
@ -405,8 +406,9 @@ static int uart_ns16550_init(struct device *dev)
*/
static int uart_ns16550_poll_in(struct device *dev, unsigned char *c)
{
if ((INBYTE(LSR(dev)) & LSR_RXRDY) == 0x00)
if ((INBYTE(LSR(dev)) & LSR_RXRDY) == 0x00) {
return (-1);
}
/* got a character */
*c = INBYTE(RDR(dev));
@ -430,8 +432,8 @@ static void uart_ns16550_poll_out(struct device *dev,
unsigned char c)
{
/* wait for transmitter to ready to accept a character */
while ((INBYTE(LSR(dev)) & LSR_THRE) == 0)
;
while ((INBYTE(LSR(dev)) & LSR_THRE) == 0) {
}
OUTBYTE(THR(dev), c);
}

4
drivers/serial/uart_nsim.c
View file

@ -90,8 +90,8 @@ static void uart_nsim_poll_out(struct device *dev, unsigned char c)
u32_t regs = DEV_CFG(dev)->regs;
/* wait for transmitter to ready to accept a character */
while (!(UART_GET_STATUS(regs) & TXEMPTY))
;
while (!(UART_GET_STATUS(regs) & TXEMPTY)) {
}
UART_SET_DATA(regs, c);
}

4
drivers/serial/uart_psoc6.c
View file

@ -122,8 +122,8 @@ static void uart_psoc6_poll_out(struct device *dev, unsigned char c)
{
const struct cypress_psoc6_config *config = dev->config->config_info;
while (Cy_SCB_UART_Put(config->base, (uint32_t)c) != 1UL)
;
while (Cy_SCB_UART_Put(config->base, (uint32_t)c) != 1UL) {
}
}
static const struct uart_driver_api uart_psoc6_driver_api = {

4
drivers/serial/uart_rv32m1_lpuart.c
View file

@ -51,8 +51,8 @@ static void rv32m1_lpuart_poll_out(struct device *dev, unsigned char c)
const struct rv32m1_lpuart_config *config = dev->config->config_info;
while (!(LPUART_GetStatusFlags(config->base)
& kLPUART_TxDataRegEmptyFlag))
;
& kLPUART_TxDataRegEmptyFlag)) {
}
LPUART_WriteByte(config->base, c);
}

8
drivers/serial/uart_sam.c
View file

@ -158,8 +158,8 @@ static void uart_sam_poll_out(struct device *dev, unsigned char c)
Uart *const uart = DEV_CFG(dev)->regs;
/* Wait for transmitter to be ready */
while (!(uart->UART_SR & UART_SR_TXRDY))
;
while (!(uart->UART_SR & UART_SR_TXRDY)) {
}
/* send a character */
uart->UART_THR = (u32_t)c;
@ -214,8 +214,8 @@ static int uart_sam_fifo_fill(struct device *dev, const uint8_t *tx_data,
volatile Uart * const uart = DEV_CFG(dev)->regs;
/* Wait for transmitter to be ready. */
while ((uart->UART_SR & UART_SR_TXRDY) == 0)
;
while ((uart->UART_SR & UART_SR_TXRDY) == 0) {
}
uart->UART_THR = *tx_data;

7
drivers/serial/uart_sifive.c
View file

@ -84,8 +84,8 @@ static void uart_sifive_poll_out(struct device *dev,
volatile struct uart_sifive_regs_t *uart = DEV_UART(dev);
/* Wait while TX FIFO is full */
while (uart->tx & TXDATA_FULL)
;
while (uart->tx & TXDATA_FULL) {
}
uart->tx = (int)c;
}
@ -103,8 +103,9 @@ static int uart_sifive_poll_in(struct device *dev, unsigned char *c)
volatile struct uart_sifive_regs_t *uart = DEV_UART(dev);
u32_t val = uart->rx;
if (val & RXDATA_EMPTY)
if (val & RXDATA_EMPTY) {
return -1;
}
*c = (unsigned char)(val & RXDATA_MASK);

15
drivers/serial/uart_stellaris.c
View file

@ -217,8 +217,8 @@ static inline void disable(struct device *dev)
uart->ctl &= ~UARTCTL_UARTEN;
/* ensure transmissions are complete */
while (uart->fr & UARTFR_BUSY)
;
while (uart->fr & UARTFR_BUSY) {
}
/* flush the FIFOs by disabling them */
uart->lcrh &= ~UARTLCRH_FEN;
@ -304,8 +304,9 @@ static int uart_stellaris_poll_in(struct device *dev, unsigned char *c)
{
volatile struct _uart *uart = UART_STRUCT(dev);
if (uart->fr & UARTFR_RXFE)
if (uart->fr & UARTFR_RXFE) {
return (-1);
}
/* got a character */
*c = (unsigned char)uart->dr;
@ -327,8 +328,8 @@ static void uart_stellaris_poll_out(struct device *dev,
{
volatile struct _uart *uart = UART_STRUCT(dev);
while (!poll_tx_ready(dev))
;
while (!poll_tx_ready(dev)) {
}
/* send a character */
uart->dr = (u32_t)c;
@ -420,8 +421,8 @@ static void uart_stellaris_irq_tx_enable(struct device *dev)
uart->ctl = (UARTCTL_UARTEN | UARTCTL_TXEN | UARTCTL_LBE);
uart->dr = 0U;
while (uart->fr & UARTFR_BUSY)
;
while (uart->fr & UARTFR_BUSY) {
}
/* restore control and baud rate settings */
disable(dev);

12
drivers/serial/uart_stm32.c
View file

@ -392,8 +392,8 @@ static void uart_stm32_poll_out(struct device *dev,
USART_TypeDef *UartInstance = UART_STRUCT(dev);
/* Wait for TXE flag to be raised */
while (!LL_USART_IsActiveFlag_TXE(UartInstance))
;
while (!LL_USART_IsActiveFlag_TXE(UartInstance)) {
}
LL_USART_ClearFlag_TC(UartInstance);
@ -681,14 +681,14 @@ static int uart_stm32_init(struct device *dev)
#ifdef USART_ISR_TEACK
/* Wait until TEACK flag is set */
while (!(LL_USART_IsActiveFlag_TEACK(UartInstance)))
;
while (!(LL_USART_IsActiveFlag_TEACK(UartInstance))) {
}
#endif /* !USART_ISR_TEACK */
#ifdef USART_ISR_REACK
/* Wait until REACK flag is set */
while (!(LL_USART_IsActiveFlag_REACK(UartInstance)))
;
while (!(LL_USART_IsActiveFlag_REACK(UartInstance))) {
}
#endif /* !USART_ISR_REACK */
#ifdef CONFIG_UART_INTERRUPT_DRIVEN

4
drivers/serial/usart_mcux_lpc.c
View file

@ -51,8 +51,8 @@ static void usart_mcux_lpc_poll_out(struct device *dev,
const struct usart_mcux_lpc_config *config = dev->config->config_info;
/* Wait until space is available in TX FIFO */
while (!(USART_GetStatusFlags(config->base) & kUSART_TxFifoEmptyFlag))
;
while (!(USART_GetStatusFlags(config->base) & kUSART_TxFifoEmptyFlag)) {
}
USART_WriteByte(config->base, c);
}

2
drivers/serial/usart_sam.c
View file

@ -144,7 +144,6 @@ static void usart_sam_poll_out(struct device *dev, unsigned char c)
/* Wait for transmitter to be ready */
while (!(usart->US_CSR & US_CSR_TXRDY)) {
;
}
/* send a character */
@ -201,7 +200,6 @@ static int usart_sam_fifo_fill(struct device *dev, const uint8_t *tx_data,
/* Wait for transmitter to be ready. */
while ((usart->US_CSR & US_CSR_TXRDY) == 0) {
;
}
usart->US_THR = *tx_data;

8
drivers/spi/spi_sifive.c
View file

@ -93,8 +93,8 @@ int spi_config(struct device *dev, u32_t frequency, u16_t operation)
void spi_sifive_send(struct device *dev, u16_t frame)
{
while (SPI_REG(dev, REG_TXDATA) & SF_TXDATA_FULL)
;
while (SPI_REG(dev, REG_TXDATA) & SF_TXDATA_FULL) {
}
sys_write32((u32_t) frame, SPI_REG(dev, REG_TXDATA));
}
@ -103,8 +103,8 @@ u16_t spi_sifive_recv(struct device *dev)
{
u32_t val;
while ((val = sys_read32(SPI_REG(dev, REG_RXDATA))) & SF_RXDATA_EMPTY)
;
while ((val = sys_read32(SPI_REG(dev, REG_RXDATA))) & SF_RXDATA_EMPTY) {
}
return (u16_t) val;
}

4
drivers/usb/device/usb_dc_dw.c
View file

@ -212,8 +212,8 @@ static void usb_dw_flush_tx_fifo(int ep)
int fnum = usb_dw_ctrl.in_ep_ctrl[ep].fifo_num;
USB_DW->grstctl = (fnum << 6) | (1<<5);
while (USB_DW->grstctl & (1<<5))
;
while (USB_DW->grstctl & (1<<5)) {
}
}
static int usb_dw_tx_fifo_avail(int ep)

6
drivers/watchdog/wdt_qmsi.c
View file

@ -78,8 +78,9 @@ wdt_config_return:
static __attribute__((noinline)) u32_t next_pow2(u32_t x)
{
if (x <= 2U)
if (x <= 2U) {
return x;
}
return (1ULL << 32) >> __builtin_clz(x - 1);
}
@ -89,8 +90,9 @@ static u32_t get_timeout(u32_t timeout)
u32_t val = timeout / 2U;
u32_t count = 0U;
if (val & (val - 1))
if (val & (val - 1)) {
val = next_pow2(val);
}
while (val) {
val = val >> 1;

3
drivers/watchdog/wdt_sam0.c
View file

@ -38,8 +38,9 @@ static u32_t wdt_sam0_timeout_to_wdt_period(u32_t timeout_ms)
cycles = (timeout_ms * 1024U) / 1000;
/* Minimum wdt period is 8 clock cycles (register value 0) */
if (cycles <= 8U)
if (cycles <= 8U) {
return 0;
}
/* Round up to next pow2 and calculate the register value */
next_pow2 = (1ULL << 32) >> __builtin_clz(cycles - 1);

3
drivers/wifi/eswifi/eswifi_core.c
View file

@ -223,10 +223,11 @@ static void eswifi_scan(struct eswifi_dev *eswifi)
eswifi->scan_cb(eswifi->iface, 0, &res);
k_yield();
while (data[i] && data[i] != '\n')
while (data[i] && data[i] != '\n') {
i++;
}
}
}
eswifi_unlock(eswifi);
}

3
drivers/wifi/eswifi/eswifi_offload.c
View file

@ -452,8 +452,9 @@ static int eswifi_off_recv(struct net_context *context,
k_sem_reset(&socket->read_sem);
eswifi_unlock(eswifi);
if (timeout == K_NO_WAIT)
if (timeout == K_NO_WAIT) {
return 0;
}
err = k_sem_take(&socket->read_sem, timeout);

10
lib/libc/minimal/source/stdlib/strtol.c
View file

@ -60,14 +60,17 @@ long strtol(const char *nptr, char **endptr, register int base)
if (c == '-') {
neg = 1;
c = *s++;
} else if (c == '+')
} else if (c == '+') {
c = *s++;
}
if ((base == 0 || base == 16) &&
c == '0' && (*s == 'x' || *s == 'X')) {
c = s[1];
s += 2;
base = 16;
}
if (base == 0) {
base = c == '0' ? 8 : 10;
}
@ -111,11 +114,14 @@ long strtol(const char *nptr, char **endptr, register int base)
acc += c;
}
}
if (any < 0) {
acc = neg ? LONG_MIN : LONG_MAX;
errno = ERANGE;
} else if (neg)
} else if (neg) {
acc = -acc;
}
if (endptr != NULL) {
*endptr = (char *)(any ? s - 1 : nptr);
}

6
lib/libc/minimal/source/stdlib/strtoul.c
View file

@ -58,17 +58,21 @@ unsigned long strtoul(const char *nptr, char **endptr, register int base)
if (c == '-') {
neg = 1;
c = *s++;
} else if (c == '+')
} else if (c == '+') {
c = *s++;
}
if ((base == 0 || base == 16) &&
c == '0' && (*s == 'x' || *s == 'X')) {
c = s[1];
s += 2;
base = 16;
}
if (base == 0) {
base = c == '0' ? 8 : 10;
}
cutoff = (unsigned long)ULONG_MAX / (unsigned long)base;
cutlim = (unsigned long)ULONG_MAX % (unsigned long)base;
for (acc = 0, any = 0;; c = *s++) {

18
lib/libc/minimal/source/stdout/prf.c
View file

@ -312,8 +312,10 @@ static int _to_float(char *buf, uint64_t double_temp, int c,
exp++;
}
if (precision < 0)
if (precision < 0) {
precision = 6; /* Default precision if none given */
}
prune_zero = false; /* Assume trailing 0's allowed */
if ((c == 'g') || (c == 'G')) {
if (!falt && (precision > 0)) {
@ -390,8 +392,10 @@ static int _to_float(char *buf, uint64_t double_temp, int c,
}
if (prune_zero) {
while (*--buf == '0')
while (*--buf == '0') {
;
}
if (*buf != '.') {
buf++;
}
@ -703,18 +707,22 @@ int z_prf(int (*func)(), void *dest, char *format, va_list vargs)
if (c < width) {
if (fminus) {
/* Left justify? */
for (i = c; i < width; i++)
for (i = c; i < width; i++) {
buf[i] = ' ';
}
} else {
/* Right justify */
(void) memmove((buf + (width - c)), buf, (size_t) (c
+ 1));
if (pad == ' ')
if (pad == ' ') {
prefix = 0;
}
c = width - c + prefix;
for (i = prefix; i < c; i++)
for (i = prefix; i < c; i++) {
buf[i] = pad;
}
}
c = width;
}

6
lib/libc/minimal/source/string/string.c
View file

@ -68,8 +68,9 @@ char *strchr(const char *s, int c)
{
char tmp = (char) c;
while ((*s != tmp) && (*s != '\0'))
while ((*s != tmp) && (*s != '\0')) {
s++;
}
return (*s == tmp) ? (char *) s : NULL;
}
@ -180,8 +181,9 @@ int memcmp(const void *m1, const void *m2, size_t n)
const char *c1 = m1;
const char *c2 = m2;
if (!n)
if (!n) {
return 0;
}
while ((--n > 0) && (*c1 == *c2)) {
c1++;

3
lib/libc/minimal/source/string/strstr.c
View file

@ -51,8 +51,9 @@ strstr(const char *s, const char *find)
do {
do {
sc = *s++;
if (sc == 0)
if (sc == 0) {
return NULL;
}
} while (sc != c);
} while (strncmp(s, find, len) != 0);
s--;

3
lib/os/printk.c
View file

@ -238,8 +238,9 @@ void z_vprintk(out_func_t out, void *ctx, const char *fmt, va_list ap)
char *s = va_arg(ap, char *);
char *start = s;
while (*s)
while (*s) {
out((int)(*s++), ctx);
}
if (padding == PAD_SPACE_AFTER) {
int remaining = min_width - (s - start);

6
subsys/bluetooth/host/smp.c
View file

@ -319,8 +319,9 @@ static u8_t get_pair_method(struct bt_smp *smp, u8_t remote_io)
}
}
if (remote_io > BT_SMP_IO_KEYBOARD_DISPLAY)
if (remote_io > BT_SMP_IO_KEYBOARD_DISPLAY) {
return JUST_WORKS;
}
/* if none side requires MITM use JustWorks */
if (!((req->auth_req | rsp->auth_req) & BT_SMP_AUTH_MITM)) {
@ -1918,8 +1919,9 @@ static u8_t legacy_get_pair_method(struct bt_smp *smp, u8_t remote_io)
struct bt_smp_pairing *req, *rsp;
u8_t method;
if (remote_io > BT_SMP_IO_KEYBOARD_DISPLAY)
if (remote_io > BT_SMP_IO_KEYBOARD_DISPLAY) {
return JUST_WORKS;
}
req = (struct bt_smp_pairing *)&smp->preq[1];
rsp = (struct bt_smp_pairing *)&smp->prsp[1];

3
subsys/bluetooth/host/uuid.c
View file

@ -64,8 +64,9 @@ static int uuid128_cmp(const struct bt_uuid *u1, const struct bt_uuid *u2)
int bt_uuid_cmp(const struct bt_uuid *u1, const struct bt_uuid *u2)
{
/* Convert to 128 bit if types don't match */
if (u1->type != u2->type)
if (u1->type != u2->type) {
return uuid128_cmp(u1, u2);
}
switch (u1->type) {
case BT_UUID_TYPE_16:

3
subsys/bluetooth/shell/gatt.c
View file

@ -927,8 +927,9 @@ static int cmd_get(const struct shell *shell, size_t argc, char *argv[])
start = strtoul(argv[1], NULL, 16);
end = start;
if (argc > 2)
if (argc > 2) {
end = strtoul(argv[2], NULL, 16);
}
bt_gatt_foreach_attr(start, end, get_cb, (void *)shell);

1
subsys/cpp/cpp_virtual.c
View file

@ -20,6 +20,5 @@
void __cxa_pure_virtual(void)
{
while (1) {
;
}
}

7
subsys/net/ip/utils.c
View file

@ -120,8 +120,10 @@ static int net_value_to_udec(char *buf, u32_t value, int precision)
char *start = buf;
divisor = 1000000000U;
if (precision < 0)
if (precision < 0) {
precision = 1;
}
for (i = 9; i >= 0; i--, divisor /= 10U) {
temp = value / divisor;
value = value % divisor;
@ -311,9 +313,10 @@ int net_addr_pton(sa_family_t family, const char *src,
if (!(src[i] >= '0' && src[i] <= '9') &&
!(src[i] >= 'A' && src[i] <= 'F') &&
!(src[i] >= 'a' && src[i] <= 'f') &&
src[i] != '.' && src[i] != ':')
src[i] != '.' && src[i] != ':') {
return -EINVAL;
}
}
for (i = 0; i < expected_groups; i++) {
char *tmp;

5
subsys/shell/shell_utils.c
View file

@ -448,8 +448,9 @@ static void buffer_trim(char *buff, u16_t *buff_len)
/* Counting whitespace characters starting from beginning of the
* command.
*/
while (isspace((int) buff[i++]))
;
while (isspace((int) buff[i++])) {
}
/* Removing counted whitespace characters. */
if (--i > 0) {

9
subsys/usb/usb_device.c
View file

@ -858,16 +858,19 @@ static int usb_handle_standard_request(struct usb_setup_packet *setup,
switch (REQTYPE_GET_RECIP(setup->bmRequestType)) {
case REQTYPE_RECIP_DEVICE:
if (usb_handle_std_device_req(setup, len, data_buf) == false)
if (usb_handle_std_device_req(setup, len, data_buf) == false) {
rc = -EINVAL;
}
break;
case REQTYPE_RECIP_INTERFACE:
if (usb_handle_std_interface_req(setup, len, data_buf) == false)
if (usb_handle_std_interface_req(setup, len, data_buf) == false) {
rc = -EINVAL;
}
break;
case REQTYPE_RECIP_ENDPOINT:
if (usb_handle_std_endpoint_req(setup, len, data_buf) == false)
if (usb_handle_std_endpoint_req(setup, len, data_buf) == false) {
rc = -EINVAL;
}
break;
default:
rc = -EINVAL;