drivers: i2s: use dt instance for stm32 i2s driver
Update the STM32 I2S driver to use DT_INST macros instead of DT_NODELABEL Signed-off-by: Guillaume Gautier <guillaume.gautier-ext@st.com>
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87f3e331a6
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4bbd89df26
1 changed files with 26 additions and 46 deletions
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@ -874,28 +874,26 @@ static const struct device *get_dev_from_tx_dma_channel(uint32_t dma_channel)
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/* src_dev and dest_dev should be 'MEMORY' or 'PERIPHERAL'. */
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#define I2S_DMA_CHANNEL_INIT(index, dir, dir_cap, src_dev, dest_dev) \
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.dir = { \
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.dev_dma = DEVICE_DT_GET(DT_DMAS_CTLR_BY_NAME(DT_NODELABEL(i2s##index), dir)),\
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.dma_channel = \
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DT_DMAS_CELL_BY_NAME(DT_NODELABEL(i2s##index), dir, channel),\
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.dev_dma = DEVICE_DT_GET(STM32_DMA_CTLR(index, dir)), \
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.dma_channel = DT_INST_DMAS_CELL_BY_NAME(index, dir, channel), \
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.dma_cfg = { \
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.block_count = 2, \
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.dma_slot = \
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DT_DMAS_CELL_BY_NAME(DT_NODELABEL(i2s##index), dir, slot),\
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.dma_slot = STM32_DMA_SLOT(index, dir, slot),\
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.channel_direction = src_dev##_TO_##dest_dev, \
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.source_data_size = 2, /* 16bit default */ \
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.dest_data_size = 2, /* 16bit default */ \
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.source_burst_length = 1, /* SINGLE transfer */ \
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.dest_burst_length = 1, \
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.channel_priority = STM32_DMA_CONFIG_PRIORITY( \
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DT_DMAS_CELL_BY_NAME(DT_NODELABEL(i2s##index), dir, channel_config)),\
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STM32_DMA_CHANNEL_CONFIG(index, dir)),\
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.dma_callback = dma_##dir##_callback, \
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}, \
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.src_addr_increment = STM32_DMA_CONFIG_##src_dev##_ADDR_INC( \
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DT_DMAS_CELL_BY_NAME(DT_NODELABEL(i2s##index), dir, channel_config)),\
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STM32_DMA_CHANNEL_CONFIG(index, dir)), \
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.dst_addr_increment = STM32_DMA_CONFIG_##dest_dev##_ADDR_INC( \
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DT_DMAS_CELL_BY_NAME(DT_NODELABEL(i2s##index), dir, channel_config)),\
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STM32_DMA_CHANNEL_CONFIG(index, dir)), \
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.fifo_threshold = STM32_DMA_FEATURES_FIFO_THRESHOLD( \
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DT_DMAS_CELL_BY_NAME(DT_NODELABEL(i2s##index), dir, channel_config)),\
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STM32_DMA_FEATURES(index, dir)), \
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.stream_start = dir##_stream_start, \
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.stream_disable = dir##_stream_disable, \
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.queue_drop = dir##_queue_drop, \
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@ -903,63 +901,45 @@ static const struct device *get_dev_from_tx_dma_channel(uint32_t dma_channel)
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.mem_block_queue.len = ARRAY_SIZE(dir##_##index##_ring_buf) \
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}
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#define I2S_INIT(index) \
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#define I2S_STM32_INIT(index) \
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\
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static void i2s_stm32_irq_config_func_##index(const struct device *dev);\
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\
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PINCTRL_DT_DEFINE(DT_NODELABEL(i2s##index)); \
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PINCTRL_DT_INST_DEFINE(index); \
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\
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static const struct stm32_pclken clk_##index[] = \
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STM32_DT_CLOCKS(DT_NODELABEL(i2s##index));\
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STM32_DT_INST_CLOCKS(index); \
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\
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static const struct i2s_stm32_cfg i2s_stm32_config_##index = { \
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.i2s = (SPI_TypeDef *) DT_REG_ADDR(DT_NODELABEL(i2s##index)), \
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.i2s = (SPI_TypeDef *)DT_INST_REG_ADDR(index), \
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.pclken = clk_##index, \
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.pclk_len = DT_NUM_CLOCKS(DT_NODELABEL(i2s##index)), \
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.pcfg = PINCTRL_DT_DEV_CONFIG_GET(DT_NODELABEL(i2s##index)), \
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.pclk_len = DT_INST_NUM_CLOCKS(index), \
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.pcfg = PINCTRL_DT_INST_DEV_CONFIG_GET(index), \
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.irq_config = i2s_stm32_irq_config_func_##index, \
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.master_clk_sel = DT_PROP(DT_NODELABEL(i2s##index), mck_enabled)\
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.master_clk_sel = DT_INST_PROP(index, mck_enabled) \
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}; \
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\
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struct queue_item rx_##index##_ring_buf[CONFIG_I2S_STM32_RX_BLOCK_COUNT + 1];\
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struct queue_item tx_##index##_ring_buf[CONFIG_I2S_STM32_TX_BLOCK_COUNT + 1];\
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\
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static struct i2s_stm32_data i2s_stm32_data_##index = { \
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UTIL_AND(DT_DMAS_HAS_NAME(DT_NODELABEL(i2s##index), rx), \
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UTIL_AND(DT_INST_DMAS_HAS_NAME(index, rx), \
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I2S_DMA_CHANNEL_INIT(index, rx, RX, PERIPHERAL, MEMORY)),\
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UTIL_AND(DT_DMAS_HAS_NAME(DT_NODELABEL(i2s##index), tx), \
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UTIL_AND(DT_INST_DMAS_HAS_NAME(index, tx), \
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I2S_DMA_CHANNEL_INIT(index, tx, TX, MEMORY, PERIPHERAL)),\
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}; \
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DEVICE_DT_DEFINE(DT_NODELABEL(i2s##index), \
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&i2s_stm32_initialize, NULL, \
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&i2s_stm32_data_##index, \
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&i2s_stm32_config_##index, POST_KERNEL, \
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CONFIG_I2S_INIT_PRIORITY, &i2s_stm32_driver_api); \
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DEVICE_DT_INST_DEFINE(index, \
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&i2s_stm32_initialize, NULL, \
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&i2s_stm32_data_##index, \
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&i2s_stm32_config_##index, POST_KERNEL, \
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CONFIG_I2S_INIT_PRIORITY, &i2s_stm32_driver_api); \
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\
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static void i2s_stm32_irq_config_func_##index(const struct device *dev) \
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{ \
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IRQ_CONNECT(DT_IRQN(DT_NODELABEL(i2s##index)), \
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DT_IRQ(DT_NODELABEL(i2s##index), priority), \
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i2s_stm32_isr, DEVICE_DT_GET(DT_NODELABEL(i2s##index)), 0);\
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irq_enable(DT_IRQN(DT_NODELABEL(i2s##index))); \
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IRQ_CONNECT(DT_INST_IRQN(index), \
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DT_INST_IRQ(index, priority), \
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i2s_stm32_isr, DEVICE_DT_INST_GET(index), 0); \
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irq_enable(DT_INST_IRQN(index)); \
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}
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#if DT_NODE_HAS_STATUS(DT_NODELABEL(i2s1), okay)
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I2S_INIT(1)
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#endif
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#if DT_NODE_HAS_STATUS(DT_NODELABEL(i2s2), okay)
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I2S_INIT(2)
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#endif
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#if DT_NODE_HAS_STATUS(DT_NODELABEL(i2s3), okay)
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I2S_INIT(3)
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#endif
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#if DT_NODE_HAS_STATUS(DT_NODELABEL(i2s4), okay)
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I2S_INIT(4)
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#endif
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#if DT_NODE_HAS_STATUS(DT_NODELABEL(i2s5), okay)
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I2S_INIT(5)
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#endif
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DT_INST_FOREACH_STATUS_OKAY(I2S_STM32_INIT)
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