drivers: pinctrl: add pinctrl driver for ARC emsdp
Add Synopsys ARC EMSDP board Pin controller for its Pmod and Arduino shield interface. Signed-off-by: Siyuan Cheng <siyuanc@synopsys.com>
This commit is contained in:
Siyuan Cheng
Anas Nashif
parent
0ce3e20bfb
commit
4babd545cc
12 changed files with 630 additions and 0 deletions
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@ -98,6 +98,30 @@ Note: DW SPI only available on SPI0 and SPI1.
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whole flash then write 4 byte data to the flash. Read from the flash and compare the
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result with buffer to check functionality.
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Pinmux interface
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================
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The following pinmux peripheral module standards are supported:
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* Digilent Pmod (3x)
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The ARC EM SDP features three 12-pin Pmod connectors: Pmod_A, Pmod_B, and Pmod_C.
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The functionality of the Pmod connectors is programmable and includes GPIO, UART, SPI,
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I2C, and PWM (Note: support two type UART Pmod interface: UARTA is newer version).
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Multiplexing is controlled by software using the PMOD_MUX_CTRL register.
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* Arduino (1x)
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The ARC EM SDP provides an Arduino shield interface. Multiplexing is controlled by software
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using the ARDUINO_MUX_CTRL register. Note: some IO must be programmed in group and can't be
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set individually, for details see Table 9 in `EM Software Development Platform user guide`_.
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* MikroBUS (1x)
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Note that since the controllers that are mapped to the MikroBUS are shared with the Arduino
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controllers, and therefore the MikroBUS functions are only available when the Arduino
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multiplexer ARDUINO_MUX_CTRL is in the default mode (GPIO).
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Programming and Debugging
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*************************
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@ -252,6 +276,9 @@ References
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.. target-notes::
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.. _EM Software Development Platform user guide:
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https://www.synopsys.com/dw/ipdir.php?ds=arc-em-software-development-platform
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.. _Digilent Pmod Modules:
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http://store.digilentinc.com/pmod-modules
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133
boards/arc/emsdp/emsdp-pinctrl.dtsi
Normal file
133
boards/arc/emsdp/emsdp-pinctrl.dtsi
Normal file
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@ -0,0 +1,133 @@
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/* SPDX-License-Identifier: Apache-2.0 */
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#include <zephyr/dt-bindings/pinctrl/emsdp-pinctrl.h>
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&pinctrl {
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/* PMOD_A */
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pmodA_gpio: pmodA_gpio {
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pinmux = <PMOD_A PMOD_GPIO>;
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};
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pmodA_uarta: pmodA_uarta {
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pinmux = <PMOD_A PMOD_UARTA>;
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};
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pmodA_uartb: pmodA_uartb {
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pinmux = <PMOD_A PMOD_UARTB>;
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};
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pmodA_spi1_cs0: pmodA_spi1_cs0 {
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pinmux = <PMOD_A PMOD_SPI>;
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};
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pmodA_i2c2: pmodA_i2c2 {
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pinmux = <PMOD_A PMOD_I2C>;
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};
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pmodA_pwm1: pmodA_pwm1 {
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pinmux = <PMOD_A PMOD_PWM_MODE1>;
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};
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pmodA_pwm2: pmodA_pwm2 {
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pinmux = <PMOD_A PMOD_PWM_MODE2>;
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};
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/* PMOD_B */
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pmodB_gpio: pmodB_gpio {
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pinmux = <PMOD_B PMOD_GPIO>;
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};
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pmodB_uarta: pmodB_uarta {
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pinmux = <PMOD_B PMOD_UARTA>;
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};
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pmodB_uartb: pmodB_uartb {
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pinmux = <PMOD_B PMOD_UARTB>;
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};
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pmodB_spi1_cs1: pmodB_spi1_cs1 {
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pinmux = <PMOD_B PMOD_SPI>;
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};
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pmodB_i2c2: pmodB_i2c2 {
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pinmux = <PMOD_B PMOD_I2C>;
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};
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pmodB_pwm1: pmodB_pwm1 {
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pinmux = <PMOD_B PMOD_PWM_MODE1>;
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};
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pmodB_pwm2: pmodB_pwm2 {
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pinmux = <PMOD_B PMOD_PWM_MODE2>;
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};
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/* PMOD_C */
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pmodC_gpio: pmodC_gpio {
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pinmux = <PMOD_C PMOD_GPIO>;
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};
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pmodC_uarta: pmodC_uarta {
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pinmux = <PMOD_C PMOD_UARTA>;
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};
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pmodC_uartb: pmodC_uartb {
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pinmux = <PMOD_C PMOD_UARTB>;
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};
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pmodC_spi1_cs2: pmodC_spi1_cs2 {
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pinmux = <PMOD_C PMOD_SPI>;
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};
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pmodC_i2c2: pmodC_i2c2 {
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pinmux = <PMOD_C PMOD_I2C>;
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};
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pmodC_pwm1: pmodC_pwm1 {
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pinmux = <PMOD_C PMOD_PWM_MODE1>;
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};
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pmodC_pwm2: pmodC_pwm2 {
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pinmux = <PMOD_C PMOD_PWM_MODE2>;
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};
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/* ARDUINO_PIN_1 */
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arduino_CFG0_gpio: arduino_CFG0_gpio {
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pinmux = <ARDUINO_PIN_1 ARDUINO_GPIO>;
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};
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arduino_CFG0_uart: arduino_CFG0_uart {
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pinmux = <ARDUINO_PIN_1 ARDUINO_UART>;
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};
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/* ARDUINO_PIN_3 */
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arduino_CFG1_gpio: arduino_CFG1_gpio {
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pinmux = <ARDUINO_PIN_3 ARDUINO_GPIO>;
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};
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arduino_CFG1_pwm: arduino_CFG1_pwm{
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pinmux = <ARDUINO_PIN_3 ARDUINO_PWM>;
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};
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/* ARDUINO_PIN_5 */
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arduino_CFG2_gpio: arduino_CFG2_gpio {
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pinmux = <ARDUINO_PIN_5 ARDUINO_GPIO>;
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};
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arduino_CFG2_pwm: arduino_CFG2_pwm {
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pinmux = <ARDUINO_PIN_5 ARDUINO_PWM>;
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};
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/* ARDUINO_PIN_7 */
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arduino_CFG3_gpio: arduino_CFG3_gpio {
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pinmux = <ARDUINO_PIN_7 ARDUINO_GPIO>;
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};
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arduino_CFG3_pwm: arduino_CFG3_pwm {
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pinmux = <ARDUINO_PIN_7 ARDUINO_PWM>;
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};
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/* ARDUINO_PIN_9 */
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arduino_CFG4_gpio: arduino_CFG4_gpio {
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pinmux = <ARDUINO_PIN_9 ARDUINO_GPIO>;
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};
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arduino_CFG4_pwm: arduino_CFG4_pwm {
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pinmux = <ARDUINO_PIN_9 ARDUINO_PWM>;
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};
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/* ARDUINO_PIN_13 */
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arduino_CFG5_gpio: arduino_CFG5_gpio {
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pinmux = <ARDUINO_PIN_13 ARDUINO_GPIO>;
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};
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arduino_CFG5_spi: arduino_CFG5_spi {
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pinmux = <ARDUINO_PIN_13 ARDUINO_SPI>;
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};
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arduino_CFG5_pwm: arduino_CFG5_pwm {
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pinmux = <ARDUINO_PIN_13 ARDUINO_PWM>;
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};
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/* ARDUINO_PIN_AD5 */
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arduino_CFG6_gpio: arduino_CFG6_gpio {
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pinmux = <ARDUINO_PIN_AD5 ARDUINO_GPIO>;
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};
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arduino_CFG6_i2c: arduino_CFG6_i2c {
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pinmux = <ARDUINO_PIN_AD5 ARDUINO_I2C>;
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};
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};
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@ -9,6 +9,7 @@
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#include <synopsys/emsdp.dtsi>
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#include <mem.h>
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#include "board.dtsi"
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#include "emsdp-pinctrl.dtsi"
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/ {
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model = "emsdp";
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@ -49,5 +50,17 @@
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spi@f1000000 {
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interrupts = <84 1>;
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};
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spi@80010000 {
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interrupts = <63 2>, <64 2>, <65 2>;
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pinctrl-0 = <&arduino_CFG5_spi>;
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pinctrl-names = "default";
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};
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spi@80010100 {
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interrupts = <67 2>, <68 2>, <69 2>;
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pinctrl-0 = <&pmodA_spi1_cs0>;
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pinctrl-names = "default";
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};
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};
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};
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@ -16,3 +16,4 @@ CONFIG_UART_INTERRUPT_DRIVEN=y
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CONFIG_ARC_MPU_ENABLE=y
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CONFIG_GPIO=y
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CONFIG_SPI=y
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CONFIG_PINCTRL=y
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@ -30,3 +30,4 @@ zephyr_library_sources_ifdef(CONFIG_PINCTRL_XMC4XXX pinctrl_xmc4xxx.c)
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zephyr_library_sources_ifdef(CONFIG_PINCTRL_NXP_S32 pinctrl_nxp_s32.c)
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zephyr_library_sources_ifdef(CONFIG_PINCTRL_GECKO pinctrl_gecko.c)
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zephyr_library_sources_ifdef(CONFIG_PINCTRL_TI_K3 pinctrl_ti_k3.c)
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zephyr_library_sources_ifdef(CONFIG_PINCTRL_EMSDP pinctrl_emsdp.c)
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@ -59,5 +59,6 @@ source "drivers/pinctrl/Kconfig.xmc4xxx"
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source "drivers/pinctrl/Kconfig.nxp_s32"
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source "drivers/pinctrl/Kconfig.gecko"
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source "drivers/pinctrl/Kconfig.ti_k3"
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source "drivers/pinctrl/Kconfig.emsdp"
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endif # PINCTRL
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9
drivers/pinctrl/Kconfig.emsdp
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9
drivers/pinctrl/Kconfig.emsdp
Normal file
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@ -0,0 +1,9 @@
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# Copyright (c) 2023 Synopsys
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# SPDX-License-Identifier: Apache-2.0
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config PINCTRL_EMSDP
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bool "EMSDP pinmux driver"
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default y
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depends on DT_HAS_SNPS_EMSDP_PINCTRL_ENABLED
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help
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Enable driver for the synopsys ARC EMSDP pinctrl driver
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287
drivers/pinctrl/pinctrl_emsdp.c
Normal file
287
drivers/pinctrl/pinctrl_emsdp.c
Normal file
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@ -0,0 +1,287 @@
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/*
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* Copyright (c) 2023 Synopsys
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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#define DT_DRV_COMPAT snps_emsdp_pinctrl
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#include <zephyr/arch/cpu.h>
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#include <zephyr/devicetree.h>
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#include <zephyr/drivers/pinctrl.h>
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#include <zephyr/dt-bindings/pinctrl/emsdp-pinctrl.h>
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#define EMSDP_CREG_BASE DT_INST_REG_ADDR(0)
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#define EMSDP_CREG_PMOD_MUX_OFFSET (0x0030)
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#define MUX_SEL0_OFFSET (0)
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#define MUX_SEL1_OFFSET (4)
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#define MUX_SEL2_OFFSET (8)
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#define MUX_SEL3_OFFSET (12)
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#define MUX_SEL4_OFFSET (16)
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#define MUX_SEL5_OFFSET (20)
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#define MUX_SEL6_OFFSET (24)
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#define MUX_SEL7_OFFSET (28)
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#define MUX_SEL0_MASK (0xf << MUX_SEL0_OFFSET)
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#define MUX_SEL1_MASK (0xf << MUX_SEL1_OFFSET)
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#define MUX_SEL2_MASK (0xf << MUX_SEL2_OFFSET)
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#define MUX_SEL3_MASK (0xf << MUX_SEL3_OFFSET)
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#define MUX_SEL4_MASK (0xf << MUX_SEL4_OFFSET)
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#define MUX_SEL5_MASK (0xf << MUX_SEL5_OFFSET)
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#define MUX_SEL6_MASK (0xf << MUX_SEL6_OFFSET)
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#define MUX_SEL7_MASK (0xf << MUX_SEL7_OFFSET)
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/**
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* PMOD A Multiplexor
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*/
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#define PM_A_CFG0_GPIO ((0) << MUX_SEL0_OFFSET)
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#define PM_A_CFG0_I2C ((1) << MUX_SEL0_OFFSET) /* io_i2c_mst2 */
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#define PM_A_CFG0_SPI ((2) << MUX_SEL0_OFFSET) /* io_spi_mst1, cs_0 */
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#define PM_A_CFG0_UART1a ((3) << MUX_SEL0_OFFSET) /* io_uart1 */
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#define PM_A_CFG0_UART1b ((4) << MUX_SEL0_OFFSET) /* io_uart1 */
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#define PM_A_CFG0_PWM1 ((5) << MUX_SEL0_OFFSET)
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#define PM_A_CFG0_PWM2 ((6) << MUX_SEL0_OFFSET)
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#define PM_A_CFG1_GPIO ((0) << MUX_SEL1_OFFSET)
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/**
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* PMOD B Multiplexor
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*/
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#define PM_B_CFG0_GPIO ((0) << MUX_SEL2_OFFSET)
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#define PM_B_CFG0_I2C ((1) << MUX_SEL2_OFFSET) /* io_i2c_mst2 */
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#define PM_B_CFG0_SPI ((2) << MUX_SEL2_OFFSET) /* io_spi_mst1, cs_1 */
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#define PM_B_CFG0_UART2a ((3) << MUX_SEL2_OFFSET) /* io_uart2 */
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#define PM_B_CFG0_UART2b ((4) << MUX_SEL2_OFFSET) /* io_uart2 */
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#define PM_B_CFG0_PWM1 ((5) << MUX_SEL2_OFFSET)
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#define PM_B_CFG0_PWM2 ((6) << MUX_SEL2_OFFSET)
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#define PM_B_CFG1_GPIO ((0) << MUX_SEL3_OFFSET)
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/**
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* PMOD C Multiplexor
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*/
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#define PM_C_CFG0_GPIO ((0) << MUX_SEL4_OFFSET)
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#define PM_C_CFG0_I2C ((1) << MUX_SEL4_OFFSET) /* io_i2c_mst2 */
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#define PM_C_CFG0_SPI ((2) << MUX_SEL4_OFFSET) /* io_spi_mst1, cs_2 */
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#define PM_C_CFG0_UART3a ((3) << MUX_SEL4_OFFSET) /* io_uart3 */
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#define PM_C_CFG0_UART3b ((4) << MUX_SEL4_OFFSET) /* io_uart3 */
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#define PM_C_CFG0_PWM1 ((5) << MUX_SEL4_OFFSET)
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#define PM_C_CFG0_PWM2 ((6) << MUX_SEL4_OFFSET)
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#define PM_C_CFG1_GPIO ((0) << MUX_SEL5_OFFSET)
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/**
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* Arduino Multiplexor
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*/
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#define ARDUINO_CFG0_GPIO ((0) << MUX_SEL0_OFFSET)
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#define ARDUINO_CFG0_UART ((1) << MUX_SEL0_OFFSET) /* io_uart0 */
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#define ARDUINO_CFG1_GPIO ((0) << MUX_SEL1_OFFSET)
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#define ARDUINO_CFG1_PWM ((1) << MUX_SEL1_OFFSET)
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#define ARDUINO_CFG2_GPIO ((0) << MUX_SEL2_OFFSET)
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#define ARDUINO_CFG2_PWM ((1) << MUX_SEL2_OFFSET)
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#define ARDUINO_CFG3_GPIO ((0) << MUX_SEL3_OFFSET)
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#define ARDUINO_CFG3_PWM ((1) << MUX_SEL3_OFFSET)
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#define ARDUINO_CFG4_GPIO ((0) << MUX_SEL4_OFFSET)
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#define ARDUINO_CFG4_PWM ((1) << MUX_SEL4_OFFSET)
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#define ARDUINO_CFG5_GPIO ((0) << MUX_SEL5_OFFSET)
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#define ARDUINO_CFG5_SPI ((1) << MUX_SEL5_OFFSET) /* io_spi_mst0, cs_0 */
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#define ARDUINO_CFG5_PWM1 ((2) << MUX_SEL5_OFFSET)
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#define ARDUINO_CFG5_PWM2 ((3) << MUX_SEL5_OFFSET)
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#define ARDUINO_CFG5_PWM3 ((4) << MUX_SEL5_OFFSET)
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#define ARDUINO_CFG6_GPIO ((0) << MUX_SEL6_OFFSET)
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#define ARDUINO_CFG6_I2C ((1) << MUX_SEL6_OFFSET) /* io_i2c_mst1 */
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static int pinctrl_emsdp_set(uint32_t pin, uint32_t type)
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{
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const uint32_t mux_regs = (EMSDP_CREG_BASE + EMSDP_CREG_PMOD_MUX_OFFSET);
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uint32_t reg;
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if (pin <= PMOD_C) {
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reg = sys_read32(mux_regs + PMOD_MUX_CTRL);
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} else {
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reg = sys_read32(mux_regs + ARDUINO_MUX_CTRL);
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}
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switch (pin) {
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case PMOD_A:
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reg &= ~(MUX_SEL0_MASK);
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switch (type) {
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case PMOD_GPIO:
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reg |= PM_A_CFG0_GPIO;
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break;
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case PMOD_UARTA:
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reg |= PM_A_CFG0_UART1a;
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break;
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case PMOD_UARTB:
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reg |= PM_A_CFG0_UART1b;
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break;
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case PMOD_SPI:
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reg |= PM_A_CFG0_SPI;
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break;
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case PMOD_I2C:
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reg |= PM_A_CFG0_I2C;
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break;
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case PMOD_PWM_MODE1:
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reg |= PM_A_CFG0_PWM1;
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break;
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case PMOD_PWM_MODE2:
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reg |= PM_A_CFG0_PWM2;
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break;
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default:
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break;
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}
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break;
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case PMOD_B:
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reg &= ~(MUX_SEL2_MASK);
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switch (type) {
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case PMOD_GPIO:
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reg |= PM_B_CFG0_GPIO;
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break;
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case PMOD_UARTA:
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reg |= PM_B_CFG0_UART2a;
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break;
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case PMOD_UARTB:
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reg |= PM_A_CFG0_UART1b;
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break;
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case PMOD_SPI:
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reg |= PM_B_CFG0_SPI;
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break;
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case PMOD_I2C:
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reg |= PM_B_CFG0_I2C;
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break;
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case PMOD_PWM_MODE1:
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reg |= PM_B_CFG0_PWM1;
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break;
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case PMOD_PWM_MODE2:
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reg |= PM_B_CFG0_PWM2;
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break;
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default:
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break;
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}
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break;
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case PMOD_C:
|
||||
reg &= ~(MUX_SEL4_MASK);
|
||||
switch (type) {
|
||||
case PMOD_GPIO:
|
||||
reg |= PM_C_CFG0_GPIO;
|
||||
break;
|
||||
case PMOD_UARTA:
|
||||
reg |= PM_C_CFG0_UART3a;
|
||||
break;
|
||||
case PMOD_UARTB:
|
||||
reg |= PM_C_CFG0_UART3b;
|
||||
break;
|
||||
case PMOD_SPI:
|
||||
reg |= PM_C_CFG0_SPI;
|
||||
break;
|
||||
case PMOD_I2C:
|
||||
reg |= PM_C_CFG0_I2C;
|
||||
break;
|
||||
case PMOD_PWM_MODE1:
|
||||
reg |= PM_C_CFG0_PWM1;
|
||||
break;
|
||||
case PMOD_PWM_MODE2:
|
||||
reg |= PM_C_CFG0_PWM2;
|
||||
break;
|
||||
default:
|
||||
break;
|
||||
}
|
||||
break;
|
||||
case ARDUINO_PIN_0:
|
||||
case ARDUINO_PIN_1:
|
||||
reg &= ~MUX_SEL0_MASK;
|
||||
if (type == ARDUINO_GPIO) {
|
||||
reg |= ARDUINO_CFG0_GPIO;
|
||||
} else if (type == ARDUINO_UART) {
|
||||
reg |= ARDUINO_CFG0_UART;
|
||||
}
|
||||
break;
|
||||
case ARDUINO_PIN_2:
|
||||
case ARDUINO_PIN_3:
|
||||
reg &= ~MUX_SEL1_MASK;
|
||||
if (type == ARDUINO_GPIO) {
|
||||
reg |= ARDUINO_CFG1_GPIO;
|
||||
} else if (type == ARDUINO_PWM) {
|
||||
reg |= ARDUINO_CFG1_PWM;
|
||||
}
|
||||
break;
|
||||
case ARDUINO_PIN_4:
|
||||
case ARDUINO_PIN_5:
|
||||
reg &= ~MUX_SEL2_MASK;
|
||||
if (type == ARDUINO_GPIO) {
|
||||
reg |= ARDUINO_CFG2_GPIO;
|
||||
} else if (type == ARDUINO_PWM) {
|
||||
reg |= ARDUINO_CFG2_PWM;
|
||||
}
|
||||
break;
|
||||
case ARDUINO_PIN_6:
|
||||
case ARDUINO_PIN_7:
|
||||
reg &= ~MUX_SEL3_MASK;
|
||||
if (type == ARDUINO_GPIO) {
|
||||
reg |= ARDUINO_CFG3_GPIO;
|
||||
} else if (type == ARDUINO_PWM) {
|
||||
reg |= ARDUINO_CFG3_PWM;
|
||||
}
|
||||
break;
|
||||
case ARDUINO_PIN_8:
|
||||
case ARDUINO_PIN_9:
|
||||
reg &= ~MUX_SEL4_MASK;
|
||||
if (type == ARDUINO_GPIO) {
|
||||
reg |= ARDUINO_CFG4_GPIO;
|
||||
} else if (type == ARDUINO_PWM) {
|
||||
reg |= ARDUINO_CFG4_PWM;
|
||||
}
|
||||
break;
|
||||
case ARDUINO_PIN_10:
|
||||
case ARDUINO_PIN_11:
|
||||
case ARDUINO_PIN_12:
|
||||
case ARDUINO_PIN_13:
|
||||
reg &= ~MUX_SEL5_MASK;
|
||||
if (type == ARDUINO_GPIO) {
|
||||
reg |= ARDUINO_CFG5_GPIO;
|
||||
} else if (type == ARDUINO_SPI) {
|
||||
reg |= ARDUINO_CFG5_SPI;
|
||||
} else if (type == ARDUINO_PWM) {
|
||||
reg |= ARDUINO_CFG5_PWM1;
|
||||
}
|
||||
break;
|
||||
case ARDUINO_PIN_AD4:
|
||||
case ARDUINO_PIN_AD5:
|
||||
reg &= ~MUX_SEL6_MASK;
|
||||
if (type == ARDUINO_GPIO) {
|
||||
reg |= ARDUINO_CFG6_GPIO;
|
||||
} else if (type == ARDUINO_I2C) {
|
||||
reg |= ARDUINO_CFG6_I2C;
|
||||
}
|
||||
break;
|
||||
default:
|
||||
break;
|
||||
}
|
||||
|
||||
if (pin <= PMOD_C) {
|
||||
sys_write32(reg, mux_regs + PMOD_MUX_CTRL);
|
||||
} else {
|
||||
sys_write32(reg, mux_regs + ARDUINO_MUX_CTRL);
|
||||
}
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
int pinctrl_configure_pins(const pinctrl_soc_pin_t *pins, uint8_t pin_cnt, uintptr_t reg)
|
||||
{
|
||||
ARG_UNUSED(reg);
|
||||
int i;
|
||||
|
||||
for (i = 0; i < pin_cnt; i++) {
|
||||
pinctrl_emsdp_set(pins[i].pin, pins[i].type);
|
||||
}
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
|
@ -101,6 +101,11 @@
|
|||
status = "disabled";
|
||||
};
|
||||
|
||||
pinctrl: pinctrl@f0001000 {
|
||||
compatible = "snps,emsdp-pinctrl";
|
||||
reg = <0xf0001000 0x100>;
|
||||
};
|
||||
|
||||
/* SPI-flash for user data */
|
||||
spi1: spi@f1000000 {
|
||||
compatible = "snps,designware-spi";
|
||||
|
|
@ -120,5 +125,32 @@
|
|||
};
|
||||
};
|
||||
|
||||
/* DFSS-SPI0 */
|
||||
spi2: spi@80010000 {
|
||||
compatible = "snps,designware-spi";
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
reg = <0x80010000 0x100>;
|
||||
clocks = <&spiclk>;
|
||||
interrupts = <63 2>, <64 2>, <65 2>;
|
||||
interrupt-names = "err_int", "rx_avail", "tx_req";
|
||||
interrupt-parent = <&intc>;
|
||||
aux_reg;
|
||||
fifo-depth = <16>;
|
||||
};
|
||||
|
||||
/* DFSS-SPI1 */
|
||||
spi3: spi@80010100 {
|
||||
compatible = "snps,designware-spi";
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
reg = <0x80010100 0x100>;
|
||||
clocks = <&spiclk>;
|
||||
interrupts = <67 2>, <68 2>, <69 2>;
|
||||
interrupt-names = "err_int", "rx_avail", "tx_req";
|
||||
interrupt-parent = <&intc>;
|
||||
aux_reg;
|
||||
fifo-depth = <16>;
|
||||
};
|
||||
};
|
||||
};
|
||||
|
|
|
|||
39
dts/bindings/pinctrl/snps,emsdp-pinctrl.yaml
Normal file
39
dts/bindings/pinctrl/snps,emsdp-pinctrl.yaml
Normal file
|
|
@ -0,0 +1,39 @@
|
|||
# Copyright (c) 2023 Synopsys, Inc. All rights reserved.
|
||||
# SPDX-License-Identifier: Apache-2.0
|
||||
|
||||
description: |
|
||||
Synopsys ARC EMSDP board Pin controller for Pmod and Arduino shield interface.
|
||||
|
||||
Device pin configuration should be placed in the child nodes of this node.
|
||||
Populate the 'pinmux' field with a pair consisting of a pin number and its IO
|
||||
function.
|
||||
|
||||
For example, setting PmodA to SPI would look like this:
|
||||
|
||||
#include <zephyr/dt-bindings/pinctrl/emsdp-pinctrl.h>
|
||||
|
||||
&pinctrl {
|
||||
pmodA_spi1_cs0: pmodA_spi1_cs0 {
|
||||
pinmux = <PMOD_A PMOD_SPI>;
|
||||
};
|
||||
};
|
||||
|
||||
compatible: "snps,emsdp-pinctrl"
|
||||
|
||||
include: base.yaml
|
||||
|
||||
properties:
|
||||
reg:
|
||||
required: true
|
||||
|
||||
child-binding:
|
||||
description: |
|
||||
This binding gives a base representation of the EMSDP pins
|
||||
configuration.
|
||||
|
||||
properties:
|
||||
pinmux:
|
||||
required: true
|
||||
type: array
|
||||
description: |
|
||||
EMSDP pin's configuration (pin, IO function).
|
||||
57
include/zephyr/dt-bindings/pinctrl/emsdp-pinctrl.h
Normal file
57
include/zephyr/dt-bindings/pinctrl/emsdp-pinctrl.h
Normal file
|
|
@ -0,0 +1,57 @@
|
|||
/*
|
||||
* Copyright (c) 2023 Synopsys
|
||||
*
|
||||
* SPDX-License-Identifier: Apache-2.0
|
||||
*/
|
||||
|
||||
#ifndef ZEPHYR_INCLUDE_DT_BINDINGS_PINCTRL_EMSDP_PINCTRL_H_
|
||||
#define ZEPHYR_INCLUDE_DT_BINDINGS_PINCTRL_EMSDP_PINCTRL_H_
|
||||
|
||||
/**
|
||||
* Mux Control Register Index
|
||||
*/
|
||||
#define PMOD_MUX_CTRL 0 /*!< 32-bits, offset 0x0 */
|
||||
|
||||
#define ARDUINO_MUX_CTRL 4 /*!< 32-bits, offset 0x4 */
|
||||
|
||||
#define PMOD_A 0
|
||||
#define PMOD_B 1
|
||||
#define PMOD_C 2
|
||||
#define ARDUINO_PIN_0 3
|
||||
#define ARDUINO_PIN_1 4
|
||||
#define ARDUINO_PIN_2 5
|
||||
#define ARDUINO_PIN_3 6
|
||||
#define ARDUINO_PIN_4 7
|
||||
#define ARDUINO_PIN_5 8
|
||||
#define ARDUINO_PIN_6 9
|
||||
#define ARDUINO_PIN_7 10
|
||||
#define ARDUINO_PIN_8 11
|
||||
#define ARDUINO_PIN_9 12
|
||||
#define ARDUINO_PIN_10 13
|
||||
#define ARDUINO_PIN_11 14
|
||||
#define ARDUINO_PIN_12 15
|
||||
#define ARDUINO_PIN_13 16
|
||||
#define ARDUINO_PIN_AD0 17
|
||||
#define ARDUINO_PIN_AD1 18
|
||||
#define ARDUINO_PIN_AD2 19
|
||||
#define ARDUINO_PIN_AD3 20
|
||||
#define ARDUINO_PIN_AD4 21
|
||||
#define ARDUINO_PIN_AD5 22
|
||||
|
||||
#define PMOD_GPIO 0
|
||||
#define PMOD_UARTA 1
|
||||
#define PMOD_UARTB 2
|
||||
#define PMOD_SPI 3
|
||||
#define PMOD_I2C 4
|
||||
#define PMOD_PWM_MODE1 5
|
||||
#define PMOD_PWM_MODE2 6
|
||||
#define PMOD_PWM_MODE3 7
|
||||
#define ARDUINO_GPIO 8
|
||||
#define ARDUINO_UART 9
|
||||
#define ARDUINO_SPI 10
|
||||
#define ARDUINO_I2C 11
|
||||
#define ARDUINO_PWM 12
|
||||
#define ARDUINO_ADC 13
|
||||
|
||||
|
||||
#endif /* ZEPHYR_INCLUDE_DT_BINDINGS_PINCTRL_EMSDP_PINCTRL_H_ */
|
||||
30
soc/arc/snps_emsdp/pinctrl_soc.h
Normal file
30
soc/arc/snps_emsdp/pinctrl_soc.h
Normal file
|
|
@ -0,0 +1,30 @@
|
|||
/*
|
||||
* Copyright (c) 2023 Synopsys
|
||||
*
|
||||
* SPDX-License-Identifier: Apache-2.0
|
||||
*/
|
||||
|
||||
#ifndef ZEPHYR_SOC_ARC_SNPS_EMSDP_PINCTRL_H_
|
||||
#define ZEPHYR_SOC_ARC_SNPS_EMSDP_PINCTRL_H_
|
||||
|
||||
#include <zephyr/devicetree.h>
|
||||
#include <zephyr/types.h>
|
||||
|
||||
typedef struct pinctrl_soc_pin_t {
|
||||
uint8_t pin;
|
||||
uint8_t type;
|
||||
} pinctrl_soc_pin_t;
|
||||
|
||||
#define EMSDP_DT_PIN(node_id) \
|
||||
{ \
|
||||
.pin = DT_PROP_BY_IDX(node_id, pinmux, 0), \
|
||||
.type = DT_PROP_BY_IDX(node_id, pinmux, 1) \
|
||||
},
|
||||
|
||||
#define Z_PINCTRL_STATE_PIN_INIT(node_id, prop, idx) \
|
||||
EMSDP_DT_PIN(DT_PROP_BY_IDX(node_id, prop, idx))
|
||||
|
||||
#define Z_PINCTRL_STATE_PINS_INIT(node_id, prop) \
|
||||
{ DT_FOREACH_PROP_ELEM(node_id, prop, Z_PINCTRL_STATE_PIN_INIT) }
|
||||
|
||||
#endif /* ZEPHYR_SOC_ARC_SNPS_EMSDP_PINCTRL_H_ */
|
||||
Loading…
Add table
Add a link
Reference in a new issue