drivers/interrupt_controller: Normalize DT aliases consitently for DW
DT_<domain>_DW_<num>_<option> as for SPI, GPIO, DMA etc... Signed-off-by: Tomasz Bursztyka <tomasz.bursztyka@linux.intel.com>
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82ecefc11c
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4b94668f5b
3 changed files with 18 additions and 14 deletions
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@ -56,11 +56,11 @@ static void dw_ictl_isr(void *arg)
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(struct dw_ictl_registers *)dw->base_addr;
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dw_ictl_dispatch_child_isrs(regs->irq_maskstatus_l,
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config->isr_table_offset);
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config->isr_table_offset);
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if (config->numirqs > 32) {
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dw_ictl_dispatch_child_isrs(regs->irq_maskstatus_h,
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config->isr_table_offset + 32);
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config->isr_table_offset + 32);
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}
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}
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@ -138,14 +138,14 @@ static int dw_ictl_intr_get_line_state(struct device *dev, unsigned int irq)
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static void dw_ictl_config_irq(struct device *port);
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static const struct dw_ictl_config dw_config = {
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.irq_num = DT_DW_ICTL_IRQ,
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.irq_num = DT_INTC_DW_0_BASE_ADDR,
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.numirqs = DW_ICTL_NUM_IRQS,
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.isr_table_offset = CONFIG_DW_ISR_TBL_OFFSET,
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.config_func = dw_ictl_config_irq,
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};
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static struct dw_ictl_runtime dw_runtime = {
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.base_addr = DT_DW_ICTL_BASE_ADDR,
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.base_addr = DT_ICTL_DW_0_BASE_ADDR,
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};
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static const struct irq_next_level_api dw_ictl_apis = {
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@ -155,12 +155,12 @@ static const struct irq_next_level_api dw_ictl_apis = {
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.intr_get_line_state = dw_ictl_intr_get_line_state,
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};
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DEVICE_AND_API_INIT(dw_ictl, CONFIG_DW_ICTL_NAME, dw_ictl_initialize,
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DEVICE_AND_API_INIT(dw_ictl, DT_INTC_DW_0_NAME, dw_ictl_initialize,
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&dw_runtime, &dw_config,
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POST_KERNEL, CONFIG_DW_ICTL_INIT_PRIORITY, &dw_ictl_apis);
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static void dw_ictl_config_irq(struct device *port)
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{
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IRQ_CONNECT(DT_DW_ICTL_IRQ, DT_DW_ICTL_IRQ_PRI, dw_ictl_isr,
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DEVICE_GET(dw_ictl), DT_DW_ICTL_IRQ_FLAGS);
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IRQ_CONNECT(DT_INTC_DW_0_IRQ, DT_INTC_DW_0_IRQ_PRI, dw_ictl_isr,
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DEVICE_GET(dw_ictl), DT_INTC_DW_0_IRQ_FLAGS);
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}
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@ -35,10 +35,14 @@
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#define DT_CAVS_ICTL_3_IRQ_PRI DT_INTEL_CAVS_INTC_78830_IRQ_0_PRIORITY
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#define DT_CAVS_ICTL_3_IRQ_FLAGS DT_INTEL_CAVS_INTC_78830_IRQ_0_SENSE
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#define DT_DW_ICTL_BASE_ADDR DT_SNPS_DESIGNWARE_INTC_81800_BASE_ADDRESS
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#define DT_DW_ICTL_IRQ DT_SNPS_DESIGNWARE_INTC_81800_IRQ_0
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#define DT_DW_ICTL_IRQ_PRI DT_SNPS_DESIGNWARE_INTC_81800_IRQ_0_PRIORITY
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#define DT_DW_ICTL_IRQ_FLAGS DT_SNPS_DESIGNWARE_INTC_81800_IRQ_0_SENSE
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#define DT_INTC_DW_0_BASE_ADDR \
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DT_SNPS_DESIGNWARE_INTC_81800_BASE_ADDRESS
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#define DT_INTC_DW_0_NAME DT_SNPS_DESIGNWARE_INTC_81800_LABEL
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#define DT_INTC_DW_0_IRQ DDT_SNPS_DESIGNWARE_INTC_81800_IRQ_0
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#define DT_INTC_DW_0_IRQ_PRI \
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DT_SNPS_DESIGNWARE_INTC_81800_IRQ_0_PRIORITY
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#define DT_INTC_DW_0_IRQ_FLAGS \
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DT_SNPS_DESIGNWARE_INTC_81800_IRQ_0_SENSE
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#define DT_SPI_DW_0_BASE_ADDRESS \
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DT_SNPS_DESIGNWARE_SPI_E000_BASE_ADDRESS
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@ -54,7 +54,7 @@ void z_soc_irq_enable(u32_t irq)
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switch (CAVS_IRQ_NUMBER(irq)) {
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case DW_ICTL_IRQ_CAVS_OFFSET:
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dev_ictl = device_get_binding(CONFIG_DW_ICTL_NAME);
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dev_ictl = device_get_binding(DT_INTC_DW_0_NAME);
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break;
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default:
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/* The source of the interrupt is in CAVS interrupt logic */
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@ -112,7 +112,7 @@ void z_soc_irq_disable(u32_t irq)
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switch (CAVS_IRQ_NUMBER(irq)) {
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case DW_ICTL_IRQ_CAVS_OFFSET:
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dev_ictl = device_get_binding(CONFIG_DW_ICTL_NAME);
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dev_ictl = device_get_binding(DT_INTC_DW_0_NAME);
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break;
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default:
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/* The source of the interrupt is in CAVS interrupt logic */
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@ -179,7 +179,7 @@ int z_soc_irq_is_enabled(unsigned int irq)
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switch (CAVS_IRQ_NUMBER(irq)) {
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case DW_ICTL_IRQ_CAVS_OFFSET:
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dev_ictl = device_get_binding(CONFIG_DW_ICTL_NAME);
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dev_ictl = device_get_binding(DT_INTC_DW_0_NAME);
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break;
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default:
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/* The source of the interrupt is in CAVS interrupt logic */
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