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stm32: rename SOC_STM32F1X -> SOC_SERIES_STM32F1X

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Use SOC_SERIES_* for naming SoCs with similar features and architectures
with the goal of code reuse. The Series in the config variable should avoid
name collisions and clearly denote the relationships within an SoC family.

Change-Id: I7a98542f96b5d5dc3acc23782c4d45f98cceb599
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
This commit is contained in:
Anas Nashif 2016-04-02 22:40:26 -04:00 • committed by Anas Nashif
commit 4b411b34a1
11 changed files with 28 additions and 28 deletions
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2
arch/arm/soc/st_stm32/Kconfig.soc
View file

@ -15,7 +15,7 @@
# limitations under the License. # limitations under the License.
# #
config SOC_STM32F1X config SOC_SERIES_STM32F1X
bool "STM32F1x Series MCU" bool "STM32F1x Series MCU"
select CPU_CORTEX_M select CPU_CORTEX_M
select CPU_CORTEX_M3 select CPU_CORTEX_M3

4
arch/arm/soc/st_stm32/stm32f1/Kconfig.defconfig.family
View file

@ -15,7 +15,7 @@
# limitations under the License. # limitations under the License.
# #
if SOC_STM32F1X if SOC_SERIES_STM32F1X
source "arch/arm/soc/st_stm32/stm32f1/Kconfig.defconfig.stm32f1*" source "arch/arm/soc/st_stm32/stm32f1/Kconfig.defconfig.stm32f1*"
@ -32,4 +32,4 @@ config NUM_IRQ_PRIO_BITS
int int
default 4 default 4
endif # SOC_STM32F1X endif # SOC_SERIES_STM32F1X

2
arch/arm/soc/st_stm32/stm32f1/Kconfig.soc.family
View file

@ -17,7 +17,7 @@
choice choice
prompt "STM32F1x MCU Selection" prompt "STM32F1x MCU Selection"
depends on SOC_STM32F1X depends on SOC_SERIES_STM32F1X
config SOC_STM32F103VE config SOC_STM32F103VE
bool "STM32F103VE" bool "STM32F103VE"

2
boards/nucleo_f103rb/nucleo_f103rb_defconfig
View file

@ -1,7 +1,7 @@
CONFIG_ARM=y CONFIG_ARM=y
CONFIG_BOARD_NUCLEO_F103RB=y CONFIG_BOARD_NUCLEO_F103RB=y
CONFIG_SOC_FAMILY_STM32=y CONFIG_SOC_FAMILY_STM32=y
CONFIG_SOC_STM32F1X=y CONFIG_SOC_SERIES_STM32F1X=y
CONFIG_SOC_STM32F103RB=y CONFIG_SOC_STM32F103RB=y
CONFIG_CORTEX_M_SYSTICK=y CONFIG_CORTEX_M_SYSTICK=y
# 72MHz system clock # 72MHz system clock

2
boards/stm32_mini_a15/stm32_mini_a15_defconfig
View file

@ -1,7 +1,7 @@
CONFIG_ARM=y CONFIG_ARM=y
CONFIG_BOARD_STM32_MINI_A15=y CONFIG_BOARD_STM32_MINI_A15=y
CONFIG_SOC_FAMILY_STM32=y CONFIG_SOC_FAMILY_STM32=y
CONFIG_SOC_STM32F1X=y CONFIG_SOC_SERIES_STM32F1X=y
CONFIG_SOC_STM32F103VE=y CONFIG_SOC_STM32F103VE=y
CONFIG_CORTEX_M_SYSTICK=y CONFIG_CORTEX_M_SYSTICK=y
# 72MHz system clock # 72MHz system clock

6
drivers/clock_control/Kconfig.stm32f10x
View file

@ -15,13 +15,13 @@
# limitations under the License. # limitations under the License.
# #
if SOC_STM32F1X if SOC_SERIES_STM32F1X
menuconfig CLOCK_CONTROL_STM32F10X menuconfig CLOCK_CONTROL_STM32F10X
bool bool
prompt "STM32F10x Reset & Clock Control" prompt "STM32F10x Reset & Clock Control"
depends on CLOCK_CONTROL && SOC_STM32F1X depends on CLOCK_CONTROL && SOC_SERIES_STM32F1X
default y if SOC_STM32F1X default y if SOC_SERIES_STM32F1X
help help
Enable driver for Reset & Clock Control subsystem found Enable driver for Reset & Clock Control subsystem found
in STM32F1 family of MCUs in STM32F1 family of MCUs

10
drivers/gpio/gpio_stm32.c
View file

@ -229,7 +229,7 @@ DEVICE_AND_API_INIT(gpio_stm32_## __suffix, \
#ifdef CONFIG_GPIO_STM32_PORTA #ifdef CONFIG_GPIO_STM32_PORTA
GPIO_DEVICE_INIT("GPIOA", a, GPIOA_BASE, STM32_PORTA, GPIO_DEVICE_INIT("GPIOA", a, GPIOA_BASE, STM32_PORTA,
#ifdef CONFIG_SOC_STM32F1X #ifdef CONFIG_SOC_SERIES_STM32F1X
STM32F10X_CLOCK_SUBSYS_IOPA STM32F10X_CLOCK_SUBSYS_IOPA
| STM32F10X_CLOCK_SUBSYS_AFIO | STM32F10X_CLOCK_SUBSYS_AFIO
#endif #endif
@ -238,7 +238,7 @@ GPIO_DEVICE_INIT("GPIOA", a, GPIOA_BASE, STM32_PORTA,
#ifdef CONFIG_GPIO_STM32_PORTB #ifdef CONFIG_GPIO_STM32_PORTB
GPIO_DEVICE_INIT("GPIOB", b, GPIOB_BASE, STM32_PORTB, GPIO_DEVICE_INIT("GPIOB", b, GPIOB_BASE, STM32_PORTB,
#ifdef CONFIG_SOC_STM32F1X #ifdef CONFIG_SOC_SERIES_STM32F1X
STM32F10X_CLOCK_SUBSYS_IOPB STM32F10X_CLOCK_SUBSYS_IOPB
| STM32F10X_CLOCK_SUBSYS_AFIO | STM32F10X_CLOCK_SUBSYS_AFIO
#endif #endif
@ -247,7 +247,7 @@ GPIO_DEVICE_INIT("GPIOB", b, GPIOB_BASE, STM32_PORTB,
#ifdef CONFIG_GPIO_STM32_PORTC #ifdef CONFIG_GPIO_STM32_PORTC
GPIO_DEVICE_INIT("GPIOC", c, GPIOC_BASE, STM32_PORTC, GPIO_DEVICE_INIT("GPIOC", c, GPIOC_BASE, STM32_PORTC,
#ifdef CONFIG_SOC_STM32F1X #ifdef CONFIG_SOC_SERIES_STM32F1X
STM32F10X_CLOCK_SUBSYS_IOPC STM32F10X_CLOCK_SUBSYS_IOPC
| STM32F10X_CLOCK_SUBSYS_AFIO | STM32F10X_CLOCK_SUBSYS_AFIO
#endif #endif
@ -256,7 +256,7 @@ GPIO_DEVICE_INIT("GPIOC", c, GPIOC_BASE, STM32_PORTC,
#ifdef CONFIG_GPIO_STM32_PORTD #ifdef CONFIG_GPIO_STM32_PORTD
GPIO_DEVICE_INIT("GPIOD", d, GPIOD_BASE, STM32_PORTD, GPIO_DEVICE_INIT("GPIOD", d, GPIOD_BASE, STM32_PORTD,
#ifdef CONFIG_SOC_STM32F1X #ifdef CONFIG_SOC_SERIES_STM32F1X
STM32F10X_CLOCK_SUBSYS_IOPD STM32F10X_CLOCK_SUBSYS_IOPD
| STM32F10X_CLOCK_SUBSYS_AFIO | STM32F10X_CLOCK_SUBSYS_AFIO
#endif #endif
@ -265,7 +265,7 @@ GPIO_DEVICE_INIT("GPIOD", d, GPIOD_BASE, STM32_PORTD,
#ifdef CONFIG_GPIO_STM32_PORTE #ifdef CONFIG_GPIO_STM32_PORTE
GPIO_DEVICE_INIT("GPIOE", e, GPIOE_BASE, STM32_PORTE, GPIO_DEVICE_INIT("GPIOE", e, GPIOE_BASE, STM32_PORTE,
#ifdef CONFIG_SOC_STM32F1X #ifdef CONFIG_SOC_SERIES_STM32F1X
STM32F10X_CLOCK_SUBSYS_IOPE STM32F10X_CLOCK_SUBSYS_IOPE
| STM32F10X_CLOCK_SUBSYS_AFIO | STM32F10X_CLOCK_SUBSYS_AFIO
#endif #endif

6
drivers/interrupt_controller/exti_stm32.c
View file

@ -52,7 +52,7 @@ struct __exti_cb {
void *data; void *data;
}; };
#ifdef CONFIG_SOC_STM32F1X #ifdef CONFIG_SOC_SERIES_STM32F1X
#define EXTI_LINES 19 #define EXTI_LINES 19
#endif #endif
@ -75,7 +75,7 @@ void stm32_exti_enable(struct device *dev, int line)
exti->imr |= 1 << line; exti->imr |= 1 << line;
#ifdef CONFIG_SOC_STM32F1X #ifdef CONFIG_SOC_SERIES_STM32F1X
if (line >= 5 && line <= 9) { if (line >= 5 && line <= 9) {
irqnum = STM32F1_IRQ_EXTI9_5; irqnum = STM32F1_IRQ_EXTI9_5;
} else if (line >= 10 && line <= 15) { } else if (line >= 10 && line <= 15) {
@ -246,7 +246,7 @@ DEVICE_INIT(exti_stm32, STM32_EXTI_NAME, stm32_exti_init,
*/ */
static void __stm32_exti_connect_irqs(struct device *dev) static void __stm32_exti_connect_irqs(struct device *dev)
{ {
#ifdef CONFIG_SOC_STM32F1X #ifdef CONFIG_SOC_SERIES_STM32F1X
IRQ_CONNECT(STM32F1_IRQ_EXTI0, IRQ_CONNECT(STM32F1_IRQ_EXTI0,
CONFIG_EXTI_STM32_EXTI0_IRQ_PRI, CONFIG_EXTI_STM32_EXTI0_IRQ_PRI,
__stm32_exti_isr_0, DEVICE_GET(exti_stm32), __stm32_exti_isr_0, DEVICE_GET(exti_stm32),

2
drivers/pinmux/stm32/pinmux_stm32.h
View file

@ -283,7 +283,7 @@ void stm32_setup_pins(const struct pin_config *pinconf,
/* common pinmux device name for all STM32 chips */ /* common pinmux device name for all STM32 chips */
#define STM32_PINMUX_NAME "stm32-pinmux" #define STM32_PINMUX_NAME "stm32-pinmux"
#ifdef CONFIG_SOC_STM32F1X #ifdef CONFIG_SOC_SERIES_STM32F1X
#include "pinmux_stm32f1.h" #include "pinmux_stm32f1.h"
#endif #endif

18
drivers/serial/uart_stm32.c
View file

@ -328,9 +328,9 @@ static struct uart_stm32_config uart_stm32_dev_cfg_0 = {
.irq_config_func = uart_stm32_irq_config_func_0, .irq_config_func = uart_stm32_irq_config_func_0,
#endif /* CONFIG_UART_INTERRUPT_DRIVEN */ #endif /* CONFIG_UART_INTERRUPT_DRIVEN */
}, },
#ifdef CONFIG_SOC_STM32F1X #ifdef CONFIG_SOC_SERIES_STM32F1X
.clock_subsys = UINT_TO_POINTER(STM32F10X_CLOCK_SUBSYS_USART1), .clock_subsys = UINT_TO_POINTER(STM32F10X_CLOCK_SUBSYS_USART1),
#endif /* CONFIG_SOC_STM32F1X */ #endif /* CONFIG_SOC_SERIES_STM32F1X */
}; };
static struct uart_stm32_data uart_stm32_dev_data_0 = { static struct uart_stm32_data uart_stm32_dev_data_0 = {
@ -346,7 +346,7 @@ DEVICE_AND_API_INIT(uart_stm32_0, CONFIG_UART_STM32_PORT_0_NAME,
#ifdef CONFIG_UART_INTERRUPT_DRIVEN #ifdef CONFIG_UART_INTERRUPT_DRIVEN
static void uart_stm32_irq_config_func_0(struct device *dev) static void uart_stm32_irq_config_func_0(struct device *dev)
{ {
#ifdef CONFIG_SOC_STM32F1X #ifdef CONFIG_SOC_SERIES_STM32F1X
#define PORT_0_IRQ STM32F1_IRQ_USART1 #define PORT_0_IRQ STM32F1_IRQ_USART1
#endif #endif
IRQ_CONNECT(PORT_0_IRQ, IRQ_CONNECT(PORT_0_IRQ,
@ -372,9 +372,9 @@ static struct uart_stm32_config uart_stm32_dev_cfg_1 = {
.irq_config_func = uart_stm32_irq_config_func_1, .irq_config_func = uart_stm32_irq_config_func_1,
#endif /* CONFIG_UART_INTERRUPT_DRIVEN */ #endif /* CONFIG_UART_INTERRUPT_DRIVEN */
}, },
#ifdef CONFIG_SOC_STM32F1X #ifdef CONFIG_SOC_SERIES_STM32F1X
.clock_subsys = UINT_TO_POINTER(STM32F10X_CLOCK_SUBSYS_USART2), .clock_subsys = UINT_TO_POINTER(STM32F10X_CLOCK_SUBSYS_USART2),
#endif /* CONFIG_SOC_STM32F1X */ #endif /* CONFIG_SOC_SERIES_STM32F1X */
}; };
static struct uart_stm32_data uart_stm32_dev_data_1 = { static struct uart_stm32_data uart_stm32_dev_data_1 = {
@ -390,7 +390,7 @@ DEVICE_AND_API_INIT(uart_stm32_1, CONFIG_UART_STM32_PORT_1_NAME,
#ifdef CONFIG_UART_INTERRUPT_DRIVEN #ifdef CONFIG_UART_INTERRUPT_DRIVEN
static void uart_stm32_irq_config_func_1(struct device *dev) static void uart_stm32_irq_config_func_1(struct device *dev)
{ {
#ifdef CONFIG_SOC_STM32F1X #ifdef CONFIG_SOC_SERIES_STM32F1X
#define PORT_1_IRQ STM32F1_IRQ_USART2 #define PORT_1_IRQ STM32F1_IRQ_USART2
#endif #endif
IRQ_CONNECT(PORT_1_IRQ, IRQ_CONNECT(PORT_1_IRQ,
@ -416,9 +416,9 @@ static struct uart_stm32_config uart_stm32_dev_cfg_2 = {
.irq_config_func = uart_stm32_irq_config_func_2, .irq_config_func = uart_stm32_irq_config_func_2,
#endif /* CONFIG_UART_INTERRUPT_DRIVEN */ #endif /* CONFIG_UART_INTERRUPT_DRIVEN */
}, },
#ifdef CONFIG_SOC_STM32F1X #ifdef CONFIG_SOC_SERIES_STM32F1X
.clock_subsys = UINT_TO_POINTER(STM32F10X_CLOCK_SUBSYS_USART3), .clock_subsys = UINT_TO_POINTER(STM32F10X_CLOCK_SUBSYS_USART3),
#endif /* CONFIG_SOC_STM32F1X */ #endif /* CONFIG_SOC_SERIES_STM32F1X */
}; };
static struct uart_stm32_data uart_stm32_dev_data_2 = { static struct uart_stm32_data uart_stm32_dev_data_2 = {
@ -434,7 +434,7 @@ DEVICE_AND_API_INIT(uart_stm32_2, CONFIG_UART_STM32_PORT_2_NAME,
#ifdef CONFIG_UART_INTERRUPT_DRIVEN #ifdef CONFIG_UART_INTERRUPT_DRIVEN
static void uart_stm32_irq_config_func_2(struct device *dev) static void uart_stm32_irq_config_func_2(struct device *dev)
{ {
#ifdef CONFIG_SOC_STM32F1X #ifdef CONFIG_SOC_SERIES_STM32F1X
#define PORT_2_IRQ STM32F1_IRQ_USART3 #define PORT_2_IRQ STM32F1_IRQ_USART3
#endif #endif
IRQ_CONNECT(PORT_2_IRQ, IRQ_CONNECT(PORT_2_IRQ,

2
include/drivers/clock_control/stm32_clock_control.h
View file

@ -21,7 +21,7 @@
/* common clock control device name for all STM32 chips */ /* common clock control device name for all STM32 chips */
#define STM32_CLOCK_CONTROL_NAME "stm32-cc" #define STM32_CLOCK_CONTROL_NAME "stm32-cc"
#ifdef CONFIG_SOC_STM32F1X #ifdef CONFIG_SOC_SERIES_STM32F1X
#include "stm32f1_clock_control.h" #include "stm32f1_clock_control.h"
#endif #endif