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boards: soc: arm: Set zephyr,itcm chosen node for i.MX RT boards

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Sets the device tree chosen node for instruction tightly coupled memory
(ITCM) on all i.MX RT boards. Leverages the common Cortex-M linker
section instead of the SoC-specific one.

Signed-off-by: Maureen Helm <maureen.helm@nxp.com>
This commit is contained in:
Maureen Helm 2021-01-07 10:41:06 -06:00 • committed by Ioannis Glaropoulos
commit 4afc4781cd
8 changed files with 7 additions and 3 deletions
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1
boards/arm/mimxrt1010_evk/mimxrt1010_evk.dts
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@ -19,6 +19,7 @@
chosen { chosen {
zephyr,sram = &dtcm; zephyr,sram = &dtcm;
zephyr,itcm = &itcm;
zephyr,console = &lpuart1; zephyr,console = &lpuart1;
zephyr,shell-uart = &lpuart1; zephyr,shell-uart = &lpuart1;
}; };

1
boards/arm/mimxrt1015_evk/mimxrt1015_evk.dts
View file

@ -19,6 +19,7 @@
chosen { chosen {
zephyr,sram = &dtcm; zephyr,sram = &dtcm;
zephyr,itcm = &itcm;
zephyr,console = &lpuart1; zephyr,console = &lpuart1;
zephyr,shell-uart = &lpuart1; zephyr,shell-uart = &lpuart1;
}; };

1
boards/arm/mimxrt1020_evk/mimxrt1020_evk.dts
View file

@ -19,6 +19,7 @@
chosen { chosen {
zephyr,sram = &sdram0; zephyr,sram = &sdram0;
zephyr,itcm = &itcm;
zephyr,dtcm = &dtcm; zephyr,dtcm = &dtcm;
zephyr,console = &lpuart1; zephyr,console = &lpuart1;
zephyr,shell-uart = &lpuart1; zephyr,shell-uart = &lpuart1;

1
boards/arm/mimxrt1050_evk/mimxrt1050_evk.dts
View file

@ -21,6 +21,7 @@
chosen { chosen {
zephyr,sram = &sdram0; zephyr,sram = &sdram0;
zephyr,itcm = &itcm;
zephyr,dtcm = &dtcm; zephyr,dtcm = &dtcm;
zephyr,console = &lpuart1; zephyr,console = &lpuart1;
zephyr,shell-uart = &lpuart1; zephyr,shell-uart = &lpuart1;

1
boards/arm/mimxrt1060_evk/mimxrt1060_evk.dts
View file

@ -21,6 +21,7 @@
chosen { chosen {
zephyr,sram = &sdram0; zephyr,sram = &sdram0;
zephyr,itcm = &itcm;
zephyr,dtcm = &dtcm; zephyr,dtcm = &dtcm;
zephyr,console = &lpuart1; zephyr,console = &lpuart1;
zephyr,shell-uart = &lpuart1; zephyr,shell-uart = &lpuart1;

1
boards/arm/mimxrt1064_evk/mimxrt1064_evk.dts
View file

@ -21,6 +21,7 @@
chosen { chosen {
zephyr,sram = &sdram0; zephyr,sram = &sdram0;
zephyr,itcm = &itcm;
zephyr,dtcm = &dtcm; zephyr,dtcm = &dtcm;
zephyr,console = &lpuart1; zephyr,console = &lpuart1;
zephyr,shell-uart = &lpuart1; zephyr,shell-uart = &lpuart1;

1
boards/arm/mm_swiftio/mm_swiftio.dts
View file

@ -20,6 +20,7 @@
chosen { chosen {
zephyr,sram = &sdram0; zephyr,sram = &sdram0;
zephyr,itcm = &itcm;
zephyr,dtcm = &dtcm; zephyr,dtcm = &dtcm;
zephyr,console = &lpuart1; zephyr,console = &lpuart1;
zephyr,shell-uart = &lpuart1; zephyr,shell-uart = &lpuart1;

3
soc/arm/nxp_imx/rt/linker.ld
View file

@ -16,9 +16,6 @@ MEMORY
#endif #endif
#if (DT_REG_SIZE(DT_NODELABEL(sdram0)) > 0) && !IS_CHOSEN_SRAM(sdram0) #if (DT_REG_SIZE(DT_NODELABEL(sdram0)) > 0) && !IS_CHOSEN_SRAM(sdram0)
SDRAM (wx) : ORIGIN = DT_REG_ADDR(DT_NODELABEL(sdram0)), LENGTH = DT_REG_SIZE(DT_NODELABEL(sdram0)) SDRAM (wx) : ORIGIN = DT_REG_ADDR(DT_NODELABEL(sdram0)), LENGTH = DT_REG_SIZE(DT_NODELABEL(sdram0))
#endif
#if (DT_REG_SIZE(DT_INST(0, nxp_imx_itcm)) > 0) && !defined(CONFIG_CODE_ITCM)
ITCM (wx) : ORIGIN = DT_REG_ADDR(DT_INST(0, nxp_imx_itcm)), LENGTH = DT_REG_SIZE(DT_INST(0, nxp_imx_itcm))
#endif #endif
} }