From 4a87c08606577fef1be4da81c7afd6f1caf719aa Mon Sep 17 00:00:00 2001 From: Jiafei Pan Date: Thu, 29 Apr 2021 11:17:20 +0800 Subject: [PATCH] arm64: cache: fix arch_dcache_all() Add data barrier before and after dcachle flush or clean, and restore to data cache level 0 after all ops. Signed-off-by: Jiafei Pan --- arch/arm64/core/cache.c | 9 +++++++++ 1 file changed, 9 insertions(+) diff --git a/arch/arm64/core/cache.c b/arch/arm64/core/cache.c index 4e1d24d5994..a591115c186 100644 --- a/arch/arm64/core/cache.c +++ b/arch/arm64/core/cache.c @@ -110,6 +110,9 @@ int arch_dcache_all(int op) if (op != K_CACHE_INVD && op != K_CACHE_WB && op != K_CACHE_WB_INVD) return -ENOTSUP; + /* Data barrier before start */ + dsb(); + clidr_el1 = read_clidr_el1(); loc = (clidr_el1 >> CLIDR_EL1_LOC_SHIFT) & CLIDR_EL1_LOC_MASK; @@ -157,5 +160,11 @@ int arch_dcache_all(int op) } } } + + /* Restore csselr_el1 to level 0 */ + write_csselr_el1(0); + dsb(); + isb(); + return 0; }