boards: arm: Add support for STM32F469I-DISCO

Add board configuration, dts and pinmux based on the stm32f4_disco
board.

Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>

boards/arm/stm32f469i_disco/Kconfig.board

@@ -0,0 +1,10 @@
+# Kconfig - STM32F469I-DISCO board configuration
+#
+# Copyright (c) 2016 Linaro Limited.
+#
+# SPDX-License-Identifier: Apache-2.0
+#
+
+config BOARD_STM32F469I_DISCO
+	bool "STM32F469I-DISCO Development Board"
+	depends on SOC_STM32F469XI

boards/arm/stm32f469i_disco/Kconfig.defconfig

@@ -0,0 +1,13 @@
+# Kconfig - STM32F469I-DISCO board configuration
+#
+# Copyright (c) 2016 Linaro Limited.
+#
+# SPDX-License-Identifier: Apache-2.0
+#
+
+if BOARD_STM32F469I_DISCO
+
+config BOARD
+	default stm32f469i_disco
+
+endif # BOARD_STM32F469I_DISCO

boards/arm/stm32f469i_disco/Makefile

@@ -0,0 +1,2 @@
+# No C files (yet)
+obj- += dummy.o

boards/arm/stm32f469i_disco/Makefile.board

@@ -0,0 +1,7 @@
+FLASH_SCRIPT = openocd.sh
+DEBUG_SCRIPT = openocd.sh
+
+OPENOCD_LOAD_CMD = "flash write_image erase ${O}/${KERNEL_BIN_NAME} ${CONFIG_FLASH_BASE_ADDRESS}"
+OPENOCD_VERIFY_CMD = "verify_image ${O}/${KERNEL_BIN_NAME} ${CONFIG_FLASH_BASE_ADDRESS}"
+
+export FLASH_SCRIPT OPENOCD_LOAD_CMD OPENOCD_VERIFY_CMD

boards/arm/stm32f469i_disco/board.h

@@ -0,0 +1,38 @@
+/*
+ * Copyright (c) 2016 Linaro Limited.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+
+#ifndef __INC_BOARD_H
+#define __INC_BOARD_H
+
+#include <soc.h>
+
+/* USER push button */
+#define USER_PB_GPIO_PORT	"GPIOA"
+#define USER_PB_GPIO_PIN	0
+
+/* LD1 green LED */
+#define LD1_GPIO_PORT	"GPIOG"
+#define LD1_GPIO_PIN	6
+
+/* LD2 orange LED */
+#define LD2_GPIO_PORT	"GPIOD"
+#define LD2_GPIO_PIN	4
+
+/* LD3 red LED */
+#define LD3_GPIO_PORT	"GPIOD"
+#define LD3_GPIO_PIN	5
+
+/* LD4 blue LED */
+#define LD4_GPIO_PORT	"GPIOK"
+#define LD4_GPIO_PIN	3
+
+/* Create aliases to make the basic samples work */
+#define SW0_GPIO_NAME	USER_PB_GPIO_PORT
+#define SW0_GPIO_PIN	USER_PB_GPIO_PIN
+#define LED0_GPIO_PORT	LD1_GPIO_PORT
+#define LED0_GPIO_PIN	LD1_GPIO_PIN
+
+#endif /* __INC_BOARD_H */

boards/arm/stm32f469i_disco/doc/stm32f469i_disco.rst

@@ -0,0 +1,209 @@
+.. _stm32f469i_disco_board:
+
+ST STM32F469I Discovery
+#######################
+
+Overview
+********
+
+The STM32F469 Discovery kit features an ARM Cortex-M4 based STM32F469NI MCU
+with a wide range of connectivity support and configurations Here are
+some highlights of the STM32F469I-DISCO board:
+
+
+- STM32 microcontroller in BGA216 package
+- On-board ST-LINK/V2-1 debugger/programmer, supporting USB reenumeration capability
+- Flexible board power supply:
+
+       - ST-LINK/V2-1 USB connector
+       - User USB FS connector
+       - VIN from Arduino™ compatible connectors
+
+- Four user LEDs
+- Two push-buttons: USER and RESET
+- USB OTG FS with micro-AB connector
+- 4-inch 800x480 pixel TFT color LCD with MIPI DSI interface and capacitive touch screen
+- SAI Audio DAC, with a stereo headphone output jack
+- Three MEMS microphones
+- MicroSD card connector
+- I2C extension connector
+- 4Mx32bit SDRAM
+- 128-Mbit Quad-SPI NOR Flash
+- Expansion connectors and Arduino™ UNO V3 connectors
+
+.. image:: img/en.stm32f469i-disco.jpg
+     :width: 457px
+     :align: center
+     :height: 551px
+     :alt: STM32F469I-DISCO
+
+More information about the board can be found at the `32F469IDISCOVERY website`_.
+
+Hardware
+********
+
+STM32F469I-DISCO Discovery kit provides the following hardware components:
+
+- STM32F469NIH6 in BGA216 package
+- ARM®32-bit Cortex®-M4 CPU with FPU
+- 180 MHz max CPU frequency
+- VDD from 1.8 V to 3.6 V
+- 2 MB Flash
+- 384+4 KB SRAM including 64-Kbyte of core coupled memory
+- GPIO with external interrupt capability
+- LCD parallel interface, 8080/6800 modes
+- LCD TFT controller supporting up to XGA resolution
+- MIPI® DSI host controller supporting up to 720p 30Hz resolution
+- 3x12-bit ADC with 24 channels
+- 2x12-bit D/A converters
+- RTC
+- Advanced-control Timer
+- General Purpose Timers (17)
+- Watchdog Timers (2)
+- USART/UART (8)
+- I2C (3)
+- SPI (6)
+- 1xSAI (serial audio interface)
+- SDIO
+- 2xCAN
+- USB 2.0 OTG FS with on-chip PHY
+- USB 2.0 OTG HS/FS with dedicated DMA, on-chip full-speed PHY and ULPI
+- 10/100 Ethernet MAC with dedicated DMA
+- 8- to 14-bit parallel camera
+- CRC calculation unit
+- True random number generator
+- DMA Controller
+
+More information about STM32F469NI can be found here:
+       - `STM32F469NI on www.st.com`_
+       - `STM32F469 reference manual`_
+
+Supported Features
+==================
+
+The Zephyr stm32f469i_disco board configuration supports the following hardware features:
+
++-----------+------------+-------------------------------------+
+| Interface | Controller | Driver/Component                    |
++===========+============+=====================================+
+| NVIC      | on-chip    | nested vector interrupt controller  |
++-----------+------------+-------------------------------------+
+| UART      | on-chip    | serial port-polling;                |
+|           |            | serial port-interrupt               |
++-----------+------------+-------------------------------------+
+| PINMUX    | on-chip    | pinmux                              |
++-----------+------------+-------------------------------------+
+| GPIO      | on-chip    | gpio                                |
++-----------+------------+-------------------------------------+
+| PWM       | on-chip    | pwm                                 |
++-----------+------------+-------------------------------------+
+
+Other hardware features are not yet supported on Zephyr porting.
+
+The default configuration can be found in the defconfig file:
+
+	``boards/arm/stm32f469i_disco/stm32f469i_disco_defconfig``
+
+
+Pin Mapping
+===========
+
+STM32F469I-DISCO Discovry kit has 9 GPIO controllers. These controllers are responsible for pin muxing,
+input/output, pull-up, etc.
+
+For mode details please refer to `32F469IDISCOVERY board User Manual`_.
+
+Default Zephyr Peripheral Mapping:
+----------------------------------
+- UART_3_TX : PB10
+- UART_3_RX : PB11
+- UART_6_TX : PG14
+- UART_6_RX : PG9
+- USER_PB : PA0
+- LD1 : PG6
+- LD2 : PD4
+- LD3 : PD5
+- LD4 : PK3
+
+System Clock
+============
+
+STM32F469I-DISCO System Clock could be driven by internal or external oscillator,
+as well as main PLL clock. By default System clock is driven by PLL clock at 180MHz,
+driven by 8MHz high speed external clock.
+
+Serial Port
+===========
+
+The STM32F469 Discovery kit has up to 8 UARTs. The Zephyr console output is assigned to UART3.
+Default settings are 115200 8N1.
+
+
+Programming and Debugging
+*************************
+
+Flashing
+========
+
+STM32F469I-DISCO Discovery kit includes an ST-LINK/V2 embedded debug tool interface.
+This interface is supported by the openocd version included in Zephyr SDK.
+
+Flashing an application to STM32F469I-DISCO
+-------------------------------------------
+
+The sample application :ref:`hello_world` is being used in this tutorial:
+
+.. code-block:: console
+
+   $<zephyr_root_path>/samples/hello_world
+
+To build the Zephyr kernel and application, enter:
+
+.. code-block:: console
+
+   $ cd <zephyr_root_path>
+   $ source zephyr-env.sh
+   $ cd $ZEPHYR_BASE/samples/hello_world/
+   $ make BOARD=stm32f469i_disco
+
+Connect the STM32F469I-DISCO Discovery kit to your host computer using the USB port.
+Then, enter the following command:
+
+.. code-block:: console
+
+   $ make BOARD=stm32f469i_disco flash
+
+Run a serial host program to connect with your board:
+
+.. code-block:: console
+
+   $ minicom -D /dev/ttyACM0
+
+You should see the following message:
+
+.. code-block:: console
+
+   Hello World! arm
+
+
+Debugging
+=========
+
+Access gdb with the following make command:
+
+.. code-block:: console
+
+   $ make BOARD=stm32f469i_disco debug
+
+
+.. _32F469IDISCOVERY website:
+   http://www.st.com/en/evaluation-tools/32f469idiscovery.html
+
+.. _32F469IDISCOVERY board User Manual:
+   http://www.st.com/resource/en/user_manual/dm00218846.pdf
+
+.. _STM32F469NI on www.st.com:
+   http://www.st.com/en/microcontrollers/stm32f469ni.html
+
+.. _STM32F469 reference manual:
+   http://www.st.com/resource/en/reference_manual/dm00127514.pdf

boards/arm/stm32f469i_disco/stm32f469i_disco_defconfig

@@ -0,0 +1,38 @@
+CONFIG_ARM=y
+CONFIG_BOARD_STM32F469I_DISCO=y
+CONFIG_SOC_SERIES_STM32F4X=y
+CONFIG_SOC_STM32F469XI=y
+# 180MHz system clock
+CONFIG_SYS_CLOCK_HW_CYCLES_PER_SEC=180000000
+CONFIG_SYS_CLOCK_TICKS_PER_SEC=1000
+
+# Enable MPU
+CONFIG_STM32_ARM_MPU_ENABLE=y
+
+# enable USART3 - passthrough to STLINK v2 connector
+CONFIG_UART_STM32_PORT_3=y
+# enable console on this port by default
+CONFIG_UART_CONSOLE_ON_DEV_NAME="UART_3"
+
+# enable pinmux
+CONFIG_PINMUX=y
+
+# enable GPIO ports A, B, C
+CONFIG_GPIO=y
+
+# clock configuration
+CONFIG_CLOCK_CONTROL=y
+
+# Clock configuration for Cube Clock control driver
+CONFIG_CLOCK_STM32_HSE_CLOCK=8000000
+CONFIG_CLOCK_STM32_SYSCLK_SRC_PLL=y
+# use HSE as PLL input
+CONFIG_CLOCK_STM32_PLL_SRC_HSE=y
+# produce 180MHz clock at PLL output
+CONFIG_CLOCK_STM32_PLL_M_DIVISOR=8
+CONFIG_CLOCK_STM32_PLL_N_MULTIPLIER=360
+CONFIG_CLOCK_STM32_PLL_P_DIVISOR=2
+CONFIG_CLOCK_STM32_PLL_Q_DIVISOR=7
+CONFIG_CLOCK_STM32_AHB_PRESCALER=1
+CONFIG_CLOCK_STM32_APB1_PRESCALER=4
+CONFIG_CLOCK_STM32_APB2_PRESCALER=2

boards/arm/stm32f469i_disco/support/openocd.cfg

@@ -0,0 +1,12 @@
+source [find board/st_nucleo_f4.cfg]
+
+$_TARGETNAME configure -event gdb-attach {
+	echo "Debugger attaching: halting execution"
+	reset halt
+	gdb_breakpoint_override hard
+}
+
+$_TARGETNAME configure -event gdb-detach {
+	echo "Debugger detaching: resuming execution"
+	resume
+}

drivers/pinmux/Makefile

@@ -12,6 +12,7 @@ obj-$(CONFIG_BOARD_NUCLEO_F334R8) += stm32/pinmux_board_nucleo_f334r8.o
 obj-$(CONFIG_BOARD_STM32373C_EVAL) += stm32/pinmux_board_stm32373c_eval.o
 obj-$(CONFIG_BOARD_NUCLEO_F401RE) += stm32/pinmux_board_nucleo_f401re.o
 obj-$(CONFIG_BOARD_STM32F4_DISCO) += stm32/pinmux_board_stm32f4_disco.o
+obj-$(CONFIG_BOARD_STM32F469I_DISCO) += stm32/pinmux_board_stm32f469i_disco.o
 obj-$(CONFIG_BOARD_NUCLEO_F411RE) += stm32/pinmux_board_nucleo_f411re.o
 obj-$(CONFIG_BOARD_NUCLEO_F413ZH) += stm32/pinmux_board_nucleo_f413zh.o
 obj-$(CONFIG_BOARD_96B_CARBON) += stm32/pinmux_board_carbon.o

drivers/pinmux/stm32/pinmux_board_stm32f469i_disco.c

@@ -0,0 +1,38 @@
+/*
+ * Copyright (c) 2016 Linaro Limited.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+
+#include <kernel.h>
+#include <device.h>
+#include <init.h>
+#include <pinmux.h>
+#include <sys_io.h>
+#include "pinmux/pinmux.h"
+
+#include "pinmux_stm32.h"
+
+/* pin assignments for STM32F469I-DISCO board */
+static const struct pin_config pinconf[] = {
+#ifdef CONFIG_UART_STM32_PORT_3
+	{STM32_PIN_PB10, STM32F4_PINMUX_FUNC_PB10_USART3_TX},
+	{STM32_PIN_PB11, STM32F4_PINMUX_FUNC_PB11_USART3_RX},
+#endif	/* CONFIG_UART_STM32_PORT_3 */
+#ifdef CONFIG_UART_STM32_PORT_6
+	{STM32_PIN_PG14, STM32F4_PINMUX_FUNC_PG14_USART6_TX},
+	{STM32_PIN_PG9, STM32F4_PINMUX_FUNC_PG9_USART6_RX},
+#endif	/* CONFIG_UART_STM32_PORT_6 */
+};
+
+static int pinmux_stm32_init(struct device *port)
+{
+	ARG_UNUSED(port);
+
+	stm32_setup_pins(pinconf, ARRAY_SIZE(pinconf));
+
+	return 0;
+}
+
+SYS_INIT(pinmux_stm32_init, PRE_KERNEL_1,
+		CONFIG_PINMUX_STM32_DEVICE_INITIALIZATION_PRIORITY);

dts/arm/Makefile

@@ -24,6 +24,7 @@ dtb-$(CONFIG_BOARD_STM32L496G_DISCO)	=	stm32l496g_disco.dts_compiled
 dtb-$(CONFIG_BOARD_NUCLEO_F334R8)	=	nucleo_f334r8.dts_compiled
 dtb-$(CONFIG_BOARD_STM32373C_EVAL)	=	stm32373c_eval.dts_compiled
 dtb-$(CONFIG_BOARD_STM32F4_DISCO)	=	stm32f4_disco.dts_compiled
+dtb-$(CONFIG_BOARD_STM32F469I_DISCO)	=	stm32f469i_disco.dts_compiled
 dtb-$(CONFIG_BOARD_96B_NITROGEN)	=	96b_nitrogen.dts_compiled
 dtb-$(CONFIG_BOARD_NRF52_PCA10040)	=	nrf52_pca10040.dts_compiled
 dtb-$(CONFIG_BOARD_NRF52_BLENANO2)	=	nrf52_blenano2.dts_compiled

dts/arm/stm32f469i_disco.dts

@@ -0,0 +1,29 @@
+/*
+ * Copyright (c) 2017 Linaro Limited
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+
+/dts-v1/;
+#include <st/stm32f469.dtsi>
+
+/ {
+	model = "STMicroelectronics STM32F469I-DISCO board";
+	compatible = "st,stm32f469i-disco", "st,stm32f469";
+
+	chosen {
+		zephyr,console = &usart3;
+		zephyr,sram = &sram0;
+		zephyr,flash = &flash0;
+	};
+};
+
+&usart3 {
+	current-speed = <115200>;
+	status = "ok";
+};
+
+&usart6 {
+	current-speed = <115200>;
+	status = "ok";
+};

dts/arm/stm32f469i_disco.fixup

@@ -0,0 +1,20 @@
+/* This file is a temporary workaround for mapping of the generated information
+ * to the current driver definitions.  This will be removed when the drivers
+ * are modified to handle the generated information, or the mapping of
+ * generated data matches the driver definitions.
+ */
+
+
+#define CONFIG_NUM_IRQ_PRIO_BITS	ARM_V7M_NVIC_E000E100_ARM_NUM_IRQ_PRIORITY_BITS
+
+#define CONFIG_UART_STM32_PORT_3_NAME		ST_STM32_USART_40004800_LABEL
+#define CONFIG_UART_STM32_PORT_3_BASE_ADDRESS	ST_STM32_USART_40004800_BASE_ADDRESS
+#define CONFIG_UART_STM32_PORT_3_BAUD_RATE	ST_STM32_USART_40004800_CURRENT_SPEED
+#define CONFIG_UART_STM32_PORT_3_IRQ_PRI	ST_STM32_USART_40004800_IRQ_0_PRIORITY
+#define PORT_1_IRQ				ST_STM32_USART_40004800_IRQ_0
+
+#define CONFIG_UART_STM32_PORT_6_NAME		ST_STM32_USART_40011400_LABEL
+#define CONFIG_UART_STM32_PORT_6_BASE_ADDRESS	ST_STM32_USART_40011400_BASE_ADDRESS
+#define CONFIG_UART_STM32_PORT_6_BAUD_RATE	ST_STM32_USART_40011400_CURRENT_SPEED
+#define CONFIG_UART_STM32_PORT_6_IRQ_PRI	ST_STM32_USART_40011400_IRQ_0_PRIORITY
+#define PORT_6_IRQ				ST_STM32_USART_40011400_IRQ_0

scripts/sanity_chk/arches/arm.ini

@@ -9,6 +9,7 @@ platforms = qemu_cortex_m3 frdm_k64f arduino_due nucleo_f103rb stm32_mini_a15
             sam_e70_xplained curie_ble nrf52_blenano2 hexiwear_kw40z
             cc3220sf_launchxl frdm_kl25z disco_l475_iot1 nucleo_l432kc
             nucleo_f413zh stm32l496g_disco stm32f4_disco 96b_carbon_nrf51
+            stm32f469i_disco
 
 supported_toolchains = zephyr gccarmemb