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boards: esp32s2_saola: dts: default pinctrl states

Browse source 
Add default pinctrl states to UART, SPI and I2C
peripherals.

Signed-off-by: Glauber Maroto Ferreira <glauber.ferreira@espressif.com>
This commit is contained in:
Glauber Maroto Ferreira 2022-02-14 16:21:41 -03:00 • committed by Carles Cufí
commit 4a698f64e0
2 changed files with 97 additions and 14 deletions
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84
boards/xtensa/esp32s2_saola/esp32s2_saola-pinctrl.dtsi Normal file
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@ -0,0 +1,84 @@
/*
* Copyright (c) 2022 Espressif Systems (Shanghai) Co., Ltd.
*
* SPDX-License-Identifier: Apache-2.0
*/
#include <dt-bindings/pinctrl/esp-pinctrl-common.h>
#include <dt-bindings/pinctrl/esp32s2-pinctrl.h>
#include <dt-bindings/pinctrl/esp32s2-gpio-sigmap.h>
&pinctrl {
uart0_tx_gpio43: uart0_tx_gpio43 {
pinmux = <UART0_TX_GPIO43>;
};
uart0_rx_gpio44: uart0_rx_gpio44 {
pinmux = <UART0_RX_GPIO44>;
bias-pull-up;
};
spim2_miso_gpio13: spim2_miso_gpio13 {
pinmux = <SPIM2_MISO_GPIO13>;
};
spim2_mosi_gpio11: spim2_mosi_gpio11 {
pinmux = <SPIM2_MOSI_GPIO11>;
output-low;
};
spim2_sclk_gpio12: spim2_sclk_gpio12 {
pinmux = <SPIM2_SCLK_GPIO12>;
};
spim2_csel_gpio10: spim2_csel_gpio10 {
pinmux = <SPIM2_CSEL_GPIO10>;
};
spim3_miso_gpio37: spim3_miso_gpio37 {
pinmux = <SPIM3_MISO_GPIO37>;
};
spim3_mosi_gpio35: spim3_mosi_gpio35 {
pinmux = <SPIM3_MOSI_GPIO35>;
output-low;
};
spim3_sclk_gpio36: spim3_sclk_gpio36 {
pinmux = <SPIM3_SCLK_GPIO36>;
};
spim3_csel_gpio34: spim3_csel_gpio34 {
pinmux = <SPIM3_CSEL_GPIO34>;
};
i2c0_sda_gpio8: i2c0_sda_gpio8 {
pinmux = <I2C0_SDA_GPIO8>;
bias-pull-up;
drive-open-drain;
output-high;
};
i2c0_scl_gpio9: i2c0_scl_gpio9 {
pinmux = <I2C0_SCL_GPIO9>;
bias-pull-up;
drive-open-drain;
output-high;
};
i2c1_sda_gpio3: i2c1_sda_gpio3 {
pinmux = <I2C1_SDA_GPIO3>;
bias-pull-up;
drive-open-drain;
output-high;
};
i2c1_scl_gpio4: i2c1_scl_gpio4 {
pinmux = <I2C1_SCL_GPIO4>;
bias-pull-up;
drive-open-drain;
output-high;
};
};

27
boards/xtensa/esp32s2_saola/esp32s2_saola.dts
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@ -7,6 +7,7 @@
/dts-v1/; /dts-v1/;
#include <espressif/esp32s2.dtsi> #include <espressif/esp32s2.dtsi>
#include "esp32s2_saola-pinctrl.dtsi"
/ { / {
model = "esp32s2_saola"; model = "esp32s2_saola";
@ -31,8 +32,8 @@
&uart0 { &uart0 {
status = "okay"; status = "okay";
current-speed = <115200>; current-speed = <115200>;
tx-pin = <43>; pinctrl-0 = <&uart0_tx_gpio43 &uart0_rx_gpio44>;
rx-pin = <44>; pinctrl-names = "default";
}; };
&gpio0 { &gpio0 {
@ -62,14 +63,14 @@
&i2c0 { &i2c0 {
status = "okay"; status = "okay";
clock-frequency = <I2C_BITRATE_STANDARD>; clock-frequency = <I2C_BITRATE_STANDARD>;
sda-pin = <8>; pinctrl-0 = <&i2c0_sda_gpio8 &i2c0_scl_gpio9>;
scl-pin = <9>; pinctrl-names = "default";
}; };
&i2c1 { &i2c1 {
clock-frequency = <I2C_BITRATE_STANDARD>; clock-frequency = <I2C_BITRATE_STANDARD>;
sda-pin = <3>; pinctrl-0 = <&i2c1_sda_gpio3 &i2c1_scl_gpio4>;
scl-pin = <4>; pinctrl-names = "default";
}; };
&trng0 { &trng0 {
@ -80,20 +81,18 @@
#address-cells = <1>; #address-cells = <1>;
#size-cells = <0>; #size-cells = <0>;
status = "okay"; status = "okay";
miso-pin = <13>; pinctrl-0 = <&spim2_miso_gpio13 &spim2_mosi_gpio11
mosi-pin = <11>; &spim2_sclk_gpio12 &spim2_csel_gpio10>;
sclk-pin = <12>; pinctrl-names = "default";
csel-pin = <10>;
}; };
&spi3 { &spi3 {
#address-cells = <1>; #address-cells = <1>;
#size-cells = <0>; #size-cells = <0>;
status = "okay"; status = "okay";
miso-pin = <37>; pinctrl-0 = <&spim3_miso_gpio37 &spim3_mosi_gpio35
mosi-pin = <35>; &spim3_sclk_gpio36 &spim3_csel_gpio34>;
sclk-pin = <36>; pinctrl-names = "default";
csel-pin = <34>;
}; };
&flash0 { &flash0 {