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i2c: adding in support for I2C1

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Somehow through the process of enabling Galileo, we have partially lost
the functionality needed to enable I2C1.  Bringing back the I2C
configuration options for I2C1 to the DW IP block.

Change-Id: I296bd9c3d167969df5b2fe17627633f5ec4b1ba4
Signed-off-by: Dan Kalowsky <daniel.kalowsky@intel.com>
This commit is contained in:
Dan Kalowsky 2015-11-17 11:47:22 -08:00 • committed by Anas Nashif
commit 4a61c2824b
2 changed files with 78 additions and 11 deletions
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34
drivers/i2c/Kconfig
View file

@ -170,6 +170,40 @@ config I2C_DW_0_BAR
depends on I2C_DW_0 && PCI depends on I2C_DW_0 && PCI
default 0 default 0
config I2C_DW_1
bool "Enable I2C1"
default n
depends on I2C_DW
config I2C_DW_1_BASE
hex "Base address for I2C1"
default 0x00000000
depends on I2C_DW_1
config I2C_DW_1_NAME
string "Select a name for finding the device"
depends on I2C_DW_1
default "I2C1"
config I2C_DW_1_INT_PRIORITY
int "Controller interrupt priority"
depends on I2C_DW_1
default 2
help
IRQ priority
config I2C_DW_1_DEFAULT_CFG
hex "I2C default configuration"
depends on I2C_DW_1
default 0x0
help
Allows the I2C port to be brought up with a default configuration.
This is useful to set if other drivers depend upon using the I2C bus
before the application has a chance to custom configure the port.
Setting this value does not prohibit the application from customizing
the values later. Refer to the I2C datasheet for proper values.
config I2C_STATUS_DELAY config I2C_STATUS_DELAY
int "Delay for controller response" int "Delay for controller response"
depends on I2C depends on I2C

55
drivers/i2c/i2c_dw.c
View file

@ -22,6 +22,7 @@
#include <i2c.h> #include <i2c.h>
#include <nanokernel.h> #include <nanokernel.h>
#include <init.h>
#include <arch/cpu.h> #include <arch/cpu.h>
#include <string.h> #include <string.h>
@ -813,22 +814,12 @@ int i2c_dw_initialize(struct device *port)
/* system bindings */ /* system bindings */
#if CONFIG_I2C_DW_0 #if CONFIG_I2C_DW_0
#include <init.h>
void i2c_config_0(struct device *port); void i2c_config_0(struct device *port);
struct i2c_dw_rom_config i2c_config_dw_0 = { struct i2c_dw_rom_config i2c_config_dw_0 = {
.base_address = CONFIG_I2C_DW_0_BASE, .base_address = CONFIG_I2C_DW_0_BASE,
#ifdef CONFIG_I2C_DW_0_IRQ_DIRECT #ifdef CONFIG_I2C_DW_0_IRQ_DIRECT
.interrupt_vector = CONFIG_I2C_DW_0_IRQ, .interrupt_vector = CONFIG_I2C_DW_0_IRQ,
#endif
#if CONFIG_PCI
.pci_dev.class = CONFIG_I2C_DW_CLASS,
.pci_dev.bus = CONFIG_I2C_DW_0_BUS,
.pci_dev.dev = CONFIG_I2C_DW_0_DEV,
.pci_dev.vendor_id = CONFIG_I2C_DW_VENDOR_ID,
.pci_dev.device_id = CONFIG_I2C_DW_DEVICE_ID,
.pci_dev.function = CONFIG_I2C_DW_0_FUNCTION,
.pci_dev.bar = CONFIG_I2C_DW_0_BAR,
#endif #endif
.config_func = i2c_config_0, .config_func = i2c_config_0,
@ -873,5 +864,47 @@ void i2c_config_0(struct device *port)
shared_irq_enable(shared_irq_dev, port); shared_irq_enable(shared_irq_dev, port);
#endif #endif
} }
#endif /* CONFIG_I2C_DW_0 */ #endif /* CONFIG_I2C_DW_0 */
/*
* Adding in I2C1
*/
#if CONFIG_I2C_DW_1
void i2c_config_1(struct device *port);
struct i2c_dw_rom_config i2c_config_dw_1 = {
.base_address = CONFIG_I2C_DW_1_BASE,
.interrupt_vector = CONFIG_I2C_DW_1_IRQ,
.config_func = i2c_config_1,
};
struct i2c_dw_dev_config i2c_1_runtime = {
.app_config.raw = CONFIG_I2C_DW_1_DEFAULT_CFG,
};
DECLARE_DEVICE_INIT_CONFIG(i2c_1,
CONFIG_I2C_DW_1_NAME,
&i2c_dw_initialize,
&i2c_config_dw_1);
pre_kernel_late_init(i2c_1, &i2c_1_runtime);
struct device *i2c_dw_isr_1_device = SYS_GET_DEVICE(i2c_1);
IRQ_CONNECT_STATIC(i2c_dw_1,
CONFIG_I2C_DW_1_IRQ,
CONFIG_I2C_DW_1_INT_PRIORITY,
i2c_dw_isr,
0);
void i2c_config_1(struct device *port)
{
struct i2c_dw_rom_config * const config = port->config->config_info;
struct device *shared_irq_dev;
ARG_UNUSED(shared_irq_dev);
IRQ_CONFIG(i2c_dw_1, config->interrupt_vector, 0);
irq_enable(config->interrupt_vector);
}
#endif /* CONFIG_I2C_DW_1 */