From 4a250c26b16dc439e5c63e23ce7c35cd0465b514 Mon Sep 17 00:00:00 2001 From: Brett Witherspoon Date: Mon, 18 Sep 2023 19:22:49 -0400 Subject: [PATCH] drivers: counter: fix index of stm32 RTC source clock The DT_INST_CLOCKS_CELL macro takes as the first argument the device instance and not the cell index. This change correctly gets the second index of the first device as intended. Signed-off-by: Brett Witherspoon --- drivers/counter/counter_ll_stm32_rtc.c | 10 +++++----- 1 file changed, 5 insertions(+), 5 deletions(-) diff --git a/drivers/counter/counter_ll_stm32_rtc.c b/drivers/counter/counter_ll_stm32_rtc.c index a7265c635f2..8ad9bd0d619 100644 --- a/drivers/counter/counter_ll_stm32_rtc.c +++ b/drivers/counter/counter_ll_stm32_rtc.c @@ -484,23 +484,23 @@ static const struct rtc_stm32_config rtc_config = { .ll_rtc_config = { #if !defined(CONFIG_SOC_SERIES_STM32F1X) .HourFormat = LL_RTC_HOURFORMAT_24HOUR, -#if DT_INST_CLOCKS_CELL(1, bus) == STM32_SRC_LSI +#if DT_INST_CLOCKS_CELL_BY_IDX(0, 1, bus) == STM32_SRC_LSI /* prescaler values for LSI @ 32 KHz */ .AsynchPrescaler = 0x7F, .SynchPrescaler = 0x00F9, -#else /* DT_INST_CLOCKS_CELL(1, bus) == STM32_SRC_LSE */ +#else /* DT_INST_CLOCKS_CELL_BY_IDX(0, 1, bus) == STM32_SRC_LSE */ /* prescaler values for LSE @ 32768 Hz */ .AsynchPrescaler = 0x7F, .SynchPrescaler = 0x00FF, #endif #else /* CONFIG_SOC_SERIES_STM32F1X */ -#if DT_INST_CLOCKS_CELL(1, bus) == STM32_SRC_LSI +#if DT_INST_CLOCKS_CELL_BY_IDX(0, 1, bus) == STM32_SRC_LSI /* prescaler values for LSI @ 40 KHz */ .AsynchPrescaler = 0x9C3F, -#else /* DT_INST_CLOCKS_CELL(1, bus) == STM32_SRC_LSE */ +#else /* DT_INST_CLOCKS_CELL_BY_IDX(0, 1, bus) == STM32_SRC_LSE */ /* prescaler values for LSE @ 32768 Hz */ .AsynchPrescaler = 0x7FFF, -#endif /* DT_INST_CLOCKS_CELL(1, bus) == STM32_SRC_LSE */ +#endif .OutPutSource = LL_RTC_CALIB_OUTPUT_NONE, #endif /* CONFIG_SOC_SERIES_STM32F1X */ },