michaelh/zephyr
1
0
Fork 0
Code Releases Activity

edtlib: make Register a type-annotated dataclass

Browse source 
Converting this to a dataclass will make it easier to type annotate.
Adding type annotations is incremental progress towards type checking
the entire module.

Signed-off-by: Martí Bolívar <marti.bolivar@nordicsemi.no>
This commit is contained in:
Martí Bolívar 2023-04-05 13:22:46 -07:00 • committed by Marti Bolivar
commit 49c0d72234
3 changed files with 38 additions and 26 deletions
Download patch file Download diff file Expand all files Collapse all files

30
scripts/dts/python-devicetree/src/devicetree/edtlib.py
View file

@ -702,6 +702,7 @@ class Property:
return enum.index(self.val) if enum else None
@dataclass
class Register:
"""
Represents a register on a node.
@ -722,17 +723,11 @@ class Register:
size:
The length of the register in bytes
"""
def __repr__(self):
fields = []
if self.name is not None:
fields.append("name: " + self.name)
if self.addr is not None:
fields.append("addr: " + hex(self.addr))
if self.size is not None:
fields.append("size: " + hex(self.size))
return "<Register, {}>".format(", ".join(fields))
node: 'Node'
name: Optional[str]
addr: Optional[int]
size: Optional[int]
class Range:
@ -1608,22 +1603,21 @@ class Node:
for raw_reg in _slice(node, "reg", 4*(address_cells + size_cells),
f"4*(<#address-cells> (= {address_cells}) + "
f"<#size-cells> (= {size_cells}))"):
reg = Register()
reg.node = self
if address_cells == 0:
reg.addr = None
addr = None
else:
reg.addr = _translate(to_num(raw_reg[:4*address_cells]), node)
addr = _translate(to_num(raw_reg[:4*address_cells]), node)
if size_cells == 0:
reg.size = None
size = None
else:
reg.size = to_num(raw_reg[4*address_cells:])
if size_cells != 0 and reg.size == 0:
size = to_num(raw_reg[4*address_cells:])
if size_cells != 0 and size == 0:
_err(f"zero-sized 'reg' in {self._node!r} seems meaningless "
"(maybe you want a size of one or #size-cells = 0 "
"instead)")
self.regs.append(reg)
# We'll fix up the name when we're done.
self.regs.append(Register(self, None, addr, size))
_add_names(node, "reg", self.regs)

1
scripts/dts/python-devicetree/tests/test.dts
View file

@ -237,6 +237,7 @@
node {
reg = <1 2>;
reg-names = "foo", "bar";
};
};
reg-zero-size-cells {

33
scripts/dts/python-devicetree/tests/test_edtlib.py
View file

@ -121,17 +121,34 @@ def test_reg():
with from_here():
edt = edtlib.EDT("test.dts", ["test-bindings"])
assert str(edt.get_node("/reg-zero-address-cells/node").regs) == \
"[<Register, size: 0x1>, <Register, size: 0x2>]"
def verify_regs(node, expected_tuples):
regs = node.regs
assert len(regs) == len(expected_tuples)
for reg, expected_tuple in zip(regs, expected_tuples):
name, addr, size = expected_tuple
assert reg.node is node
assert reg.name == name
assert reg.addr == addr
assert reg.size == size
assert str(edt.get_node("/reg-zero-size-cells/node").regs) == \
"[<Register, addr: 0x1>, <Register, addr: 0x2>]"
verify_regs(edt.get_node("/reg-zero-address-cells/node"),
[('foo', None, 0x1),
('bar', None, 0x2)])
assert str(edt.get_node("/reg-ranges/parent/node").regs) == \
"[<Register, addr: 0x5, size: 0x1>, <Register, addr: 0xe0000000f, size: 0x1>, <Register, addr: 0xc0000000e, size: 0x1>, <Register, addr: 0xc0000000d, size: 0x1>, <Register, addr: 0xa0000000b, size: 0x1>, <Register, addr: 0x0, size: 0x1>]"
verify_regs(edt.get_node("/reg-zero-size-cells/node"),
[(None, 0x1, None),
(None, 0x2, None)])
assert str(edt.get_node("/reg-nested-ranges/grandparent/parent/node").regs) == \
"[<Register, addr: 0x30000000200000001, size: 0x1>]"
verify_regs(edt.get_node("/reg-ranges/parent/node"),
[(None, 0x5, 0x1),
(None, 0xe0000000f, 0x1),
(None, 0xc0000000e, 0x1),
(None, 0xc0000000d, 0x1),
(None, 0xa0000000b, 0x1),
(None, 0x0, 0x1)])
verify_regs(edt.get_node("/reg-nested-ranges/grandparent/parent/node"),
[(None, 0x30000000200000001, 0x1)])
def test_pinctrl():
'''Test 'pinctrl-<index>'.'''