diff --git a/drivers/pinmux/Kconfig b/drivers/pinmux/Kconfig
index 51b748c9e47..b888b71dc26 100644
--- a/drivers/pinmux/Kconfig
+++ b/drivers/pinmux/Kconfig
@@ -49,13 +49,6 @@ config PINMUX_INIT_PRIORITY
 	  rule for particular boards. Don't change this value unless you
 	  know what you are doing.
 
-config PINMUX_K64
-	bool "Freescale K64-based Pin multiplexer driver"
-	depends on SOC_MK64F12
-	default n
-	help
-	Enable driver for Freescale K64-based Pin multiplexer.
-
 source "drivers/pinmux/Kconfig.mcux"
 
 source "drivers/pinmux/Kconfig.stm32"
diff --git a/drivers/pinmux/Makefile b/drivers/pinmux/Makefile
index e43612f7952..1497766725b 100644
--- a/drivers/pinmux/Makefile
+++ b/drivers/pinmux/Makefile
@@ -1,11 +1,6 @@
 ccflags-y +=-I$(srctree)/drivers
 
 # Board initialization
-ifdef CONFIG_PINMUX_K64
-obj-y += k64/pinmux.o
-obj-$(CONFIG_BOARD_FRDM_K64F) += k64/pinmux_board_frdm_k64f.o
-obj-$(CONFIG_BOARD_HEXIWEAR_K64) += k64/pinmux_board_hexiwear.o
-endif
 obj-$(CONFIG_PINMUX_MCUX) += pinmux_mcux.o
 obj-$(CONFIG_PINMUX_STM32) += stm32/pinmux_stm32.o
 obj-$(CONFIG_PINMUX_BEETLE) += beetle/pinmux_board_v2m_beetle.o
diff --git a/drivers/pinmux/k64/pinmux.c b/drivers/pinmux/k64/pinmux.c
deleted file mode 100644
index 01b86943193..00000000000
--- a/drivers/pinmux/k64/pinmux.c
+++ /dev/null
@@ -1,163 +0,0 @@
-/* pinmux.c - pin out mapping for the Freescale K64 SoC */
-
-/*
- * Copyright (c) 2016, Wind River Systems, Inc.
- *
- * Licensed under the Apache License, Version 2.0 (the "License");
- * you may not use this file except in compliance with the License.
- * You may obtain a copy of the License at
- *
- *     http://www.apache.org/licenses/LICENSE-2.0
- *
- * Unless required by applicable law or agreed to in writing, software
- * distributed under the License is distributed on an "AS IS" BASIS,
- * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- * See the License for the specific language governing permissions and
- * limitations under the License.
- */
-
-#include <errno.h>
-
-#include <kernel.h>
-#include <device.h>
-#include <init.h>
-#include <soc.h>
-#include <sys_io.h>
-#include <pinmux.h>
-#include <pinmux/pinmux.h>
-#include <pinmux/k64/pinmux.h>
-
-/* port pin number conversion from pin ID */
-#define PIN_FROM_ID(pin_id)	(pin_id % K64_PINMUX_NUM_PINS)
-
-#ifdef CONFIG_GPIO_K64_A
-static inline int config_port_a(mem_addr_t *addr)
-{
-	*addr = PORT_K64_A_BASE_ADDR;
-	return 0;
-}
-#else
-#define config_port_a(addr) -EACCES
-#endif
-
-#ifdef CONFIG_GPIO_K64_B
-static inline int config_port_b(mem_addr_t *addr)
-{
-	*addr = PORT_K64_B_BASE_ADDR;
-	return 0;
-}
-#else
-#define config_port_b(addr) -EACCES
-#endif
-
-#ifdef CONFIG_GPIO_K64_C
-static inline int config_port_c(mem_addr_t *addr)
-{
-	*addr = PORT_K64_C_BASE_ADDR;
-	return 0;
-}
-#else
-#define config_port_c(addr) -EACCES
-#endif
-
-#ifdef CONFIG_GPIO_K64_D
-static inline int config_port_d(mem_addr_t *addr)
-{
-	*addr = PORT_K64_D_BASE_ADDR;
-	return 0;
-}
-#else
-#define config_port_d(addr) -EACCES
-#endif
-
-#ifdef CONFIG_GPIO_K64_E
-static inline int config_port_e(mem_addr_t *addr)
-{
-	*addr = PORT_K64_E_BASE_ADDR;
-	return 0;
-}
-#else
-#define config_port_e(addr) -EACCES
-#endif
-
-static int _fsl_k64_get_port_addr(uint8_t pin_id, mem_addr_t *port_addr_ptr)
-{
-
-	/* determine the port base address associated with the
-	 * pin identifier
-	 */
-
-	if (pin_id < K64_PIN_PTB0) {		/* Port A pin */
-
-		return config_port_a(port_addr_ptr);
-
-	} else if (pin_id < K64_PIN_PTC0) {	/* Port B pin */
-
-		return config_port_b(port_addr_ptr);
-
-	} else if (pin_id < K64_PIN_PTD0) {	/* Port C pin */
-
-		return config_port_c(port_addr_ptr);
-
-	} else if (pin_id < K64_PIN_PTE0) {	/* Port D pin */
-
-		return config_port_d(port_addr_ptr);
-
-	} else {				/* Port E pin */
-
-		return config_port_e(port_addr_ptr);
-
-	}
-
-}
-
-int _fsl_k64_set_pin(uint32_t pin_id, uint32_t func)
-{
-	mem_addr_t port_base_addr;
-	uint8_t port_pin;
-	uint32_t status;
-
-	if (pin_id >= PINMUX_NUM_PINS) {
-		return -ENOTSUP;
-	}
-
-	/* determine the pin's port register base address */
-	status = _fsl_k64_get_port_addr(pin_id, &port_base_addr);
-
-	if (status != 0) {
-		return status;
-	}
-
-	/* extract the pin number within its port */
-	port_pin = PIN_FROM_ID(pin_id);
-
-	/* set pin function and control settings */
-	sys_write32(func, port_base_addr + K64_PINMUX_CTRL_OFFSET(port_pin));
-
-	return 0;
-}
-
-int _fsl_k64_get_pin(uint32_t pin_id, uint32_t *func)
-{
-	mem_addr_t port_base_addr;
-	uint8_t port_pin;
-	uint32_t status;
-
-	if (pin_id >= PINMUX_NUM_PINS) {
-		return -ENOTSUP;
-	}
-
-	/* determine the pin's port register base address */
-	status = _fsl_k64_get_port_addr(pin_id, &port_base_addr);
-	if (status != 0) {
-		return status;
-	}
-
-	/* extract the pin number within its port */
-	port_pin = PIN_FROM_ID(pin_id);
-
-	/* get pin function and control settings */
-	*func = sys_read32(port_base_addr + K64_PINMUX_CTRL_OFFSET(port_pin));
-
-	return 0;
-}
diff --git a/drivers/pinmux/k64/pinmux.h b/drivers/pinmux/k64/pinmux.h
deleted file mode 100644
index e419e548aa2..00000000000
--- a/drivers/pinmux/k64/pinmux.h
+++ /dev/null
@@ -1,290 +0,0 @@
-/* pinmux.h - Freescale K64 pinmux header */
-
-/*
- * Copyright (c) 2016, Wind River Systems, Inc.
- *
- * Licensed under the Apache License, Version 2.0 (the "License");
- * you may not use this file except in compliance with the License.
- * You may obtain a copy of the License at
- *
- *     http://www.apache.org/licenses/LICENSE-2.0
- *
- * Unless required by applicable law or agreed to in writing, software
- * distributed under the License is distributed on an "AS IS" BASIS,
- * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- * See the License for the specific language governing permissions and
- * limitations under the License.
- */
-
-/**
- * @file Header file for Freescale K64 pin multiplexing.
- */
-
-#ifndef __INCLUDE_PINMUX_K64_H
-#define __INCLUDE_PINMUX_K64_H
-
-
-#define K64_PINMUX_NUM_PINS		32		/* # of I/O pins per port */
-
-/* Port Control Register offsets */
-
-#define K64_PINMUX_CTRL_OFFSET(pin)	(pin * 4)
-
-/*
- * The following pin settings match the K64 PORT module's
- * Pin Control Register bit fields.
- */
-
-/*
- * Pin interrupt configuration:
- * At reset, interrupts are disabled for all pins.
- */
-
-#define K64_PINMUX_INT_MASK			(0xF << 16)		/* interrupt config. */
-#define K64_PINMUX_INT_DISABLE		(0x0 << 16)		/* disable interrupt */
-#define K64_PINMUX_INT_LOW			(0x8 << 16)		/* active-low interrupt */
-#define K64_PINMUX_INT_RISING		(0x9 << 16)		/* rising-edge interrupt */
-#define K64_PINMUX_INT_FALLING		(0xA << 16)		/* falling-edge interrupt */
-#define K64_PINMUX_INT_BOTH_EDGE	(0xB << 16)		/* either edge interrupt */
-#define K64_PINMUX_INT_HIGH			(0xC << 16)		/* active-high interrupt */
-
-/*
- * Pin function identification:
- * At reset, the setting for PTA0/1/2/3/4 is function 7;
- * the remaining pins are set to function 0.
- */
-
-#define K64_PINMUX_ALT_MASK			(0x7 << 8)
-#define K64_PINMUX_ALT_0			(0x0 << 8)
-#define K64_PINMUX_ALT_1			(0x1 << 8)
-#define K64_PINMUX_ALT_2			(0x2 << 8)
-#define K64_PINMUX_ALT_3			(0x3 << 8)
-#define K64_PINMUX_ALT_4			(0x4 << 8)
-#define K64_PINMUX_ALT_5			(0x5 << 8)
-#define K64_PINMUX_ALT_6			(0x6 << 8)
-#define K64_PINMUX_ALT_7			K64_PINMUX_ALT_MASK
-
-#define K64_PINMUX_FUNC_GPIO		K64_PINMUX_ALT_1
-#define K64_PINMUX_FUNC_DISABLED	K64_PINMUX_ALT_0
-#define K64_PINMUX_FUNC_ANALOG		K64_PINMUX_ALT_0
-#define K64_PINMUX_FUNC_ETHERNET	K64_PINMUX_ALT_4
-#define K64_PINMUX_FUNC_SPI		K64_PINMUX_ALT_2
-
-/*
- * Pin drive strength configuration, for output:
- * At reset, the setting for PTA0/1/2/3/4/5 is high drive strength;
- * the remaining pins are set to low drive strength.
- */
-
-#define K64_PINMUX_DRV_STRN_MASK	(0x1 << 6)		/* drive strength select */
-#define K64_PINMUX_DRV_STRN_LOW		(0x0 << 6)		/* low drive strength */
-#define K64_PINMUX_DRV_STRN_HIGH	(0x1 << 6)		/* high drive strength */
-
-/*
- * Pin open drain configuration, for output:
- * At reset, open drain is disabled for all pins.
- */
-
-#define K64_PINMUX_OPEN_DRN_MASK	(0x1 << 5)		/* open drain enable */
-#define K64_PINMUX_OPEN_DRN_DISABLE	(0x0 << 5)		/* disable open drain */
-#define K64_PINMUX_OPEN_DRN_ENABLE	(0x1 << 5)		/* enable open drain */
-
-/*
- * Pin slew rate configuration, for output:
- * At reset, fast slew rate is set for all pins.
- */
-
-#define K64_PINMUX_SLEW_RATE_MASK	(0x1 << 2)	/* slew rate select */
-#define K64_PINMUX_SLEW_RATE_FAST	(0x0 << 2)	/* fast slew rate */
-#define K64_PINMUX_SLEW_RATE_SLOW	(0x1 << 2)	/* slow slew rate */
-
-/*
- * Pin pull-up/pull-down configuration, for input:
- * At reset, the setting for PTA1/2/3/4/5 is pull-up; PTA0 is pull-down;
- * pull-up/pull-down is disabled for the remaining pins.
- */
-
-#define K64_PINMUX_PULL_EN_MASK		(0x1 << 1)	/* pullup/pulldown enable */
-#define K64_PINMUX_PULL_DISABLE		(0x0 << 1)	/* disable pullup/pulldown */
-#define K64_PINMUX_PULL_ENABLE		(0x1 << 1)	/* enable pullup/pulldown */
-
-#define K64_PINMUX_PULL_SEL_MASK	(0x1 << 0)	/* pullup/pulldown select */
-#define K64_PINMUX_PULL_DN			(0x0 << 0)	/* select pulldown */
-#define K64_PINMUX_PULL_UP			(0x1 << 0)	/* select pullup */
-
-
-/*
- * Pin identification, by port and pin
- */
-
-#define K64_PIN_PTA0	0
-#define K64_PIN_PTA1	1
-#define K64_PIN_PTA2	2
-#define K64_PIN_PTA3	3
-#define K64_PIN_PTA4	4
-#define K64_PIN_PTA5	5
-#define K64_PIN_PTA6	6
-#define K64_PIN_PTA7	7
-#define K64_PIN_PTA8	8
-#define K64_PIN_PTA9	9
-#define K64_PIN_PTA10	10
-#define K64_PIN_PTA11	11
-#define K64_PIN_PTA12	12
-#define K64_PIN_PTA13	13
-#define K64_PIN_PTA14	14
-#define K64_PIN_PTA15	15
-#define K64_PIN_PTA16	16
-#define K64_PIN_PTA17	17
-#define K64_PIN_PTA18	18
-#define K64_PIN_PTA19	19
-#define K64_PIN_PTA20	20
-#define K64_PIN_PTA21	21
-#define K64_PIN_PTA22	22
-#define K64_PIN_PTA23	23
-#define K64_PIN_PTA24	24
-#define K64_PIN_PTA25	25
-#define K64_PIN_PTA26	26
-#define K64_PIN_PTA27	27
-#define K64_PIN_PTA28	28
-#define K64_PIN_PTA29	29
-#define K64_PIN_PTA30	30
-#define K64_PIN_PTA31	31
-
-#define K64_PIN_PTB0	32
-#define K64_PIN_PTB1	33
-#define K64_PIN_PTB2	34
-#define K64_PIN_PTB3	35
-#define K64_PIN_PTB4	36
-#define K64_PIN_PTB5	37
-#define K64_PIN_PTB6	38
-#define K64_PIN_PTB7	39
-#define K64_PIN_PTB8	40
-#define K64_PIN_PTB9	41
-#define K64_PIN_PTB10	42
-#define K64_PIN_PTB11	43
-#define K64_PIN_PTB12	44
-#define K64_PIN_PTB13	45
-#define K64_PIN_PTB14	46
-#define K64_PIN_PTB15	47
-#define K64_PIN_PTB16	48
-#define K64_PIN_PTB17	49
-#define K64_PIN_PTB18	50
-#define K64_PIN_PTB19	51
-#define K64_PIN_PTB20	52
-#define K64_PIN_PTB21	53
-#define K64_PIN_PTB22	54
-#define K64_PIN_PTB23	55
-#define K64_PIN_PTB24	56
-#define K64_PIN_PTB25	57
-#define K64_PIN_PTB26	58
-#define K64_PIN_PTB27	59
-#define K64_PIN_PTB28	60
-#define K64_PIN_PTB29	61
-#define K64_PIN_PTB30	62
-#define K64_PIN_PTB31	63
-
-#define K64_PIN_PTC0	64
-#define K64_PIN_PTC1	65
-#define K64_PIN_PTC2	66
-#define K64_PIN_PTC3	67
-#define K64_PIN_PTC4	68
-#define K64_PIN_PTC5	69
-#define K64_PIN_PTC6	70
-#define K64_PIN_PTC7	71
-#define K64_PIN_PTC8	72
-#define K64_PIN_PTC9	73
-#define K64_PIN_PTC10	74
-#define K64_PIN_PTC11	75
-#define K64_PIN_PTC12	76
-#define K64_PIN_PTC13	77
-#define K64_PIN_PTC14	78
-#define K64_PIN_PTC15	79
-#define K64_PIN_PTC16	80
-#define K64_PIN_PTC17	81
-#define K64_PIN_PTC18	82
-#define K64_PIN_PTC19	83
-#define K64_PIN_PTC20	84
-#define K64_PIN_PTC21	85
-#define K64_PIN_PTC22	86
-#define K64_PIN_PTC23	87
-#define K64_PIN_PTC24	88
-#define K64_PIN_PTC25	89
-#define K64_PIN_PTC26	90
-#define K64_PIN_PTC27	91
-#define K64_PIN_PTC28	92
-#define K64_PIN_PTC29	93
-#define K64_PIN_PTC30	94
-#define K64_PIN_PTC31	95
-
-#define K64_PIN_PTD0	96
-#define K64_PIN_PTD1	97
-#define K64_PIN_PTD2	98
-#define K64_PIN_PTD3	99
-#define K64_PIN_PTD4	100
-#define K64_PIN_PTD5	101
-#define K64_PIN_PTD6	102
-#define K64_PIN_PTD7	103
-#define K64_PIN_PTD8	104
-#define K64_PIN_PTD9	105
-#define K64_PIN_PTD10	106
-#define K64_PIN_PTD11	107
-#define K64_PIN_PTD12	108
-#define K64_PIN_PTD13	109
-#define K64_PIN_PTD14	110
-#define K64_PIN_PTD15	111
-#define K64_PIN_PTD16	112
-#define K64_PIN_PTD17	113
-#define K64_PIN_PTD18	114
-#define K64_PIN_PTD19	115
-#define K64_PIN_PTD20	116
-#define K64_PIN_PTD21	117
-#define K64_PIN_PTD22	118
-#define K64_PIN_PTD23	119
-#define K64_PIN_PTD24	120
-#define K64_PIN_PTD25	121
-#define K64_PIN_PTD26	122
-#define K64_PIN_PTD27	123
-#define K64_PIN_PTD28	124
-#define K64_PIN_PTD29	125
-#define K64_PIN_PTD30	126
-#define K64_PIN_PTD31	127
-
-#define K64_PIN_PTE0	128
-#define K64_PIN_PTE1	129
-#define K64_PIN_PTE2	130
-#define K64_PIN_PTE3	131
-#define K64_PIN_PTE4	132
-#define K64_PIN_PTE5	133
-#define K64_PIN_PTE6	134
-#define K64_PIN_PTE7	135
-#define K64_PIN_PTE8	136
-#define K64_PIN_PTE9	137
-#define K64_PIN_PTE10	138
-#define K64_PIN_PTE11	139
-#define K64_PIN_PTE12	140
-#define K64_PIN_PTE13	141
-#define K64_PIN_PTE14	142
-#define K64_PIN_PTE15	143
-#define K64_PIN_PTE16	144
-#define K64_PIN_PTE17	145
-#define K64_PIN_PTE18	146
-#define K64_PIN_PTE19	147
-#define K64_PIN_PTE20	148
-#define K64_PIN_PTE21	149
-#define K64_PIN_PTE22	150
-#define K64_PIN_PTE23	151
-#define K64_PIN_PTE24	152
-#define K64_PIN_PTE25	153
-#define K64_PIN_PTE26	154
-#define K64_PIN_PTE27	155
-#define K64_PIN_PTE28	156
-#define K64_PIN_PTE29	157
-#define K64_PIN_PTE30	158
-#define K64_PIN_PTE31	159
-
-int __deprecated _fsl_k64_set_pin(uint32_t pin_id, uint32_t func);
-
-int __deprecated _fsl_k64_get_pin(uint32_t pin_id, uint32_t *func);
-
-
-#endif /* __INCLUDE_PINMUX_K64_H */
diff --git a/drivers/pinmux/k64/pinmux_board_frdm_k64f.c b/drivers/pinmux/k64/pinmux_board_frdm_k64f.c
deleted file mode 100644
index 1b354625e36..00000000000
--- a/drivers/pinmux/k64/pinmux_board_frdm_k64f.c
+++ /dev/null
@@ -1,126 +0,0 @@
-/* pinmux_board_frdm_k64f.c - pin out mapping for the Freescale FRDM-K64F board */
-
-/*
- * Copyright (c) 2016 Intel Corporation
- *
- * Licensed under the Apache License, Version 2.0 (the "License");
- * you may not use this file except in compliance with the License.
- * You may obtain a copy of the License at
- *
- *     http://www.apache.org/licenses/LICENSE-2.0
- *
- * Unless required by applicable law or agreed to in writing, software
- * distributed under the License is distributed on an "AS IS" BASIS,
- * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- * See the License for the specific language governing permissions and
- * limitations under the License.
- */
-
-#include <kernel.h>
-#include <device.h>
-#include <init.h>
-#include <sys_io.h>
-#include <pinmux.h>
-#include <pinmux/pinmux.h>
-#include <pinmux/k64/pinmux.h>
-
-/*
- * I/O pin configuration
- */
-
-/*
- * Alter this table to change the default Arduino pin settings on the Freescale
- * FRDM-K64F boards.  Specifically, change the PINMUX_* values to represent
- * the functionality desired.
- *
- * The FRDM-K64F board routes the PTA0/1/2 pins for JTAG/SWD signals that
- * are used for the OpenSDAv2 debug interface.  These pins are also routed to
- * the Arduino header pins as D8, D3 and D5, respectively.
- * Since the K64 MCU configures these pins for JTAG/SWD signaling at reset,
- * they should only be re-configured if the debug interface is not used.
- *
- */
-static const struct pin_config mux_config[] = {
-	/* pin,		selected mode */
-	{ K64_PIN_PTC16, K64_PINMUX_ALT_3 }, /* UART3 RX */
-	{ K64_PIN_PTC17, K64_PINMUX_ALT_3 }, /* UART3 TX */
-	{ K64_PIN_PTB9,  K64_PINMUX_FUNC_GPIO },
-#ifndef CONFIG_PRESERVE_JTAG_IO_PINS
-	{ K64_PIN_PTA1,  K64_PINMUX_FUNC_GPIO },
-#endif
-	{ K64_PIN_PTB23, K64_PINMUX_FUNC_GPIO },
-#ifndef CONFIG_PRESERVE_JTAG_IO_PINS
-	{ K64_PIN_PTA2,  K64_PINMUX_FUNC_GPIO },
-#endif
-	{ K64_PIN_PTC2,  K64_PINMUX_FUNC_GPIO },
-	{ K64_PIN_PTC3,  K64_PINMUX_FUNC_GPIO },
-#ifndef CONFIG_PRESERVE_JTAG_IO_PINS
-	{ K64_PIN_PTA0,  K64_PINMUX_FUNC_GPIO },
-#endif
-	{ K64_PIN_PTC4,  K64_PINMUX_FUNC_GPIO },
-
-	{ K64_PIN_PTC6,  K64_PINMUX_FUNC_GPIO }, /* SW2 / FXOS8700 INT1 */
-	{ K64_PIN_PTA4,  K64_PINMUX_FUNC_GPIO }, /* SW3 */
-
-	{ K64_PIN_PTB22, K64_PINMUX_FUNC_GPIO }, /* Red LED */
-	{ K64_PIN_PTE26, K64_PINMUX_FUNC_GPIO }, /* Green LED */
-	{ K64_PIN_PTB21, K64_PINMUX_FUNC_GPIO }, /* Blue LED */
-
-	/* SPI 0 */
-#ifdef CONFIG_SPI_0
-	{ K64_PIN_PTD0,  K64_PINMUX_FUNC_SPI },
-	{ K64_PIN_PTD2,  K64_PINMUX_FUNC_SPI },
-	{ K64_PIN_PTD3,  K64_PINMUX_FUNC_SPI },
-	{ K64_PIN_PTD1,  K64_PINMUX_FUNC_SPI },
-#else
-	{ K64_PIN_PTD0,  K64_PINMUX_FUNC_GPIO },
-	{ K64_PIN_PTD2,  K64_PINMUX_FUNC_GPIO },
-	{ K64_PIN_PTD3,  K64_PINMUX_FUNC_GPIO },
-	{ K64_PIN_PTD1,  K64_PINMUX_FUNC_GPIO },
-#endif
-
-	/* I2C0_SDA */
-	{ K64_PIN_PTE25, (K64_PINMUX_ALT_5 | K64_PINMUX_OPEN_DRN_ENABLE) },
-	/* I2C0_SCL */
-	{ K64_PIN_PTE24, (K64_PINMUX_ALT_5 | K64_PINMUX_OPEN_DRN_ENABLE) },
-	{ K64_PIN_PTB2,  K64_PINMUX_FUNC_ANALOG },  /* ADC0_SE12/Analog In 0 */
-	{ K64_PIN_PTB3,  K64_PINMUX_FUNC_ANALOG },  /* ADC0_SE13/Analog In 1 */
-	{ K64_PIN_PTB10, K64_PINMUX_FUNC_ANALOG },  /* ADC1_SE14/Analog In 2 */
-	{ K64_PIN_PTB11, K64_PINMUX_FUNC_ANALOG },  /* ADC1_SE15/Analog In 3 */
-	{ K64_PIN_PTC11, K64_PINMUX_FUNC_ANALOG },  /* ADC1_SE7b/Analog In 4 */
-	{ K64_PIN_PTC10, K64_PINMUX_FUNC_ANALOG },  /* ADC1_SE6b/Analog In 5 */
-
-#if CONFIG_ETH_MCUX_0
-	{ K64_PIN_PTA5, K64_PINMUX_FUNC_ETHERNET},
-	{ K64_PIN_PTA12, K64_PINMUX_FUNC_ETHERNET},
-	{ K64_PIN_PTA13, K64_PINMUX_FUNC_ETHERNET},
-	{ K64_PIN_PTA14, K64_PINMUX_FUNC_ETHERNET},
-	{ K64_PIN_PTA15, K64_PINMUX_FUNC_ETHERNET},
-	{ K64_PIN_PTA16, K64_PINMUX_FUNC_ETHERNET},
-	{ K64_PIN_PTA17, K64_PINMUX_FUNC_ETHERNET},
-	{ K64_PIN_PTA28, K64_PINMUX_FUNC_ETHERNET},
-	{ K64_PIN_PTB0, (K64_PINMUX_FUNC_ETHERNET |
-			 K64_PINMUX_OPEN_DRN_ENABLE |
-			 K64_PINMUX_PULL_ENABLE |
-			 K64_PINMUX_PULL_UP)},
-	{ K64_PIN_PTB1, K64_PINMUX_FUNC_ETHERNET},
-	{ K64_PIN_PTC16, K64_PINMUX_FUNC_ETHERNET},
-	{ K64_PIN_PTC17, K64_PINMUX_FUNC_ETHERNET},
-	{ K64_PIN_PTC18, K64_PINMUX_FUNC_ETHERNET},
-	{ K64_PIN_PTC19, K64_PINMUX_FUNC_ETHERNET},
-#endif
-};
-
-static int fsl_frdm_k64f_pin_init(struct device *arg)
-{
-	ARG_UNUSED(arg);
-
-	/* configure the pins from the default mapping above */
-	for (int i = 0; i < ARRAY_SIZE(mux_config); i++) {
-		_fsl_k64_set_pin(mux_config[i].pin_num, mux_config[i].mode);
-	}
-
-	return 0;
-}
-
-SYS_INIT(fsl_frdm_k64f_pin_init, POST_KERNEL, CONFIG_PINMUX_INIT_PRIORITY);
diff --git a/drivers/pinmux/k64/pinmux_board_hexiwear.c b/drivers/pinmux/k64/pinmux_board_hexiwear.c
deleted file mode 100644
index 6b0c9c61dcd..00000000000
--- a/drivers/pinmux/k64/pinmux_board_hexiwear.c
+++ /dev/null
@@ -1,69 +0,0 @@
-/* pinmux_board_hexiwear.c - pin out mapping for the NXP Hexiwear board */
-
-/*
- * Copyright (c) 2016 Intel Corporation
- * Copyright (c) 2016, Freescale Semiconductor, Inc.
- *
- * Licensed under the Apache License, Version 2.0 (the "License");
- * you may not use this file except in compliance with the License.
- * You may obtain a copy of the License at
- *
- *     http://www.apache.org/licenses/LICENSE-2.0
- *
- * Unless required by applicable law or agreed to in writing, software
- * distributed under the License is distributed on an "AS IS" BASIS,
- * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- * See the License for the specific language governing permissions and
- * limitations under the License.
- */
-
-#include <kernel.h>
-#include <device.h>
-#include <init.h>
-#include <sys_io.h>
-#include <pinmux.h>
-#include <pinmux/pinmux.h>
-#include <pinmux/k64/pinmux.h>
-
-/*
- * I/O pin configuration
- */
-
-/*
- * Alter this table to change the default pin settings on the NXP Hexiwear
- * boards. Specifically, change the PINMUX_* values to represent the
- * functionality desired.
- */
-static const struct pin_config mux_config[] = {
-	/* pin,		selected mode */
-
-	/* RGB */
-	{ K64_PIN_PTC8, K64_PINMUX_FUNC_GPIO},
-	{ K64_PIN_PTC9, K64_PINMUX_FUNC_GPIO},
-	{ K64_PIN_PTD0, K64_PINMUX_FUNC_GPIO},
-
-	/* I2C1 - accel/mag, gyro, pressure */
-	{ K64_PIN_PTC10, (K64_PINMUX_ALT_2 | K64_PINMUX_OPEN_DRN_ENABLE)},
-	{ K64_PIN_PTC11, (K64_PINMUX_ALT_2 | K64_PINMUX_OPEN_DRN_ENABLE)},
-
-	/* FXOS8700 INT1 */
-	{ K64_PIN_PTC1, K64_PINMUX_FUNC_GPIO},
-
-	/* UART4 - BLE */
-	{ K64_PIN_PTE25, K64_PINMUX_ALT_3 },
-	{ K64_PIN_PTE24, K64_PINMUX_ALT_3 },
-};
-
-static int hexiwear_pin_init(struct device *arg)
-{
-	ARG_UNUSED(arg);
-
-	/* configure the pins from the default mapping above */
-	for (int i = 0; i < ARRAY_SIZE(mux_config); i++) {
-		_fsl_k64_set_pin(mux_config[i].pin_num, mux_config[i].mode);
-	}
-
-	return 0;
-}
-
-SYS_INIT(hexiwear_pin_init, POST_KERNEL, CONFIG_PINMUX_INIT_PRIORITY);