diff --git a/arch/arc/core/mpu/arc_mpu.c b/arch/arc/core/mpu/arc_mpu.c
index 55ae3659b9c..0c116b87e39 100644
--- a/arch/arc/core/mpu/arc_mpu.c
+++ b/arch/arc/core/mpu/arc_mpu.c
@@ -104,7 +104,7 @@ static inline void _region_init(u32_t index, u32_t region_addr, u32_t size,
 		region_attr |= AUX_MPU_RDP_REGION_SIZE(bits);
 		region_addr |= AUX_MPU_RDB_VALID_MASK;
 	} else {
-		region_addr = 0;
+		region_addr = 0U;
 	}
 
 	_arc_v2_aux_reg_write(_ARC_V2_MPU_RDP0 + index, region_attr);
@@ -495,7 +495,7 @@ void arc_core_mpu_configure_mem_domain(struct k_mem_domain *mem_domain)
 		pparts = mem_domain->partitions;
 	} else {
 		LOG_DBG("disable domain partition regions");
-		num_partitions = 0;
+		num_partitions = 0U;
 		pparts = NULL;
 	}
 #if CONFIG_ARC_MPU_VER == 2
@@ -668,12 +668,12 @@ static void _arc_mpu_config(void)
 	r_index = num_regions - mpu_config.num_regions;
 
 	/* clear all the regions first */
-	for (i = 0; i < r_index; i++) {
+	for (i = 0U; i < r_index; i++) {
 		_region_init(i, 0, 0, 0);
 	}
 
 	/* configure the static regions */
-	for (i = 0; i < mpu_config.num_regions; i++) {
+	for (i = 0U; i < mpu_config.num_regions; i++) {
 		_region_init(r_index,
 			mpu_config.mpu_regions[i].base,
 			mpu_config.mpu_regions[i].size,
@@ -685,7 +685,7 @@ static void _arc_mpu_config(void)
 	arc_core_mpu_default(0);
 
 #elif CONFIG_ARC_MPU_VER == 3
-	for (i = 0; i < mpu_config.num_regions; i++) {
+	for (i = 0U; i < mpu_config.num_regions; i++) {
 		_region_init(i,
 			mpu_config.mpu_regions[i].base,
 			mpu_config.mpu_regions[i].size,
diff --git a/arch/arc/core/thread.c b/arch/arc/core/thread.c
index ca91b1690db..ee454d92483 100644
--- a/arch/arc/core/thread.c
+++ b/arch/arc/core/thread.c
@@ -143,7 +143,7 @@ void _new_thread(struct k_thread *thread, k_thread_stack_t *stack,
 		stackAdjEnd - sizeof(struct init_stack_frame));
 
 	/* fill init context */
-	pInitCtx->status32 = 0;
+	pInitCtx->status32 = 0U;
 	if (options & K_USER) {
 		pInitCtx->pc = ((u32_t)_user_thread_entry_wrapper);
 	} else {
@@ -169,7 +169,7 @@ void _new_thread(struct k_thread *thread, k_thread_stack_t *stack,
 		STACK_ROUND_DOWN(stackAdjEnd) -
 		sizeof(struct init_stack_frame));
 
-	pInitCtx->status32 = 0;
+	pInitCtx->status32 = 0U;
 	pInitCtx->pc = ((u32_t)_thread_entry_wrapper);
 #endif
 
diff --git a/arch/arm/core/cortex_m/mpu/arm_mpu.c b/arch/arm/core/cortex_m/mpu/arm_mpu.c
index 06cb82305a5..bdaed3e0700 100644
--- a/arch/arm/core/cortex_m/mpu/arm_mpu.c
+++ b/arch/arm/core/cortex_m/mpu/arm_mpu.c
@@ -233,7 +233,7 @@ void arm_core_mpu_configure_mem_domain(struct k_mem_domain *mem_domain)
 		pparts = mem_domain->partitions;
 	} else {
 		LOG_DBG("disable domain partition regions");
-		num_partitions = 0;
+		num_partitions = 0U;
 		pparts = NULL;
 	}
 
@@ -355,7 +355,7 @@ static int arm_mpu_init(struct device *arg)
 	_mpu_init();
 
 	/* Configure regions */
-	for (r_index = 0; r_index < mpu_config.num_regions; r_index++) {
+	for (r_index = 0U; r_index < mpu_config.num_regions; r_index++) {
 		_region_init(r_index, &mpu_config.mpu_regions[r_index]);
 	}
 
diff --git a/arch/arm/core/cortex_m/mpu/nxp_mpu.c b/arch/arm/core/cortex_m/mpu/nxp_mpu.c
index 625c254e992..06d78f16d95 100644
--- a/arch/arm/core/cortex_m/mpu/nxp_mpu.c
+++ b/arch/arm/core/cortex_m/mpu/nxp_mpu.c
@@ -200,7 +200,7 @@ void arm_core_mpu_enable(void)
 		/* Enable MPU */
 		SYSMPU->CESR |= SYSMPU_CESR_VLD_MASK;
 
-		nxp_mpu_enabled = 1;
+		nxp_mpu_enabled = 1U;
 	}
 }
 
@@ -215,7 +215,7 @@ void arm_core_mpu_disable(void)
 		/* Clear Interrupts */
 		SYSMPU->CESR |=  SYSMPU_CESR_SPERR_MASK;
 
-		nxp_mpu_enabled = 0;
+		nxp_mpu_enabled = 0U;
 	}
 }
 
@@ -273,7 +273,7 @@ void arm_core_mpu_configure_mem_domain(struct k_mem_domain *mem_domain)
 		pparts = mem_domain->partitions;
 	} else {
 		LOG_DBG("disable domain partition regions");
-		num_partitions = 0;
+		num_partitions = 0U;
 		pparts = NULL;
 	}
 
@@ -393,7 +393,7 @@ int arm_core_mpu_buffer_validate(void *addr, size_t size, int write)
 	u8_t r_index;
 
 	/* Iterate all MPU regions */
-	for (r_index = 0; r_index < _get_num_usable_regions(); r_index++) {
+	for (r_index = 0U; r_index < _get_num_usable_regions(); r_index++) {
 		if (!_is_enabled_region(r_index) ||
 		    !_is_in_region(r_index, (u32_t)addr, size)) {
 			continue;
@@ -437,7 +437,7 @@ static void _nxp_mpu_config(void)
 	/* MPU Configuration */
 
 	/* Configure regions */
-	for (r_index = 0; r_index < mpu_config.num_regions; r_index++) {
+	for (r_index = 0U; r_index < mpu_config.num_regions; r_index++) {
 		_region_init(r_index,
 			     mpu_config.mpu_regions[r_index].base,
 			     mpu_config.mpu_regions[r_index].end,
@@ -447,7 +447,7 @@ static void _nxp_mpu_config(void)
 	/* Enable MPU */
 	SYSMPU->CESR |= SYSMPU_CESR_VLD_MASK;
 
-	nxp_mpu_enabled = 1;
+	nxp_mpu_enabled = 1U;
 
 #if defined(CONFIG_APPLICATION_MEMORY)
 	u32_t index, region_attr, base, size;
diff --git a/arch/arm/core/cortex_m/prep_c.c b/arch/arm/core/cortex_m/prep_c.c
index 9cce3b7c4f7..f5eb91eacbb 100644
--- a/arch/arm/core/cortex_m/prep_c.c
+++ b/arch/arm/core/cortex_m/prep_c.c
@@ -117,7 +117,7 @@ void _PrepC(void)
 	_bss_zero();
 	_data_copy();
 #ifdef CONFIG_BOOT_TIME_MEASUREMENT
-	__start_time_stamp = 0;
+	__start_time_stamp = 0U;
 #endif
 	_IntLibInit();
 	_Cstart();
diff --git a/arch/common/timing_info_bench.c b/arch/common/timing_info_bench.c
index 2ff0deaa128..9507fc573cc 100644
--- a/arch/common/timing_info_bench.c
+++ b/arch/common/timing_info_bench.c
@@ -102,7 +102,7 @@ void read_timer_end_of_swap(void)
 {
 	if (__read_swap_end_time_value == 1) {
 		TIMING_INFO_PRE_READ();
-		__read_swap_end_time_value = 2;
+		__read_swap_end_time_value = 2U;
 		__common_var_swap_end_time = (u64_t)TIMING_INFO_OS_GET_TIME();
 	}
 }
diff --git a/arch/nios2/core/cache.c b/arch/nios2/core/cache.c
index e6a59e9c392..2c8d14f0c29 100644
--- a/arch/nios2/core/cache.c
+++ b/arch/nios2/core/cache.c
@@ -26,7 +26,7 @@ void _nios2_icache_flush_all(void)
 {
 	u32_t i;
 
-	for (i = 0; i < ALT_CPU_ICACHE_SIZE; i += ALT_CPU_ICACHE_LINE_SIZE) {
+	for (i = 0U; i < ALT_CPU_ICACHE_SIZE; i += ALT_CPU_ICACHE_LINE_SIZE) {
 		_nios2_icache_flush(i);
 	}
 
@@ -55,7 +55,7 @@ void _nios2_dcache_flush_all(void)
 {
 	u32_t i;
 
-	for (i = 0; i < ALT_CPU_DCACHE_SIZE; i += ALT_CPU_DCACHE_LINE_SIZE) {
+	for (i = 0U; i < ALT_CPU_DCACHE_SIZE; i += ALT_CPU_DCACHE_LINE_SIZE) {
 		_nios2_dcache_flush(i);
 	}
 }
diff --git a/arch/x86/core/spec_ctrl.c b/arch/x86/core/spec_ctrl.c
index 284cfd539e7..9a8742262f3 100644
--- a/arch/x86/core/spec_ctrl.c
+++ b/arch/x86/core/spec_ctrl.c
@@ -20,7 +20,7 @@
 static int
 cpu_has_spec_ctrl(void)
 {
-	u32_t eax, ebx, ecx = 0, edx;
+	u32_t eax, ebx, ecx = 0U, edx;
 
 	if (!__get_cpuid(CPUID_EXTENDED_FEATURES_LVL,
 			 &eax, &ebx, &ecx, &edx)) {
diff --git a/arch/x86/core/x86_mmu.c b/arch/x86/core/x86_mmu.c
index fb5da643fb2..05d4380638b 100644
--- a/arch/x86/core/x86_mmu.c
+++ b/arch/x86/core/x86_mmu.c
@@ -82,11 +82,11 @@ int _arch_buffer_validate(void *addr, size_t size, int write)
 #ifdef CONFIG_X86_PAE_MODE
 	for (pdpte = start_pdpte_num; pdpte <= end_pdpte_num; pdpte++) {
 		if (pdpte != start_pdpte_num) {
-			start_pde_num = 0;
+			start_pde_num = 0U;
 		}
 
 		if (pdpte != end_pdpte_num) {
-			end_pde_num = 0;
+			end_pde_num = 0U;
 		} else {
 			end_pde_num = MMU_PDE_NUM((char *)addr + size - 1);
 		}
@@ -125,7 +125,7 @@ int _arch_buffer_validate(void *addr, size_t size, int write)
 			 * of the buffer.
 			 */
 			if (pde != end_pde_num) {
-				ending_pte_num = 1023;
+				ending_pte_num = 1023U;
 			} else {
 				ending_pte_num =
 					MMU_PAGE_NUM((char *)addr + size - 1);
@@ -135,7 +135,7 @@ int _arch_buffer_validate(void *addr, size_t size, int write)
 			 * will have the start pte number as zero.
 			 */
 			if (pde != start_pde_num) {
-				starting_pte_num = 0;
+				starting_pte_num = 0U;
 			}
 
 			pte_value.value = 0xFFFFFFFF;
@@ -236,8 +236,8 @@ static inline void _x86_mem_domain_pages_update(struct k_mem_domain *mem_domain,
 	 * For x86: interate over all the partitions and set the
 	 * required flags in the correct MMU page tables.
 	 */
-	partitions_count = 0;
-	for (partition_index = 0;
+	partitions_count = 0U;
+	for (partition_index = 0U;
 	     partitions_count < total_partitions;
 	     partition_index++) {