diff --git a/drivers/interrupt_controller/Kconfig.cavs b/drivers/interrupt_controller/Kconfig.cavs index 4b1217df7ef..9a9f6fcc942 100644 --- a/drivers/interrupt_controller/Kconfig.cavs +++ b/drivers/interrupt_controller/Kconfig.cavs @@ -18,34 +18,18 @@ config CAVS_ISR_TBL_OFFSET This indicates the offset in the SW_ISR_TABLE beginning from where the ISRs for CAVS Interrupt Controller are assigned. -config CAVS_ICTL_0_NAME - string "CAVS 0 Driver name" - default "CAVS_0" - config CAVS_ICTL_0_OFFSET int "Parent interrupt number to which CAVS_0 maps" default 0 -config CAVS_ICTL_1_NAME - string "CAVS 1 Driver name" - default "CAVS_1" - config CAVS_ICTL_1_OFFSET int "Parent interrupt number to which CAVS_1 maps" default 0 -config CAVS_ICTL_2_NAME - string "CAVS 2 Driver name" - default "CAVS_2" - config CAVS_ICTL_2_OFFSET int "Parent interrupt number to which CAVS_2 maps" default 0 -config CAVS_ICTL_3_NAME - string "CAVS 3 Driver name" - default "CAVS_3" - config CAVS_ICTL_3_OFFSET int "Parent interrupt number to which CAVS_3 maps" default 0 diff --git a/drivers/interrupt_controller/intc_cavs.c b/drivers/interrupt_controller/intc_cavs.c index f3e4503561a..64d57167562 100644 --- a/drivers/interrupt_controller/intc_cavs.c +++ b/drivers/interrupt_controller/intc_cavs.c @@ -136,7 +136,7 @@ static struct cavs_ictl_runtime cavs_0_runtime = { .base_addr = DT_CAVS_ICTL_BASE_ADDR, }; -DEVICE_AND_API_INIT(cavs_ictl_0, CONFIG_CAVS_ICTL_0_NAME, +DEVICE_AND_API_INIT(cavs_ictl_0, DT_LABEL(DT_NODELABEL(cavs0)), cavs_ictl_0_initialize, &cavs_0_runtime, &cavs_config_0, PRE_KERNEL_1, CONFIG_CAVS_ICTL_INIT_PRIORITY, &cavs_apis); @@ -164,7 +164,7 @@ static struct cavs_ictl_runtime cavs_1_runtime = { .base_addr = DT_CAVS_ICTL_BASE_ADDR + sizeof(struct cavs_registers), }; -DEVICE_AND_API_INIT(cavs_ictl_1, CONFIG_CAVS_ICTL_1_NAME, +DEVICE_AND_API_INIT(cavs_ictl_1, DT_LABEL(DT_NODELABEL(cavs1)), cavs_ictl_1_initialize, &cavs_1_runtime, &cavs_config_1, PRE_KERNEL_1, CONFIG_CAVS_ICTL_INIT_PRIORITY, &cavs_apis); @@ -192,7 +192,7 @@ static struct cavs_ictl_runtime cavs_2_runtime = { .base_addr = DT_CAVS_ICTL_BASE_ADDR + sizeof(struct cavs_registers) * 2, }; -DEVICE_AND_API_INIT(cavs_ictl_2, CONFIG_CAVS_ICTL_2_NAME, +DEVICE_AND_API_INIT(cavs_ictl_2, DT_LABEL(DT_NODELABEL(cavs2)), cavs_ictl_2_initialize, &cavs_2_runtime, &cavs_config_2, PRE_KERNEL_1, CONFIG_CAVS_ICTL_INIT_PRIORITY, &cavs_apis); @@ -220,7 +220,7 @@ static struct cavs_ictl_runtime cavs_3_runtime = { .base_addr = DT_CAVS_ICTL_BASE_ADDR + sizeof(struct cavs_registers) * 3, }; -DEVICE_AND_API_INIT(cavs_ictl_3, CONFIG_CAVS_ICTL_3_NAME, +DEVICE_AND_API_INIT(cavs_ictl_3, DT_LABEL(DT_NODELABEL(cavs3)), cavs_ictl_3_initialize, &cavs_3_runtime, &cavs_config_3, PRE_KERNEL_1, CONFIG_CAVS_ICTL_INIT_PRIORITY, &cavs_apis); diff --git a/dts/bindings/interrupt-controller/intel,cavs-intc.yaml b/dts/bindings/interrupt-controller/intel,cavs-intc.yaml index 5424a0b8ea6..530ffd69085 100644 --- a/dts/bindings/interrupt-controller/intel,cavs-intc.yaml +++ b/dts/bindings/interrupt-controller/intel,cavs-intc.yaml @@ -11,6 +11,9 @@ properties: interrupts: required: true + label: + required: true + "#interrupt-cells": const: 3 diff --git a/dts/xtensa/intel/intel_apl_adsp.dtsi b/dts/xtensa/intel/intel_apl_adsp.dtsi index bda5029fcf1..c71b10520eb 100644 --- a/dts/xtensa/intel/intel_apl_adsp.dtsi +++ b/dts/xtensa/intel/intel_apl_adsp.dtsi @@ -53,6 +53,7 @@ #interrupt-cells = <3>; interrupts = <6 0 0>; interrupt-parent = <&core_intc>; + label = "CAVS_0"; }; cavs1: cavs@1610 { @@ -62,6 +63,7 @@ #interrupt-cells = <3>; interrupts = <0xA 0 0>; interrupt-parent = <&core_intc>; + label = "CAVS_1"; }; cavs2: cavs@1620 { @@ -71,6 +73,7 @@ #interrupt-cells = <3>; interrupts = <0XD 0 0>; interrupt-parent = <&core_intc>; + label = "CAVS_2"; }; cavs3: cavs@1630 { @@ -80,6 +83,7 @@ #interrupt-cells = <3>; interrupts = <0x10 0 0>; interrupt-parent = <&core_intc>; + label = "CAVS_3"; }; idc: idc@1200 { diff --git a/dts/xtensa/intel/intel_s1000.dtsi b/dts/xtensa/intel/intel_s1000.dtsi index 06e5cb901a9..c969de4cb80 100644 --- a/dts/xtensa/intel/intel_s1000.dtsi +++ b/dts/xtensa/intel/intel_s1000.dtsi @@ -58,6 +58,7 @@ #interrupt-cells = <3>; interrupts = <6 0 0>; interrupt-parent = <&core_intc>; + label = "CAVS_0"; }; cavs1: cavs@78810 { @@ -67,6 +68,7 @@ #interrupt-cells = <3>; interrupts = <0xA 0 0>; interrupt-parent = <&core_intc>; + label = "CAVS_1"; }; cavs2: cavs@78820 { @@ -76,6 +78,7 @@ #interrupt-cells = <3>; interrupts = <0XD 0 0>; interrupt-parent = <&core_intc>; + label = "CAVS_2"; }; cavs3: cavs@78830 { @@ -85,6 +88,7 @@ #interrupt-cells = <3>; interrupts = <0x10 0 0>; interrupt-parent = <&core_intc>; + label = "CAVS_3"; }; idc: idc@1200 { diff --git a/soc/xtensa/intel_apl_adsp/soc.c b/soc/xtensa/intel_apl_adsp/soc.c index fe5ecd47825..d769ba81963 100644 --- a/soc/xtensa/intel_apl_adsp/soc.c +++ b/soc/xtensa/intel_apl_adsp/soc.c @@ -21,22 +21,24 @@ #include LOG_MODULE_REGISTER(soc); +#define CAVS_INTC_NODE(n) DT_INST(n, intel_cavs_intc) + void z_soc_irq_enable(u32_t irq) { struct device *dev_cavs; switch (XTENSA_IRQ_NUMBER(irq)) { - case DT_CAVS_ICTL_0_IRQ: - dev_cavs = device_get_binding(CONFIG_CAVS_ICTL_0_NAME); + case DT_IRQN(CAVS_INTC_NODE(0)): + dev_cavs = device_get_binding(DT_LABEL(CAVS_INTC_NODE(0))); break; - case DT_CAVS_ICTL_1_IRQ: - dev_cavs = device_get_binding(CONFIG_CAVS_ICTL_1_NAME); + case DT_IRQN(CAVS_INTC_NODE(1)): + dev_cavs = device_get_binding(DT_LABEL(CAVS_INTC_NODE(1))); break; - case DT_CAVS_ICTL_2_IRQ: - dev_cavs = device_get_binding(CONFIG_CAVS_ICTL_2_NAME); + case DT_IRQN(CAVS_INTC_NODE(2)): + dev_cavs = device_get_binding(DT_LABEL(CAVS_INTC_NODE(2))); break; - case DT_CAVS_ICTL_3_IRQ: - dev_cavs = device_get_binding(CONFIG_CAVS_ICTL_3_NAME); + case DT_IRQN(CAVS_INTC_NODE(3)): + dev_cavs = device_get_binding(DT_LABEL(CAVS_INTC_NODE(3))); break; default: /* regular interrupt */ @@ -64,17 +66,17 @@ void z_soc_irq_disable(u32_t irq) struct device *dev_cavs; switch (XTENSA_IRQ_NUMBER(irq)) { - case DT_CAVS_ICTL_0_IRQ: - dev_cavs = device_get_binding(CONFIG_CAVS_ICTL_0_NAME); + case DT_IRQN(CAVS_INTC_NODE(0)): + dev_cavs = device_get_binding(DT_LABEL(CAVS_INTC_NODE(0))); break; - case DT_CAVS_ICTL_1_IRQ: - dev_cavs = device_get_binding(CONFIG_CAVS_ICTL_1_NAME); + case DT_IRQN(CAVS_INTC_NODE(1)): + dev_cavs = device_get_binding(DT_LABEL(CAVS_INTC_NODE(1))); break; - case DT_CAVS_ICTL_2_IRQ: - dev_cavs = device_get_binding(CONFIG_CAVS_ICTL_2_NAME); + case DT_IRQN(CAVS_INTC_NODE(2)): + dev_cavs = device_get_binding(DT_LABEL(CAVS_INTC_NODE(2))); break; - case DT_CAVS_ICTL_3_IRQ: - dev_cavs = device_get_binding(CONFIG_CAVS_ICTL_3_NAME); + case DT_IRQN(CAVS_INTC_NODE(3)): + dev_cavs = device_get_binding(DT_LABEL(CAVS_INTC_NODE(3))); break; default: /* regular interrupt */ @@ -105,17 +107,17 @@ int z_soc_irq_is_enabled(unsigned int irq) int ret = 0; switch (XTENSA_IRQ_NUMBER(irq)) { - case DT_CAVS_ICTL_0_IRQ: - dev_cavs = device_get_binding(CONFIG_CAVS_ICTL_0_NAME); + case DT_IRQN(CAVS_INTC_NODE(0)): + dev_cavs = device_get_binding(DT_LABEL(CAVS_INTC_NODE(0))); break; - case DT_CAVS_ICTL_1_IRQ: - dev_cavs = device_get_binding(CONFIG_CAVS_ICTL_1_NAME); + case DT_IRQN(CAVS_INTC_NODE(1)): + dev_cavs = device_get_binding(DT_LABEL(CAVS_INTC_NODE(1))); break; - case DT_CAVS_ICTL_2_IRQ: - dev_cavs = device_get_binding(CONFIG_CAVS_ICTL_2_NAME); + case DT_IRQN(CAVS_INTC_NODE(2)): + dev_cavs = device_get_binding(DT_LABEL(CAVS_INTC_NODE(2))); break; - case DT_CAVS_ICTL_3_IRQ: - dev_cavs = device_get_binding(CONFIG_CAVS_ICTL_3_NAME); + case DT_IRQN(CAVS_INTC_NODE(3)): + dev_cavs = device_get_binding(DT_LABEL(CAVS_INTC_NODE(3))); break; default: /* regular interrupt */ @@ -142,7 +144,7 @@ int z_soc_irq_connect_dynamic(unsigned int irq, unsigned int priority, void *parameter, u32_t flags) { uint32_t table_idx; - uint32_t cavs_irq; + uint32_t cavs_irq, cavs_idx; int ret; ARG_UNUSED(flags); @@ -160,26 +162,25 @@ int z_soc_irq_connect_dynamic(unsigned int irq, unsigned int priority, /* Figure out the base index. */ switch (XTENSA_IRQ_NUMBER(irq)) { - case DT_CAVS_ICTL_0_IRQ: - table_idx = CONFIG_CAVS_ISR_TBL_OFFSET; + case DT_IRQN(CAVS_INTC_NODE(0)): + cavs_idx = 0; break; - case DT_CAVS_ICTL_1_IRQ: - table_idx = CONFIG_CAVS_ISR_TBL_OFFSET + - CONFIG_MAX_IRQ_PER_AGGREGATOR; + case DT_IRQN(CAVS_INTC_NODE(1)): + cavs_idx = 1; break; - case DT_CAVS_ICTL_2_IRQ: - table_idx = CONFIG_CAVS_ISR_TBL_OFFSET + - CONFIG_MAX_IRQ_PER_AGGREGATOR * 2; + case DT_IRQN(CAVS_INTC_NODE(2)): + cavs_idx = 2; break; - case DT_CAVS_ICTL_3_IRQ: - table_idx = CONFIG_CAVS_ISR_TBL_OFFSET + - CONFIG_MAX_IRQ_PER_AGGREGATOR * 3; + case DT_IRQN(CAVS_INTC_NODE(3)): + cavs_idx = 3; break; default: ret = -EINVAL; goto irq_connect_out; } + table_idx = CONFIG_CAVS_ISR_TBL_OFFSET + + CONFIG_MAX_IRQ_PER_AGGREGATOR * cavs_idx; table_idx += cavs_irq; _sw_isr_table[table_idx].arg = parameter; diff --git a/soc/xtensa/intel_s1000/soc.c b/soc/xtensa/intel_s1000/soc.c index 3740dfca423..be728018c1b 100644 --- a/soc/xtensa/intel_s1000/soc.c +++ b/soc/xtensa/intel_s1000/soc.c @@ -19,22 +19,24 @@ LOG_MODULE_REGISTER(soc); static u32_t ref_clk_freq; +#define CAVS_INTC_NODE(n) DT_INST(n, intel_cavs_intc) + void z_soc_irq_enable(u32_t irq) { struct device *dev_cavs, *dev_ictl; switch (XTENSA_IRQ_NUMBER(irq)) { - case DT_CAVS_ICTL_0_IRQ: - dev_cavs = device_get_binding(CONFIG_CAVS_ICTL_0_NAME); + case DT_IRQN(CAVS_INTC_NODE(0)): + dev_cavs = device_get_binding(DT_LABEL(CAVS_INTC_NODE(0))); break; - case DT_CAVS_ICTL_1_IRQ: - dev_cavs = device_get_binding(CONFIG_CAVS_ICTL_1_NAME); + case DT_IRQN(CAVS_INTC_NODE(1)): + dev_cavs = device_get_binding(DT_LABEL(CAVS_INTC_NODE(1))); break; - case DT_CAVS_ICTL_2_IRQ: - dev_cavs = device_get_binding(CONFIG_CAVS_ICTL_2_NAME); + case DT_IRQN(CAVS_INTC_NODE(2)): + dev_cavs = device_get_binding(DT_LABEL(CAVS_INTC_NODE(2))); break; - case DT_CAVS_ICTL_3_IRQ: - dev_cavs = device_get_binding(CONFIG_CAVS_ICTL_3_NAME); + case DT_IRQN(CAVS_INTC_NODE(3)): + dev_cavs = device_get_binding(DT_LABEL(CAVS_INTC_NODE(3))); break; default: /* regular interrupt */ @@ -83,17 +85,17 @@ void z_soc_irq_disable(u32_t irq) struct device *dev_cavs, *dev_ictl; switch (XTENSA_IRQ_NUMBER(irq)) { - case DT_CAVS_ICTL_0_IRQ: - dev_cavs = device_get_binding(CONFIG_CAVS_ICTL_0_NAME); + case DT_IRQN(CAVS_INTC_NODE(0)): + dev_cavs = device_get_binding(DT_LABEL(CAVS_INTC_NODE(0))); break; - case DT_CAVS_ICTL_1_IRQ: - dev_cavs = device_get_binding(CONFIG_CAVS_ICTL_1_NAME); + case DT_IRQN(CAVS_INTC_NODE(1)): + dev_cavs = device_get_binding(DT_LABEL(CAVS_INTC_NODE(1))); break; - case DT_CAVS_ICTL_2_IRQ: - dev_cavs = device_get_binding(CONFIG_CAVS_ICTL_2_NAME); + case DT_IRQN(CAVS_INTC_NODE(2)): + dev_cavs = device_get_binding(DT_LABEL(CAVS_INTC_NODE(2))); break; - case DT_CAVS_ICTL_3_IRQ: - dev_cavs = device_get_binding(CONFIG_CAVS_ICTL_3_NAME); + case DT_IRQN(CAVS_INTC_NODE(3)): + dev_cavs = device_get_binding(DT_LABEL(CAVS_INTC_NODE(3))); break; default: /* regular interrupt */ @@ -153,17 +155,17 @@ int z_soc_irq_is_enabled(unsigned int irq) int ret = -EINVAL; switch (XTENSA_IRQ_NUMBER(irq)) { - case DT_CAVS_ICTL_0_IRQ: - dev_cavs = device_get_binding(CONFIG_CAVS_ICTL_0_NAME); + case DT_IRQN(CAVS_INTC_NODE(0)): + dev_cavs = device_get_binding(DT_LABEL(CAVS_INTC_NODE(0))); break; - case DT_CAVS_ICTL_1_IRQ: - dev_cavs = device_get_binding(CONFIG_CAVS_ICTL_1_NAME); + case DT_IRQN(CAVS_INTC_NODE(1)): + dev_cavs = device_get_binding(DT_LABEL(CAVS_INTC_NODE(1))); break; - case DT_CAVS_ICTL_2_IRQ: - dev_cavs = device_get_binding(CONFIG_CAVS_ICTL_2_NAME); + case DT_IRQN(CAVS_INTC_NODE(2)): + dev_cavs = device_get_binding(DT_LABEL(CAVS_INTC_NODE(2))); break; - case DT_CAVS_ICTL_3_IRQ: - dev_cavs = device_get_binding(CONFIG_CAVS_ICTL_3_NAME); + case DT_IRQN(CAVS_INTC_NODE(3)): + dev_cavs = device_get_binding(DT_LABEL(CAVS_INTC_NODE(3))); break; default: /* regular interrupt */