soc: enable secure mode for LPC55xxx
Devices that are SECURE enabled may require sometimes to enable secure bits on CMSE register. Signed-off-by: Andrei Gansari <andrei.gansari@nxp.com>
This commit is contained in:
parent
38c57c9c15
commit
487dc7cb94
1 changed files with 1 additions and 0 deletions
|
@ -14,6 +14,7 @@ config SOC_LPC55S69_CPU0
|
||||||
select CPU_HAS_ARM_MPU
|
select CPU_HAS_ARM_MPU
|
||||||
select CPU_HAS_FPU
|
select CPU_HAS_FPU
|
||||||
select ARMV8_M_DSP
|
select ARMV8_M_DSP
|
||||||
|
select ARM_SECURE_FIRMWARE
|
||||||
|
|
||||||
config SOC_LPC55S69_CPU1
|
config SOC_LPC55S69_CPU1
|
||||||
bool "SOC_LPC55S69 M33 [CPU 1]"
|
bool "SOC_LPC55S69 M33 [CPU 1]"
|
||||||
|
|
Loading…
Add table
Add a link
Reference in a new issue