aarch64: error: Handle software-generated fatal exceptions

Introduce a new SVC call ID to trigger software-generated CPU
exceptions.

Signed-off-by: Carlo Caione <ccaione@baylibre.com>

arch/arm/core/aarch64/fatal.c

@@ -9,7 +9,8 @@
  * @brief Kernel fatal error handler for ARM64 Cortex-A
  *
  * This module provides the z_arm64_fatal_error() routine for ARM64 Cortex-A
- * CPUs
+ * CPUs and z_arm64_do_kernel_oops() routine to manage software-generated fatal
+ * exceptions
  */
 
 #include <kernel.h>
@@ -222,3 +223,17 @@ void z_arm64_fatal_error(unsigned int reason, z_arch_esf_t *esf)
 
 	CODE_UNREACHABLE;
 }
+
+/**
+ * @brief Handle a software-generated fatal exception
+ * (e.g. kernel oops, panic, etc.).
+ *
+ * @param esf exception frame
+ */
+void z_arm64_do_kernel_oops(z_arch_esf_t *esf)
+{
+	/* x8 holds the exception reason */
+	unsigned int reason = esf->x8;
+
+	z_arm64_fatal_error(reason, esf);
+}

arch/arm/core/aarch64/switch.S

@@ -100,9 +100,13 @@ SECTION_FUNC(TEXT, z_arm64_sync_exc)
 
 	/* Demux the SVC call */
 	and	x1, x0, #0xff
+
 	cmp	x1, #_SVC_CALL_CONTEXT_SWITCH
 	beq	context_switch
 
+	cmp	x1, #_SVC_CALL_RUNTIME_EXCEPT
+	beq	oops
+
 #ifdef CONFIG_IRQ_OFFLOAD
 	cmp	x1, #_SVC_CALL_IRQ_OFFLOAD
 	beq	offload
@@ -119,6 +123,10 @@ offload:
 #endif
 	b	inv
 
+oops:
+	mov	x0, sp
+	b	z_arm64_do_kernel_oops
+
 context_switch:
 	/*
 	 * Retrieve x0 and x1 from the stack:

include/arch/arm/aarch64/arch.h

@@ -28,6 +28,7 @@
 #include <arch/arm/aarch64/macro.inc>
 #include <arch/arm/aarch64/sys_io.h>
 #include <arch/arm/aarch64/timer.h>
+#include <arch/arm/aarch64/error.h>
 #include <arch/common/addr_types.h>
 #include <arch/common/sys_bitops.h>
 #include <arch/common/ffs.h>

include/arch/arm/aarch64/error.h

@@ -0,0 +1,40 @@
+/*
+ * Copyright (c) 2020 Carlo Caione <ccaione@baylibre.com>
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+
+/**
+ * @file
+ * @brief ARM AArch64 public error handling
+ *
+ * ARM AArch64-specific kernel error handling interface. Included by arch.h.
+ */
+
+#ifndef ZEPHYR_INCLUDE_ARCH_ARM_AARCH64_ERROR_H_
+#define ZEPHYR_INCLUDE_ARCH_ARM_AARCH64_ERROR_H_
+
+#include <arch/arm/aarch64/syscall.h>
+#include <arch/arm/aarch64/exc.h>
+#include <stdbool.h>
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#define ARCH_EXCEPT(reason_p)						\
+do {									\
+	register uint64_t x8 __asm__("x8") = reason_p;			\
+									\
+	__asm__ volatile("svc %[id]\n"					\
+			 :						\
+			 : [id] "i" (_SVC_CALL_RUNTIME_EXCEPT),		\
+				"r" (x8)				\
+			 : "memory");					\
+} while (false)
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* ZEPHYR_INCLUDE_ARCH_ARM_AARCH64_ERROR_H_ */

include/arch/arm/aarch64/syscall.h

@@ -18,5 +18,6 @@
 
 #define _SVC_CALL_CONTEXT_SWITCH	0
 #define _SVC_CALL_IRQ_OFFLOAD		1
+#define _SVC_CALL_RUNTIME_EXCEPT	2
 
 #endif /* ZEPHYR_INCLUDE_ARCH_ARM_AARCH64_SYSCALL_H_ */