tests/drivers/clock_control: stm32h7: Move tests under stm32h7_core

Before introducing a new test for peripheral clocks,
rename existing stm32h7 test section by stm32h7_core.

Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
This commit is contained in:
Erwan Gouriou 2022-01-13 15:40:22 +01:00 committed by Maureen Helm
commit 47d553d089
12 changed files with 8 additions and 8 deletions

View file

@ -3,7 +3,7 @@
cmake_minimum_required(VERSION 3.20.0) cmake_minimum_required(VERSION 3.20.0)
find_package(Zephyr REQUIRED HINTS $ENV{ZEPHYR_BASE}) find_package(Zephyr REQUIRED HINTS $ENV{ZEPHYR_BASE})
project(stm32_clock_configuration_h7) project(stm32_clock_configuration_h7_core)
FILE(GLOB app_sources src/*.c) FILE(GLOB app_sources src/*.c)
target_sources(app PRIVATE ${app_sources}) target_sources(app PRIVATE ${app_sources})

View file

@ -2,18 +2,18 @@ common:
timeout: 5 timeout: 5
platform_allow: nucleo_h723zg platform_allow: nucleo_h723zg
tests: tests:
drivers.stm32_clock_configuration.h7.sysclksrc_pll_hse_96: drivers.stm32_clock_configuration.h7_core.sysclksrc_pll_hse_96:
extra_args: DTC_OVERLAY_FILE="boards/clear_clocks.overlay;boards/pll_hse_96.overlay" extra_args: DTC_OVERLAY_FILE="boards/clear_clocks.overlay;boards/pll_hse_96.overlay"
drivers.stm32_clock_configuration.h7.sysclksrc_pll_hsi_96: drivers.stm32_clock_configuration.h7_core.sysclksrc_pll_hsi_96:
extra_args: DTC_OVERLAY_FILE="boards/clear_clocks.overlay;boards/pll_hsi_96.overlay" extra_args: DTC_OVERLAY_FILE="boards/clear_clocks.overlay;boards/pll_hsi_96.overlay"
drivers.stm32_clock_configuration.h7.sysclksrc_hsi_64: drivers.stm32_clock_configuration.h7_core.sysclksrc_hsi_64:
extra_args: DTC_OVERLAY_FILE="boards/clear_clocks.overlay;boards/hsi_64.overlay" extra_args: DTC_OVERLAY_FILE="boards/clear_clocks.overlay;boards/hsi_64.overlay"
drivers.stm32_clock_configuration.h7.sysclksrc_csi_4: drivers.stm32_clock_configuration.h7_core.sysclksrc_csi_4:
extra_args: DTC_OVERLAY_FILE="boards/clear_clocks.overlay;boards/csi_4.overlay" extra_args: DTC_OVERLAY_FILE="boards/clear_clocks.overlay;boards/csi_4.overlay"
drivers.stm32_clock_configuration.h7.sysclksrc_hse_8: drivers.stm32_clock_configuration.h7_core.sysclksrc_hse_8:
extra_args: DTC_OVERLAY_FILE="boards/clear_clocks.overlay;boards/hse_8.overlay" extra_args: DTC_OVERLAY_FILE="boards/clear_clocks.overlay;boards/hse_8.overlay"
drivers.stm32_clock_configuration.h7.sysclksrc_pll_csi_96: drivers.stm32_clock_configuration.h7_core.sysclksrc_pll_csi_96:
extra_args: DTC_OVERLAY_FILE="boards/clear_clocks.overlay;boards/pll_csi_96.overlay" extra_args: DTC_OVERLAY_FILE="boards/clear_clocks.overlay;boards/pll_csi_96.overlay"
drivers.stm32_clock_configuration.h7.sysclksrc_pll_hse_550: drivers.stm32_clock_configuration.h7_core.sysclksrc_pll_hse_550:
extra_args: DTC_OVERLAY_FILE="boards/clear_clocks.overlay;boards/pll_hse_550.overlay" extra_args: DTC_OVERLAY_FILE="boards/clear_clocks.overlay;boards/pll_hse_550.overlay"
platform_allow: nucleo_h723zg stm32h735g_disco platform_allow: nucleo_h723zg stm32h735g_disco