From 47c747e954e74e2bdc1e2f9b50a13991a23ec47c Mon Sep 17 00:00:00 2001 From: Daniel Wagenknecht Date: Mon, 18 Dec 2017 11:33:48 +0100 Subject: [PATCH] drivers: serial: simplify STM32 UART clock initialization STM32 UART driver uses a macro for clock initialization, that is difficult to read and incompatible with needed changes to fix STM32F0 series UART problems. This change switches to using the full clock bus names in UART init functions removing the macro-magic and increasing readability. Signed-off-by: Daniel Wagenknecht --- drivers/serial/uart_stm32.c | 30 +++++++++++++++--------------- 1 file changed, 15 insertions(+), 15 deletions(-) diff --git a/drivers/serial/uart_stm32.c b/drivers/serial/uart_stm32.c index 7342893e495..9c4345ef63b 100644 --- a/drivers/serial/uart_stm32.c +++ b/drivers/serial/uart_stm32.c @@ -312,9 +312,9 @@ static int uart_stm32_init(struct device *dev) } /* Define clocks */ - #define STM32_CLOCK_UART(type, apb, n) \ - .pclken = { .bus = STM32_CLOCK_BUS_ ## apb, \ - .enr = LL_##apb##_GRP1_PERIPH_##type##n } + #define STM32_CLOCK_UART(clock_bus, clock_enr) \ + .pclken = { .bus = clock_bus, \ + .enr = clock_enr } #ifdef CONFIG_UART_INTERRUPT_DRIVEN #define STM32_UART_IRQ_HANDLER_DECL(n) \ @@ -336,7 +336,7 @@ static void uart_stm32_irq_config_func_##n(struct device *dev) \ #define STM32_UART_IRQ_HANDLER(n) #endif -#define UART_DEVICE_INIT_STM32(type, n, apb) \ +#define UART_DEVICE_INIT_STM32(n, clock_bus, clock_enr) \ STM32_UART_IRQ_HANDLER_DECL(n); \ \ static const struct uart_stm32_config uart_stm32_dev_cfg_##n = { \ @@ -344,7 +344,7 @@ static const struct uart_stm32_config uart_stm32_dev_cfg_##n = { \ .base = (u8_t *)CONFIG_UART_STM32_PORT_ ## n ## _BASE_ADDRESS, \ STM32_UART_IRQ_HANDLER_FUNC(n) \ }, \ - STM32_CLOCK_UART(type, apb, n), \ + STM32_CLOCK_UART(clock_bus, clock_enr), \ }; \ \ static struct uart_stm32_data uart_stm32_dev_data_##n = { \ @@ -364,41 +364,41 @@ DEVICE_AND_API_INIT(uart_stm32_##n, CONFIG_UART_STM32_PORT_##n##_NAME, \ STM32_UART_IRQ_HANDLER(n) #ifdef CONFIG_UART_STM32_PORT_1 -UART_DEVICE_INIT_STM32(USART, 1, APB2) +UART_DEVICE_INIT_STM32(1, STM32_CLOCK_BUS_APB2, LL_APB2_GRP1_PERIPH_USART1) #endif /* CONFIG_UART_STM32_PORT_1 */ #ifdef CONFIG_UART_STM32_PORT_2 -UART_DEVICE_INIT_STM32(USART, 2, APB1) +UART_DEVICE_INIT_STM32(2, STM32_CLOCK_BUS_APB1, LL_APB1_GRP1_PERIPH_USART2) #endif /* CONFIG_UART_STM32_PORT_2 */ #ifdef CONFIG_UART_STM32_PORT_3 -UART_DEVICE_INIT_STM32(USART, 3, APB1) +UART_DEVICE_INIT_STM32(3, STM32_CLOCK_BUS_APB1, LL_APB1_GRP1_PERIPH_USART3) #endif /* CONFIG_UART_STM32_PORT_3 */ #ifdef CONFIG_UART_STM32_PORT_4 -UART_DEVICE_INIT_STM32(UART, 4, APB1) +UART_DEVICE_INIT_STM32(4, STM32_CLOCK_BUS_APB1, LL_APB1_GRP1_PERIPH_UART4) #endif /* CONFIG_UART_STM32_PORT_4 */ #ifdef CONFIG_UART_STM32_PORT_5 -UART_DEVICE_INIT_STM32(UART, 5, APB1) +UART_DEVICE_INIT_STM32(5, STM32_CLOCK_BUS_APB1, LL_APB1_GRP1_PERIPH_UART5) #endif /* CONFIG_UART_STM32_PORT_5 */ #ifdef CONFIG_UART_STM32_PORT_6 -UART_DEVICE_INIT_STM32(USART, 6, APB2) +UART_DEVICE_INIT_STM32(6, STM32_CLOCK_BUS_APB2, LL_APB2_GRP1_PERIPH_UART6) #endif /* CONFIG_UART_STM32_PORT_6 */ #ifdef CONFIG_UART_STM32_PORT_7 -UART_DEVICE_INIT_STM32(UART, 7, APB1) +UART_DEVICE_INIT_STM32(7, STM32_CLOCK_BUS_APB1, LL_APB1_GRP1_PERIPH_UART7) #endif /* CONFIG_UART_STM32_PORT_7 */ #ifdef CONFIG_UART_STM32_PORT_8 -UART_DEVICE_INIT_STM32(UART, 8, APB1) +UART_DEVICE_INIT_STM32(8, STM32_CLOCK_BUS_APB1, LL_APB1_GRP1_PERIPH_UART8) #endif /* CONFIG_UART_STM32_PORT_8 */ #ifdef CONFIG_UART_STM32_PORT_9 -UART_DEVICE_INIT_STM32(UART, 9, APB2) +UART_DEVICE_INIT_STM32(9, STM32_CLOCK_BUS_APB2, LL_APB2_GRP1_PERIPH_UART9) #endif /* CONFIG_UART_STM32_PORT_9 */ #ifdef CONFIG_UART_STM32_PORT_10 -UART_DEVICE_INIT_STM32(UART, 10, APB2) +UART_DEVICE_INIT_STM32(10, STM32_CLOCK_BUS_APB2, LL_APB2_GRP1_PERIPH_UART10) #endif /* CONFIG_UART_STM32_PORT_10 */