diff --git a/boards/arm/mimxrt1064_evk/doc/index.rst b/boards/arm/mimxrt1064_evk/doc/index.rst index 8221aace6ce..2785b10370b 100644 --- a/boards/arm/mimxrt1064_evk/doc/index.rst +++ b/boards/arm/mimxrt1064_evk/doc/index.rst @@ -114,6 +114,8 @@ features: | UART | on-chip | serial port-polling; | | | | serial port-interrupt | +-----------+------------+-------------------------------------+ +| ADC | on-chip | adc | ++-----------+------------+-------------------------------------+ | ENET | on-chip | ethernet | +-----------+------------+-------------------------------------+ | USB | on-chip | USB device | @@ -263,6 +265,10 @@ The MIMXRT1064 SoC has four pairs of pinmux/gpio controllers. +---------------+-----------------+---------------------------+ | GPIO_SD_B1_11 | FLEXSPIA_DATA03 | QSPI Flash | +---------------+-----------------+---------------------------+ +| GPIO_AD_B1_11 | ADC | ADC1 Channel 0 | ++---------------+-----------------+---------------------------+ +| GPIO_AD_B1_10 | ADC | ADC1 Channel 1 | ++---------------+-----------------+---------------------------+ .. note:: In order to use the SPI peripheral on this board, resistors R278, R279, diff --git a/boards/arm/mimxrt1064_evk/mimxrt1064_evk.dts b/boards/arm/mimxrt1064_evk/mimxrt1064_evk.dts index 898c5d01e0c..0338d503d74 100644 --- a/boards/arm/mimxrt1064_evk/mimxrt1064_evk.dts +++ b/boards/arm/mimxrt1064_evk/mimxrt1064_evk.dts @@ -255,3 +255,7 @@ zephyr_udc0: &usb1 { &lpspi3 { status = "okay"; }; + +&adc1 { + status = "okay"; +}; diff --git a/boards/arm/mimxrt1064_evk/mimxrt1064_evk.yaml b/boards/arm/mimxrt1064_evk/mimxrt1064_evk.yaml index 463badbb943..a46dfe6b28f 100644 --- a/boards/arm/mimxrt1064_evk/mimxrt1064_evk.yaml +++ b/boards/arm/mimxrt1064_evk/mimxrt1064_evk.yaml @@ -32,3 +32,4 @@ supported: - kscan:touch - can - watchdog + - adc diff --git a/boards/arm/mimxrt1064_evk/pinmux.c b/boards/arm/mimxrt1064_evk/pinmux.c index 410e7650e80..48199da85ab 100644 --- a/boards/arm/mimxrt1064_evk/pinmux.c +++ b/boards/arm/mimxrt1064_evk/pinmux.c @@ -395,6 +395,20 @@ static int mimxrt1064_evk_init(const struct device *dev) IOMUXC_SW_PAD_CTL_PAD_PKE_MASK | IOMUXC_SW_PAD_CTL_PAD_SPEED(2) | IOMUXC_SW_PAD_CTL_PAD_DSE(6)); + +#endif + +#if DT_NODE_HAS_STATUS(DT_NODELABEL(adc1), okay) && CONFIG_ADC + /* ADC1 Input 0 */ + IOMUXC_SetPinMux(IOMUXC_GPIO_AD_B1_11_GPIO1_IO27, 0U); + IOMUXC_SetPinConfig(IOMUXC_GPIO_AD_B1_11_GPIO1_IO27, + IOMUXC_SW_PAD_CTL_PAD_SPEED(2) | + IOMUXC_SW_PAD_CTL_PAD_DSE(6)); + /* ADC1 Input 15 */ + IOMUXC_SetPinMux(IOMUXC_GPIO_AD_B1_10_GPIO1_IO26, 0U); + IOMUXC_SetPinConfig(IOMUXC_GPIO_AD_B1_10_GPIO1_IO26, + IOMUXC_SW_PAD_CTL_PAD_SPEED(2) | + IOMUXC_SW_PAD_CTL_PAD_DSE(6)); #endif return 0; diff --git a/samples/drivers/adc/boards/mimxrt1064_evk.overlay b/samples/drivers/adc/boards/mimxrt1064_evk.overlay new file mode 100644 index 00000000000..48d7283dfe7 --- /dev/null +++ b/samples/drivers/adc/boards/mimxrt1064_evk.overlay @@ -0,0 +1,12 @@ +/* + * SPDX-License-Identifier: Apache-2.0 + * + * Copyright (c) 2021 NXP + */ + +/ { + zephyr,user { + /* adjust channel number according to pinmux in board.dts */ + io-channels = <&adc1 0>; + }; +}; diff --git a/tests/drivers/adc/adc_api/src/test_adc.c b/tests/drivers/adc/adc_api/src/test_adc.c index 271e4d0ada5..ab7eeb25f49 100644 --- a/tests/drivers/adc/adc_api/src/test_adc.c +++ b/tests/drivers/adc/adc_api/src/test_adc.c @@ -296,7 +296,8 @@ #define ADC_2ND_CHANNEL_ID 1 #elif defined(CONFIG_BOARD_MIMXRT1050_EVK) || \ - defined(CONFIG_BOARD_MIMXRT1050_EVK_QSPI) + defined(CONFIG_BOARD_MIMXRT1050_EVK_QSPI) || \ + defined(CONFIG_BOARD_MIMXRT1064_EVK) #define ADC_DEVICE_NAME DT_LABEL(DT_INST(0, nxp_mcux_12b1msps_sar)) #define ADC_RESOLUTION 12 #define ADC_GAIN ADC_GAIN_1