tests: application_development: add code_relocation test

add code relocation test case
1. customer relocation code and data test
2. memcpy relocation

Signed-off-by: Hake Huang <hake.huang@oss.nxp.com>
This commit is contained in:
Hake Huang 2022-07-14 14:48:27 +08:00 committed by Fabio Baltieri
commit 45daf3b448
11 changed files with 331 additions and 0 deletions

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# SPDX-License-Identifier: Apache-2.0
cmake_minimum_required(VERSION 3.20.0)
find_package(Zephyr REQUIRED HINTS $ENV{ZEPHYR_BASE})
project(code_relocation)
FILE(GLOB app_sources src/*.c)
target_sources(app PRIVATE ${app_sources})
# Code relocation feature
zephyr_code_relocate(src/test_file1.c SRAM2)
zephyr_code_relocate(src/test_file2.c SRAM)
zephyr_code_relocate(src/test_file3.c SRAM2_TEXT)
zephyr_code_relocate(src/test_file3.c SRAM_DATA)
zephyr_code_relocate(src/test_file3.c SRAM2_BSS)
zephyr_code_relocate(../../../kernel/sem.c SRAM)
if (CONFIG_RELOCATE_TO_ITCM)
zephyr_code_relocate(../../../lib/libc/minimal/source/string/string.c ITCM_TEXT)
endif()
zephyr_linker_sources(SECTIONS custom-sections.ld)

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# Copyright (c) 2022, NXP
# SPDX-License-Identifier: Apache-2.0
config RELOCATE_TO_ITCM
bool "test with code relocate to itcm"
default y
source "Kconfig.zephyr"

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.. _code_relocation:
Code relocation
#################
Overview
********
A simple example that demonstrates how relocation of code, data or bss sections
using a custom linker script.

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/* SPDX-License-Identifier: Apache-2.0 */
SECTION_DATA_PROLOGUE(_CUSTOM_SECTION_NAME2,,)
{
. = ALIGN(4);
__custom_section_start = .;
KEEP(*(".custom_section.*"));
__custom_section_end = ALIGN(4);
} GROUP_DATA_LINK_IN(RAMABLE_REGION, ROMABLE_REGION)

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/*
* Copyright (c) 2013-2014 Wind River Systems, Inc.
*
* SPDX-License-Identifier: Apache-2.0
*/
/**
* @file
* @brief Linker command/script file
*
* Linker script for the Cortex-M platforms.
*/
#include <zephyr/linker/sections.h>
#include <zephyr/devicetree.h>
#include <zephyr/linker/linker-defs.h>
#include <zephyr/linker/linker-tool.h>
/** enable CONFIG_SRAM2 or any other partition in soc Kconfig,
* this is just an example to show relocation of code/data/bss script
*/
#if defined CONFIG_ARM
#define CONFIG_SRAM2 1
#define _SRAM2_DATA_SECTION_NAME .sram2_data
#define _SRAM2_BSS_SECTION_NAME .sram2_bss
#define _SRAM2_TEXT_SECTION_NAME .sram2_text
#define SRAM2_ADDR (CONFIG_SRAM_BASE_ADDRESS + RAM_SIZE2)
#endif
#define RAM_SIZE2 (CONFIG_SRAM_SIZE * 512)
MEMORY
{
#ifdef CONFIG_SRAM2
SRAM2 (wx) : ORIGIN = (CONFIG_SRAM_BASE_ADDRESS + RAM_SIZE2), LENGTH = RAM_SIZE2
#endif
}
#include <zephyr/arch/arm/aarch32/cortex_m/scripts/linker.ld>

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CONFIG_CODE_DATA_RELOCATION=y
CONFIG_COVERAGE=n
CONFIG_ZTEST=y
CONFIG_ZTEST_NEW_API=y
CONFIG_HAVE_CUSTOM_LINKER_SCRIPT=y
CONFIG_CUSTOM_LINKER_SCRIPT="linker_arm_sram2.ld"

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/*
* Copyright (c) 2018 Intel Corporation.
* Copyright (c) 2022, NXP
*
* SPDX-License-Identifier: Apache-2.0
*/
#include <zephyr/kernel.h>
#include <zephyr/sys/printk.h>
#include <ztest.h>
/* This function will allow execute from sram region.
* This is needed only for this sample because by default all soc will
* disable the execute from SRAM.
* An application that requires that the code be executed from SRAM will
* have to configure the region appropriately in arm_mpu_regions.c.
*/
#if (defined(CONFIG_ARM_MPU) && !defined(CONFIG_CPU_HAS_NXP_MPU))
#include <zephyr/arch/arm/aarch32/cortex_m/cmsis.h>
void disable_mpu_rasr_xn(void)
{
uint32_t index;
/* Kept the max index as 8(irrespective of soc) because the sram
* would most likely be set at index 2.
*/
for (index = 0U; index < 8; index++) {
MPU->RNR = index;
#if defined(CONFIG_ARMV8_M_BASELINE) || defined(CONFIG_ARMV8_M_MAINLINE)
if (MPU->RBAR & MPU_RBAR_XN_Msk) {
MPU->RBAR ^= MPU_RBAR_XN_Msk;
}
#else
if (MPU->RASR & MPU_RASR_XN_Msk) {
MPU->RASR ^= MPU_RASR_XN_Msk;
}
#endif /* CONFIG_ARMV8_M_BASELINE || CONFIG_ARMV8_M_MAINLINE */
}
}
#endif /* CONFIG_ARM_MPU */
/* override the default memcpy as zephyr will call this before relocation happens */
__boot_func
void z_early_memcpy(void *dst, const void *src, size_t n)
{
/* attempt word-sized copying only if buffers have identical alignment */
unsigned char *d_byte = (unsigned char *)dst;
const unsigned char *s_byte = (const unsigned char *)src;
/* do byte-sized copying until finished */
while (n > 0) {
*(d_byte++) = *(s_byte++);
n--;
}
return (void)dst;
}
__boot_func
void z_early_memset(void *dst, int c, size_t n)
{
/* do byte-sized initialization until word-aligned or finished */
unsigned char *d_byte = (unsigned char *)dst;
unsigned char c_byte = (unsigned char)c;
while (n > 0) {
*(d_byte++) = c_byte;
n--;
}
return (void)dst;
}
void *relocate_code_setup(void)
{
#if (defined(CONFIG_ARM_MPU) && !defined(CONFIG_CPU_HAS_NXP_MPU))
disable_mpu_rasr_xn();
#endif /* CONFIG_ARM_MPU */
return NULL;
}
ZTEST_SUITE(code_relocation, NULL, relocate_code_setup, NULL, NULL, NULL);

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/*
* Copyright (c) 2012-2014 Wind River Systems, Inc.
*
* SPDX-License-Identifier: Apache-2.0
*/
#include <zephyr/zephyr.h>
#include <zephyr/sys/printk.h>
#include <ztest.h>
uint32_t var_sram2_data = 10U;
uint32_t var_sram2_bss;
K_SEM_DEFINE(test, 0, 1);
const uint32_t var_sram2_rodata = 100U;
__in_section(custom_section, static, var) uint32_t var_custom_data = 1U;
extern void function_in_sram(int32_t value);
void function_in_custom_section(void);
ZTEST(code_relocation, test_function_in_sram2)
{
extern uint32_t __sram2_text_start;
extern uint32_t __sram2_text_end;
extern uint32_t __sram2_data_start;
extern uint32_t __sram2_data_end;
extern uint32_t __sram2_bss_start;
extern uint32_t __sram2_bss_end;
extern uint32_t __sram2_rodata_start;
extern uint32_t __sram2_rodata_end;
extern uint32_t __custom_section_start;
extern uint32_t __custom_section_end;
/* Print values from sram2 */
printk("Address of var_sram2_data %p\n", &var_sram2_data);
printk("Address of k_sem_give %p\n", &k_sem_give);
printk("Address of var_sram2_rodata %p\n", &var_sram2_rodata);
printk("Address of var_sram2_bss %p\n\n", &var_sram2_bss);
zassert_between_inclusive((uint32_t)&var_sram2_data,
(uint32_t)&__sram2_data_start,
(uint32_t)&__sram2_data_end,
"var_sram2_data not in sram2 region");
zassert_between_inclusive((uint32_t)&k_sem_give,
(uint32_t)&__sram2_text_start,
(uint32_t)&__sram2_text_end,
"k_sem_give not in sram_text region");
zassert_between_inclusive((uint32_t)&var_sram2_rodata,
(uint32_t)&__sram2_rodata_start,
(uint32_t)&__sram2_rodata_end,
"var_sram2_rodata not in sram2_rodata region");
zassert_between_inclusive((uint32_t)&var_sram2_bss,
(uint32_t)&__sram2_bss_start,
(uint32_t)&__sram2_bss_end,
"var_sram2_bss not in sram2_bss region");
/* Print values from sram */
function_in_sram(var_sram2_data);
/* Print values which were placed using attributes */
printk("Address of custom_section, func placed using attributes %p\n",
&function_in_custom_section);
printk("Address of custom_section data placed using attributes %p\n\n",
&var_custom_data);
zassert_between_inclusive((uint32_t)&function_in_custom_section,
(uint32_t)&__custom_section_start,
(uint32_t)&__custom_section_end,
"function_in_custom_section not in custom_section region");
zassert_between_inclusive((uint32_t)&var_custom_data,
(uint32_t)&__custom_section_start,
(uint32_t)&__custom_section_end,
"var_custom_data not in custom_section region");
k_sem_give(&test);
}
__in_section(custom_section, static, fun) void function_in_custom_section(void)
{
}

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/*
* Copyright (c) 2012-2014 Wind River Systems, Inc.
* Copyright (c) 2022, NXP
*
* SPDX-License-Identifier: Apache-2.0
*/
#include <zephyr/zephyr.h>
#include <zephyr/sys/printk.h>
#include <ztest.h>
void function_in_sram(int32_t value)
{
char src[8] = "data\n";
char dst[8];
printk("Hello World! %s\n", CONFIG_BOARD);
memcpy(dst, src, 8);
printk("Address of memcpy %p\n", &memcpy);
zassert_mem_equal(src, dst, 8, "memcpy compare error");
}

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/*
* Copyright (c) 2012-2014 Wind River Systems, Inc.
*
* SPDX-License-Identifier: Apache-2.0
*/
#include <zephyr/zephyr.h>
#include <zephyr/sys/printk.h>
#include <ztest.h>
uint32_t var_file3_sram_data = 10U;
uint32_t var_file3_sram2_bss;
ZTEST(code_relocation, test_function_in_split_multiple)
{
extern uint32_t __data_start;
extern uint32_t __data_end;
extern uint32_t __sram2_bss_start;
extern uint32_t __sram2_bss_end;
printk("Address of var_file3_sram_data %p\n", &var_file3_sram_data);
printk("Address of var_file3_sram2_bss %p\n\n", &var_file3_sram2_bss);
zassert_between_inclusive((uint32_t)&var_file3_sram_data,
(uint32_t)&__data_start,
(uint32_t)&__data_end,
"var_file3_sram_data not in sram_data region");
zassert_between_inclusive((uint32_t)&var_file3_sram2_bss,
(uint32_t)&__sram2_bss_start,
(uint32_t)&__sram2_bss_end,
"var_file3_sram2_bss not in sram2_bss region");
}

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common:
arch_allow: arm
tags: linker
tests:
tests.application_development.code_relocation:
filter: not CONFIG_CPU_HAS_NXP_MPU and CONFIG_MINIMAL_LIBC and dt_chosen_enabled("zephyr,itcm")
extra_configs:
- CONFIG_RELOCATE_TO_ITCM=y
tests.application_development.code_relocation_kinetis:
filter: CONFIG_CPU_HAS_NXP_MPU and CONFIG_MINIMAL_LIBC and dt_chosen_enabled("zephyr,itcm")
extra_configs:
- CONFIG_RELOCATE_TO_ITCM=y
- CONFIG_MPU_ALLOW_FLASH_WRITE=y
tests.application_development.code_relocation.no_itcm:
filter: not CONFIG_CPU_HAS_NXP_MPU and not dt_chosen_enabled("zephyr,itcm")
extra_configs:
- CONFIG_RELOCATE_TO_ITCM=n
extra_sections: _SRAM2_RODATA_SECTION_NAME _SRAM_TEXT_SECTION_NAME _SRAM_RODATA_SECTION_NAME _SRAM_DATA_SECTION_NAME _CUSTOM_SECTION_NAME2
platform_allow: qemu_cortex_m3 mps2_an385 sam_e70_xplained