From 45d4909024abb3dd3e78b2123977c7cdc5476103 Mon Sep 17 00:00:00 2001 From: Henrik Brix Andersen Date: Wed, 20 Apr 2022 15:14:58 +0200 Subject: [PATCH] drivers: can: stm32fd: rename CONFIG_CAN_STM32_CLOCK_DIVISOR Rename CONFIG_CAN_STM32_CLOCK_DIVISOR to CONFIG_CAN_STM32FD_CLOCK_DIVISOR to match driver Kconfig name. Signed-off-by: Henrik Brix Andersen --- drivers/can/Kconfig.stm32fd | 5 +++-- drivers/can/can_stm32fd.c | 17 +++++++++++------ 2 files changed, 14 insertions(+), 8 deletions(-) diff --git a/drivers/can/Kconfig.stm32fd b/drivers/can/Kconfig.stm32fd index 2c5bf876b4e..fd1144f8d70 100644 --- a/drivers/can/Kconfig.stm32fd +++ b/drivers/can/Kconfig.stm32fd @@ -52,8 +52,9 @@ config CAN_STM32FD_CLOCK_SOURCE_PCLK1 endchoice -config CAN_STM32_CLOCK_DIVISOR +config CAN_STM32FD_CLOCK_DIVISOR int "CAN clock divisor" + depends on CAN_STM32FD_CLOCK_SOURCE_PCLK1 range 1 30 default 1 help @@ -62,4 +63,4 @@ config CAN_STM32_CLOCK_DIVISOR Note that the the divisor affects all CAN controllers. Allowed values: 1 or 2 * n, where n <= 15. -endif #CAN_STM32FD +endif # CAN_STM32FD diff --git a/drivers/can/can_stm32fd.c b/drivers/can/can_stm32fd.c index 8a1b936f068..696fd1a8330 100644 --- a/drivers/can/can_stm32fd.c +++ b/drivers/can/can_stm32fd.c @@ -26,10 +26,15 @@ LOG_MODULE_REGISTER(can_stm32fd, CONFIG_CAN_LOG_LEVEL); #error "Unsupported FDCAN clock source" #endif -#if CONFIG_CAN_STM32_CLOCK_DIVISOR != 1 && CONFIG_CAN_STM32_CLOCK_DIVISOR & 0x01 -#error CAN_STM32_CLOCK_DIVISOR invalid.\ -Allowed values are 1 or 2 * n, where n <= 15 -#endif +#ifdef CONFIG_CAN_STM32FD_CLOCK_DIVISOR +#if CONFIG_CAN_STM32FD_CLOCK_DIVISOR != 1 && CONFIG_CAN_STM32FD_CLOCK_DIVISOR & 0x01 +#error CAN_STM32FD_CLOCK_DIVISOR invalid. Allowed values are 1 or 2 * n, where n <= 15. +#else +#define CAN_STM32FD_CLOCK_DIVISOR CONFIG_CAN_STM32FD_CLOCK_DIVISOR +#endif /* CONFIG_CAN_STM32FD_CLOCK_DIVISOR */ +#else +#define CAN_STM32FD_CLOCK_DIVISOR 1U +#endif /* CONFIG_CAN_STM32FD_CLOCK_DIVISOR*/ #define DT_DRV_COMPAT st_stm32_fdcan @@ -43,7 +48,7 @@ static int can_stm32fd_get_core_clock(const struct device *dev, uint32_t *rate) return -EIO; } - *rate = rate_tmp / CONFIG_CAN_STM32_CLOCK_DIVISOR; + *rate = rate_tmp / CAN_STM32FD_CLOCK_DIVISOR; return 0; } @@ -53,7 +58,7 @@ static void can_stm32fd_clock_enable(void) LL_RCC_SetFDCANClockSource(CAN_STM32FD_CLOCK_SOURCE); __HAL_RCC_FDCAN_CLK_ENABLE(); - FDCAN_CONFIG->CKDIV = CONFIG_CAN_STM32_CLOCK_DIVISOR >> 1; + FDCAN_CONFIG->CKDIV = CAN_STM32FD_CLOCK_DIVISOR >> 1; } static void can_stm32fd_set_state_change_callback(const struct device *dev,