arch: arm: Fix zero interrupt latency priority level
Change the zero latency interrupt priority level from 2 to 1. This is the priority level that the kernel has reserved for the zero latency IRQ feature by the _IRQ_PRIO_OFFSET constant. The zero latency IRQ will now not be masked by the irq_lock function. Update comments to reflect the priority levels reserved by the kernel. Fixes: #8073 Signed-off-by: Joakim Andersson <joakim.andersson@nordicsemi.no>
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3 changed files with 16 additions and 19 deletions
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@ -77,26 +77,25 @@ int _arch_irq_is_enabled(unsigned int irq)
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*
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* The priority is verified if ASSERT_ON is enabled. The maximum number
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* of priority levels is a little complex, as there are some hardware
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* priority levels which are reserved: three for various types of exceptions,
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* and possibly one additional to support zero latency interrupts.
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* priority levels which are reserved.
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*
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* @return N/A
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*/
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void _irq_priority_set(unsigned int irq, unsigned int prio, u32_t flags)
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{
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/* Hardware priority levels 0 and 1 reserved for Kernel use.
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* So we add 2 to the requested priority level. If we support
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* ZLI, 2 is also reserved so we add 3.
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/* The kernel may reserve some of the highest priority levels.
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* So we offset the requested priority level with the number
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* of priority levels reserved by the kernel.
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*/
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#if CONFIG_ZERO_LATENCY_IRQS
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/* If we have zero latency interrupts, that makes priority level 2
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* a case with special semantics; it is not masked by irq_lock().
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/* If we have zero latency interrupts, those interrupts will
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* run at a priority level which is not masked by irq_lock().
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* Our policy is to express priority levels with special properties
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* via flags
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*/
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if (flags & IRQ_ZERO_LATENCY) {
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prio = 2;
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prio = _EXC_ZERO_LATENCY_IRQS_PRIO;
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} else {
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prio += _IRQ_PRIO_OFFSET;
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}
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@ -27,6 +27,7 @@ extern "C" {
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#else
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#include <arch/arm/cortex_m/cmsis.h>
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#include <arch/arm/cortex_m/exc.h>
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#include <irq_offload.h>
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#ifdef CONFIG_IRQ_OFFLOAD
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@ -78,8 +79,6 @@ static ALWAYS_INLINE int _IsInIsr(void)
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;
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}
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#define _EXC_SVC_PRIO 0
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#define _EXC_FAULT_PRIO 0
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/**
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* @brief Setup system exceptions
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*
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@ -21,21 +21,20 @@ extern "C" {
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/* for assembler, only works with constants */
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#define _EXC_PRIO(pri) (((pri) << (8 - CONFIG_NUM_IRQ_PRIO_BITS)) & 0xff)
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#ifdef CONFIG_ZERO_LATENCY_IRQS
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#define _ZERO_LATENCY_IRQS_RESERVED_PRIO 1
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#else
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#define _ZERO_LATENCY_IRQS_RESERVED_PRIO 0
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#endif
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#if defined(CONFIG_CPU_CORTEX_M_HAS_PROGRAMMABLE_FAULT_PRIOS)
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#define _EXCEPTION_RESERVED_PRIO 1
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#else
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#define _EXCEPTION_RESERVED_PRIO 0
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#endif
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#define _IRQ_PRIO_OFFSET \
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(_ZERO_LATENCY_IRQS_RESERVED_PRIO + \
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_EXCEPTION_RESERVED_PRIO)
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#define _EXC_SVC_PRIO 0
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#define _EXC_FAULT_PRIO 0
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#ifdef CONFIG_ZERO_LATENCY_IRQS
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#define _EXC_ZERO_LATENCY_IRQS_PRIO 1
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#define _IRQ_PRIO_OFFSET (_EXCEPTION_RESERVED_PRIO + 1)
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#else
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#define _IRQ_PRIO_OFFSET (_EXCEPTION_RESERVED_PRIO)
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#endif
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#define _EXC_IRQ_DEFAULT_PRIO _EXC_PRIO(_IRQ_PRIO_OFFSET)
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