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Add PCI legacy bridge to Galileo configuration

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Galileo uses PCI legacy bridge to set up the following
PCI interrupt pins to IRQ mapping:
INTA -> IRQ16
INTB -> IRQ17
INTC -> IRQ18
INTD -> IRQ19

Change-Id: I8113ee16c6712f3166340d5eb0f2e0f440a37636
Signed-off-by: Dmitriy Korovkin <dmitriy.korovkin@windriver.com>
This commit is contained in:
Dmitriy Korovkin 2015-09-23 17:03:52 -04:00 • committed by Anas Nashif
commit 45a0e81871
5 changed files with 48 additions and 0 deletions
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1
arch/x86/configs/galileo_defconfig
View file

@ -1,6 +1,7 @@
CONFIG_X86_32=y CONFIG_X86_32=y
CONFIG_PLATFORM_GALILEO=y CONFIG_PLATFORM_GALILEO=y
CONFIG_CPU_MINUTEIA=y CONFIG_CPU_MINUTEIA=y
CONFIG_PCI_LEGACY_BRIDGE=y
CONFIG_CONSOLE=y CONFIG_CONSOLE=y
CONFIG_SERIAL=y CONFIG_SERIAL=y
CONFIG_NS16550=y CONFIG_NS16550=y

1
arch/x86/configs/micro_galileo_defconfig
View file

@ -3,6 +3,7 @@ CONFIG_NANO_TIMERS=y
CONFIG_X86_32=y CONFIG_X86_32=y
CONFIG_PLATFORM_GALILEO=y CONFIG_PLATFORM_GALILEO=y
CONFIG_CPU_MINUTEIA=y CONFIG_CPU_MINUTEIA=y
CONFIG_PCI_LEGACY_BRIDGE=y
CONFIG_CONSOLE=y CONFIG_CONSOLE=y
CONFIG_SERIAL=y CONFIG_SERIAL=y
CONFIG_NS16550=y CONFIG_NS16550=y

1
arch/x86/configs/nano_galileo_defconfig
View file

@ -3,6 +3,7 @@ CONFIG_NANO_TIMERS=y
CONFIG_X86_32=y CONFIG_X86_32=y
CONFIG_PLATFORM_GALILEO=y CONFIG_PLATFORM_GALILEO=y
CONFIG_CPU_MINUTEIA=y CONFIG_CPU_MINUTEIA=y
CONFIG_PCI_LEGACY_BRIDGE=y
CONFIG_CONSOLE=y CONFIG_CONSOLE=y
CONFIG_SERIAL=y CONFIG_SERIAL=y
CONFIG_NS16550=y CONFIG_NS16550=y

11
arch/x86/platforms/galileo/Kconfig
View file

@ -73,6 +73,17 @@ config SHARED_IRQ_0_PRI
default 0 default 0
endif endif
if PCI_LEGACY_BRIDGE
config PCI_LEGACY_BRIDGE_BUS
default 0
config PCI_LEGACY_BRIDGE_DEV
default 31
config PCI_LEGACY_BRIDGE_VENDOR_ID
default 0x8086
config PCI_LEGACY_BRIDGE_DEVICE_ID
default 0x095e
endif
if I2C if I2C
config I2C_CLOCK_SPEED config I2C_CLOCK_SPEED
default 25 default 25

34
arch/x86/platforms/galileo/galileo.c
View file

@ -146,6 +146,40 @@ pre_kernel_early_init(spiirq_1, NULL);
#endif /* CONFIG_IOAPIC */ #endif /* CONFIG_IOAPIC */
#endif /* CONFIG_SHARED_IRQ */ #endif /* CONFIG_SHARED_IRQ */
#ifdef CONFIG_PCI_LEGACY_BRIDGE
/**
*
* @brief Configure PCI interrupt pin to IRQ mapping
*
* The routine detects PCI legacy bridge and if present,
* configures PCI interrupt pin to IRQ mapping for D:20
* and D:21 IO Fabric, that contains the following devices:
* - SPI0, SPI1;
* - I2C;
* - GPIO;
* - UART0, UART1;
* - SDIO/eMMC, USB, Ethernet.
*/
static int pci_legacy_bridge_irq_config(struct device *unused)
{
ARG_UNUSED(unused);
struct pci_dev_info info = {
.function = PCI_FUNCTION_ANY,
.bar = PCI_BAR_ANY,
};
if (pci_legacy_bridge_detect(&info) == 0) {
pci_legacy_bridge_configure(&info, 1, PCI_INTA, 16);
pci_legacy_bridge_configure(&info, 1, PCI_INTB, 17);
pci_legacy_bridge_configure(&info, 1, PCI_INTC, 18);
pci_legacy_bridge_configure(&info, 1, PCI_INTD, 19);
}
return 0;
}
DECLARE_DEVICE_INIT_CONFIG(pci_legacy_bridge_0, "", pci_legacy_bridge_irq_config, NULL);
pre_kernel_late_init(pci_legacy_bridge_0, NULL);
#endif /* CONFIG_PCI_LEGACY_BRIDGE */
#ifdef CONFIG_CONSOLE_HANDLER #ifdef CONFIG_CONSOLE_HANDLER
static int console_irq_set(struct device *unsued) static int console_irq_set(struct device *unsued)