diff --git a/drivers/interrupt_controller/intc_cavs.c b/drivers/interrupt_controller/intc_cavs.c index 64d57167562..4fb820bf45e 100644 --- a/drivers/interrupt_controller/intc_cavs.c +++ b/drivers/interrupt_controller/intc_cavs.c @@ -4,6 +4,8 @@ * SPDX-License-Identifier: Apache-2.0 */ +#define DT_DRV_COMPAT intel_cavs_intc + #include #include #include "intc_cavs.h" @@ -119,113 +121,35 @@ static const struct irq_next_level_api cavs_apis = { .intr_get_line_state = cavs_ictl_irq_get_line_state, }; -static int cavs_ictl_0_initialize(struct device *port) -{ - return 0; -} +#define CAVS_ICTL_INIT(n) \ + static int cavs_ictl_##n##_initialize(struct device *port) \ + { \ + return 0; \ + } \ + \ + static void cavs_config_##n##_irq(struct device *port); \ + \ + static const struct cavs_ictl_config cavs_config_##n = { \ + .irq_num = DT_INST_IRQN(n), \ + .isr_table_offset = CONFIG_CAVS_ISR_TBL_OFFSET + \ + CONFIG_MAX_IRQ_PER_AGGREGATOR*n, \ + .config_func = cavs_config_##n##_irq, \ + }; \ + \ + static struct cavs_ictl_runtime cavs_##n##_runtime = { \ + .base_addr = DT_INST_REG_ADDR(n), \ + }; \ + DEVICE_AND_API_INIT(cavs_ictl_##n, DT_INST_LABEL(n), \ + cavs_ictl_##n##_initialize, \ + &cavs_##n##_runtime, &cavs_config_##n, \ + PRE_KERNEL_1, \ + CONFIG_CAVS_ICTL_INIT_PRIORITY, &cavs_apis);\ + \ + static void cavs_config_##n##_irq(struct device *port) \ + { \ + IRQ_CONNECT(DT_INST_IRQN(n), DT_INST_IRQ(n, priority), \ + cavs_ictl_isr, DEVICE_GET(cavs_ictl_##n), \ + DT_INST_IRQ(n, sense)); \ + } -static void cavs_config_0_irq(struct device *port); - -static const struct cavs_ictl_config cavs_config_0 = { - .irq_num = DT_CAVS_ICTL_0_IRQ, - .isr_table_offset = CONFIG_CAVS_ISR_TBL_OFFSET, - .config_func = cavs_config_0_irq, -}; - -static struct cavs_ictl_runtime cavs_0_runtime = { - .base_addr = DT_CAVS_ICTL_BASE_ADDR, -}; - -DEVICE_AND_API_INIT(cavs_ictl_0, DT_LABEL(DT_NODELABEL(cavs0)), - cavs_ictl_0_initialize, &cavs_0_runtime, &cavs_config_0, - PRE_KERNEL_1, CONFIG_CAVS_ICTL_INIT_PRIORITY, &cavs_apis); - -static void cavs_config_0_irq(struct device *port) -{ - IRQ_CONNECT(DT_CAVS_ICTL_0_IRQ, DT_CAVS_ICTL_0_IRQ_PRI, cavs_ictl_isr, - DEVICE_GET(cavs_ictl_0), DT_CAVS_ICTL_0_IRQ_FLAGS); -} - -static int cavs_ictl_1_initialize(struct device *port) -{ - return 0; -} - -static void cavs_config_1_irq(struct device *port); - -static const struct cavs_ictl_config cavs_config_1 = { - .irq_num = DT_CAVS_ICTL_1_IRQ, - .isr_table_offset = CONFIG_CAVS_ISR_TBL_OFFSET + - CONFIG_MAX_IRQ_PER_AGGREGATOR, - .config_func = cavs_config_1_irq, -}; - -static struct cavs_ictl_runtime cavs_1_runtime = { - .base_addr = DT_CAVS_ICTL_BASE_ADDR + sizeof(struct cavs_registers), -}; - -DEVICE_AND_API_INIT(cavs_ictl_1, DT_LABEL(DT_NODELABEL(cavs1)), - cavs_ictl_1_initialize, &cavs_1_runtime, &cavs_config_1, - PRE_KERNEL_1, CONFIG_CAVS_ICTL_INIT_PRIORITY, &cavs_apis); - -static void cavs_config_1_irq(struct device *port) -{ - IRQ_CONNECT(DT_CAVS_ICTL_1_IRQ, DT_CAVS_ICTL_1_IRQ_PRI, cavs_ictl_isr, - DEVICE_GET(cavs_ictl_1), DT_CAVS_ICTL_1_IRQ_FLAGS); -} - -static int cavs_ictl_2_initialize(struct device *port) -{ - return 0; -} - -static void cavs_config_2_irq(struct device *port); - -static const struct cavs_ictl_config cavs_config_2 = { - .irq_num = DT_CAVS_ICTL_2_IRQ, - .isr_table_offset = CONFIG_CAVS_ISR_TBL_OFFSET + - CONFIG_MAX_IRQ_PER_AGGREGATOR * 2, - .config_func = cavs_config_2_irq, -}; - -static struct cavs_ictl_runtime cavs_2_runtime = { - .base_addr = DT_CAVS_ICTL_BASE_ADDR + sizeof(struct cavs_registers) * 2, -}; - -DEVICE_AND_API_INIT(cavs_ictl_2, DT_LABEL(DT_NODELABEL(cavs2)), - cavs_ictl_2_initialize, &cavs_2_runtime, &cavs_config_2, - PRE_KERNEL_1, CONFIG_CAVS_ICTL_INIT_PRIORITY, &cavs_apis); - -static void cavs_config_2_irq(struct device *port) -{ - IRQ_CONNECT(DT_CAVS_ICTL_2_IRQ, DT_CAVS_ICTL_2_IRQ_PRI, cavs_ictl_isr, - DEVICE_GET(cavs_ictl_2), DT_CAVS_ICTL_2_IRQ_FLAGS); -} - -static int cavs_ictl_3_initialize(struct device *port) -{ - return 0; -} - -static void cavs_config_3_irq(struct device *port); - -static const struct cavs_ictl_config cavs_config_3 = { - .irq_num = DT_CAVS_ICTL_3_IRQ, - .isr_table_offset = CONFIG_CAVS_ISR_TBL_OFFSET + - CONFIG_MAX_IRQ_PER_AGGREGATOR*3, - .config_func = cavs_config_3_irq, -}; - -static struct cavs_ictl_runtime cavs_3_runtime = { - .base_addr = DT_CAVS_ICTL_BASE_ADDR + sizeof(struct cavs_registers) * 3, -}; - -DEVICE_AND_API_INIT(cavs_ictl_3, DT_LABEL(DT_NODELABEL(cavs3)), - cavs_ictl_3_initialize, &cavs_3_runtime, &cavs_config_3, - PRE_KERNEL_1, CONFIG_CAVS_ICTL_INIT_PRIORITY, &cavs_apis); - -static void cavs_config_3_irq(struct device *port) -{ - IRQ_CONNECT(DT_CAVS_ICTL_3_IRQ, DT_CAVS_ICTL_3_IRQ_PRI, cavs_ictl_isr, - DEVICE_GET(cavs_ictl_3), DT_CAVS_ICTL_3_IRQ_FLAGS); -} +DT_INST_FOREACH(CAVS_ICTL_INIT) diff --git a/soc/xtensa/intel_apl_adsp/dts_fixup.h b/soc/xtensa/intel_apl_adsp/dts_fixup.h index 8fe3ce96b2d..6a457f58887 100644 --- a/soc/xtensa/intel_apl_adsp/dts_fixup.h +++ b/soc/xtensa/intel_apl_adsp/dts_fixup.h @@ -12,21 +12,4 @@ #define DT_LP_SRAM_BASE DT_REG_ADDR(DT_INST(1, mmio_sram)) #define DT_LP_SRAM_SIZE DT_REG_SIZE(DT_INST(1, mmio_sram)) -#define DT_CAVS_ICTL_BASE_ADDR DT_INTEL_CAVS_INTC_1600_BASE_ADDRESS -#define DT_CAVS_ICTL_0_IRQ DT_INTEL_CAVS_INTC_1600_IRQ_0 -#define DT_CAVS_ICTL_0_IRQ_PRI DT_INTEL_CAVS_INTC_1600_IRQ_0_PRIORITY -#define DT_CAVS_ICTL_0_IRQ_FLAGS DT_INTEL_CAVS_INTC_1600_IRQ_0_SENSE - -#define DT_CAVS_ICTL_1_IRQ DT_INTEL_CAVS_INTC_1610_IRQ_0 -#define DT_CAVS_ICTL_1_IRQ_PRI DT_INTEL_CAVS_INTC_1610_IRQ_0_PRIORITY -#define DT_CAVS_ICTL_1_IRQ_FLAGS DT_INTEL_CAVS_INTC_1610_IRQ_0_SENSE - -#define DT_CAVS_ICTL_2_IRQ DT_INTEL_CAVS_INTC_1620_IRQ_0 -#define DT_CAVS_ICTL_2_IRQ_PRI DT_INTEL_CAVS_INTC_1620_IRQ_0_PRIORITY -#define DT_CAVS_ICTL_2_IRQ_FLAGS DT_INTEL_CAVS_INTC_1620_IRQ_0_SENSE - -#define DT_CAVS_ICTL_3_IRQ DT_INTEL_CAVS_INTC_1630_IRQ_0 -#define DT_CAVS_ICTL_3_IRQ_PRI DT_INTEL_CAVS_INTC_1630_IRQ_0_PRIORITY -#define DT_CAVS_ICTL_3_IRQ_FLAGS DT_INTEL_CAVS_INTC_1630_IRQ_0_SENSE - /* End of SoC Level DTS fixup file */ diff --git a/soc/xtensa/intel_s1000/dts_fixup.h b/soc/xtensa/intel_s1000/dts_fixup.h index 0282bd2d053..0ec3f26f781 100644 --- a/soc/xtensa/intel_s1000/dts_fixup.h +++ b/soc/xtensa/intel_s1000/dts_fixup.h @@ -10,21 +10,4 @@ #define DT_LP_SRAM_BASE DT_REG_ADDR(DT_INST(1, mmio_sram)) #define DT_LP_SRAM_SIZE DT_REG_SIZE(DT_INST(1, mmio_sram)) -#define DT_CAVS_ICTL_BASE_ADDR DT_INTEL_CAVS_INTC_78800_BASE_ADDRESS -#define DT_CAVS_ICTL_0_IRQ DT_INTEL_CAVS_INTC_78800_IRQ_0 -#define DT_CAVS_ICTL_0_IRQ_PRI DT_INTEL_CAVS_INTC_78800_IRQ_0_PRIORITY -#define DT_CAVS_ICTL_0_IRQ_FLAGS DT_INTEL_CAVS_INTC_78800_IRQ_0_SENSE - -#define DT_CAVS_ICTL_1_IRQ DT_INTEL_CAVS_INTC_78810_IRQ_0 -#define DT_CAVS_ICTL_1_IRQ_PRI DT_INTEL_CAVS_INTC_78810_IRQ_0_PRIORITY -#define DT_CAVS_ICTL_1_IRQ_FLAGS DT_INTEL_CAVS_INTC_78810_IRQ_0_SENSE - -#define DT_CAVS_ICTL_2_IRQ DT_INTEL_CAVS_INTC_78820_IRQ_0 -#define DT_CAVS_ICTL_2_IRQ_PRI DT_INTEL_CAVS_INTC_78820_IRQ_0_PRIORITY -#define DT_CAVS_ICTL_2_IRQ_FLAGS DT_INTEL_CAVS_INTC_78820_IRQ_0_SENSE - -#define DT_CAVS_ICTL_3_IRQ DT_INTEL_CAVS_INTC_78830_IRQ_0 -#define DT_CAVS_ICTL_3_IRQ_PRI DT_INTEL_CAVS_INTC_78830_IRQ_0_PRIORITY -#define DT_CAVS_ICTL_3_IRQ_FLAGS DT_INTEL_CAVS_INTC_78830_IRQ_0_SENSE - /* End of SoC Level DTS fixup file */