From 4598c1875406fa6128eb087ce1c248344a5a37a6 Mon Sep 17 00:00:00 2001 From: Declan Snyder Date: Fri, 9 May 2025 20:29:10 -0500 Subject: [PATCH] soc: rw: Switch main clock on PM2 to LPOSC On RW, normal configuration has all clock generators gated in PM2. Only the LPOSC is available for main clock source since it is a low power clock. Many of the peripherals on the chip are still "on" and do need a main clock source in order to be effective as wakeup sources to the chip as intended. So we should make this switch for PM2 specifically in order to achieve desired wakeup capabilities. Signed-off-by: Declan Snyder --- soc/nxp/rw/power.c | 11 +++++++++++ 1 file changed, 11 insertions(+) diff --git a/soc/nxp/rw/power.c b/soc/nxp/rw/power.c index 09734d2f505..a348a61093f 100644 --- a/soc/nxp/rw/power.c +++ b/soc/nxp/rw/power.c @@ -5,6 +5,7 @@ */ #include #include +#include #include #include #if CONFIG_GPIO && (DT_NODE_HAS_STATUS_OKAY(DT_NODELABEL(pin0)) || \ @@ -177,7 +178,17 @@ __weak void pm_state_set(enum pm_state state, uint8_t substate_id) __WFI(); break; case PM_STATE_SUSPEND_TO_IDLE: + /* save old value of main clock mux and switch to lposc */ + uint32_t main_sel_a = CLKCTL0->MAINCLKSELA; + uint32_t main_sel_b = CLKCTL0->MAINCLKSELB; + + CLKCTL0->MAINCLKSELA = 2; + CLKCTL0->MAINCLKSELB = 0; POWER_EnterPowerMode(POWER_MODE2, &slp_cfg); + /* restore previous main clock */ + CLKCTL0->MAINCLKSELA = main_sel_a; + CLKCTL0->MAINCLKSELB = main_sel_b; + break; case PM_STATE_STANDBY: #ifdef CONFIG_MPU