tests: Add configuration for small frequency dividers for system clock

For systems that have both high base (CPU, bus, etc.) frequency and
small divider of the base frequency for system clock and this way,
do not allow 1 second period for the system clock, set the system
clock period to 0.1.

Change-Id: Iafb4604112d4adb8430f8bf57a5a31de3f6cf91d
Signed-off-by: Dmitriy Korovkin <dmitriy.korovkin@windriver.com>
This commit is contained in:
Dmitriy Korovkin 2016-11-04 15:53:59 -04:00 committed by Benjamin Walsh
commit 44af016810
3 changed files with 21 additions and 2 deletions

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@ -1,5 +1,14 @@
MDEF_FILE = prj.mdef
BOARD ?= qemu_x86
CONF_FILE = prj.conf
small_freq_divider_frdm_k64f=y
small_freq_divider_arduino_due=y
small_freq_divider_qemu_cortex_m3=y
ifeq ($(small_freq_divider_$(BOARD)),y)
CONF_FILE = prj_small_freq_divider.conf
else
CONF_FILE = prj.conf
endif
include ${ZEPHYR_BASE}/Makefile.inc

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@ -0,0 +1,10 @@
# needed for printf output sent to console
CONFIG_STDOUT_CONSOLE=y
# eliminate timer interrupts during the benchmark
# for platforms that do not allow frequency dividers large enough to get
# system clock tick period in 1 sec, make system clock tick to 0.1 sec
CONFIG_SYS_CLOCK_TICKS_PER_SEC=10
# We use irq_offload(), enable it
CONFIG_IRQ_OFFLOAD=y

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@ -1,4 +1,4 @@
[test]
tags = benchmark
arch_whitelist = x86
arch_whitelist = x86 arm