diff --git a/boards/st/nucleo_h533re/Kconfig.nucleo_h533re b/boards/st/nucleo_h533re/Kconfig.nucleo_h533re new file mode 100644 index 00000000000..3d48952fb58 --- /dev/null +++ b/boards/st/nucleo_h533re/Kconfig.nucleo_h533re @@ -0,0 +1,5 @@ +# Copyright (c) 2024 STMicroelectronics +# SPDX-License-Identifier: Apache-2.0 + +config BOARD_NUCLEO_H533RE + select SOC_STM32H533XX diff --git a/boards/st/nucleo_h533re/arduino_r3_connector.dtsi b/boards/st/nucleo_h533re/arduino_r3_connector.dtsi new file mode 100644 index 00000000000..15bb1aab0bf --- /dev/null +++ b/boards/st/nucleo_h533re/arduino_r3_connector.dtsi @@ -0,0 +1,38 @@ +/* + * Copyright (c) 2024 STMicroelectronics + * + * SPDX-License-Identifier: Apache-2.0 + */ + +/ { + arduino_header: connector { + compatible = "arduino-header-r3"; + #gpio-cells = <2>; + gpio-map-mask = <0xffffffff 0xffffffc0>; + gpio-map-pass-thru = <0 0x3f>; + gpio-map = <0 0 &gpioa 0 0>, /* A0 */ + <1 0 &gpioa 1 0>, /* A1 */ + <2 0 &gpiob 1 0>, /* A2 */ + <3 0 &gpiob 0 0>, /* A3 */ + <4 0 &gpioc 1 0>, /* A4 */ + <5 0 &gpioc 0 0>, /* A5 */ + <6 0 &gpiob 15 0>, /* D0 */ + <7 0 &gpiob 14 0>, /* D1 */ + <8 0 &gpioc 8 0>, /* D2 */ + <9 0 &gpiob 3 0>, /* D3 */ + <10 0 &gpiob 5 0>, /* D4 */ + <11 0 &gpiob 4 0>, /* D5 */ + <12 0 &gpiob 10 0>, /* D6 */ + <13 0 &gpioa 8 0>, /* D7 */ + <14 0 &gpioc 7 0>, /* D8 */ + <15 0 &gpioc 6 0>, /* D9 */ + <16 0 &gpioc 9 0>, /* D10 */ + <17 0 &gpioa 7 0>, /* D11 */ + <18 0 &gpioa 6 0>, /* D12 */ + <19 0 &gpioa 5 0>, /* D13 */ + <20 0 &gpiob 7 0>, /* D14 */ + <21 0 &gpiob 6 0>; /* D15 */ + }; +}; + +arduino_serial: &usart1 {}; diff --git a/boards/st/nucleo_h533re/board.cmake b/boards/st/nucleo_h533re/board.cmake new file mode 100644 index 00000000000..cec3a36c403 --- /dev/null +++ b/boards/st/nucleo_h533re/board.cmake @@ -0,0 +1,11 @@ +# SPDX-License-Identifier: Apache-2.0 + +board_runner_args(stm32cubeprogrammer "--erase" "--port=swd" "--reset-mode=hw") + +board_runner_args(pyocd "--target=stm32h533retx") + +board_runner_args(jlink "--device=STM32H533RE" "--reset-after-load") + +include(${ZEPHYR_BASE}/boards/common/stm32cubeprogrammer.board.cmake) +include(${ZEPHYR_BASE}/boards/common/pyocd.board.cmake) +include(${ZEPHYR_BASE}/boards/common/jlink.board.cmake) diff --git a/boards/st/nucleo_h533re/board.yml b/boards/st/nucleo_h533re/board.yml new file mode 100644 index 00000000000..4b633011b71 --- /dev/null +++ b/boards/st/nucleo_h533re/board.yml @@ -0,0 +1,5 @@ +board: + name: nucleo_h533re + vendor: st + socs: + - name: stm32h533xx diff --git a/boards/st/nucleo_h533re/doc/img/nucleo_h533re.jpg b/boards/st/nucleo_h533re/doc/img/nucleo_h533re.jpg new file mode 100644 index 00000000000..aed4a9752f9 Binary files /dev/null and b/boards/st/nucleo_h533re/doc/img/nucleo_h533re.jpg differ diff --git a/boards/st/nucleo_h533re/doc/index.rst b/boards/st/nucleo_h533re/doc/index.rst new file mode 100644 index 00000000000..b2ddb225e13 --- /dev/null +++ b/boards/st/nucleo_h533re/doc/index.rst @@ -0,0 +1,306 @@ +.. _nucleo_h533re_board: + +ST Nucleo H533RE +################ + +Overview +******** + +The Nucleo H533RE board is designed as an affordable development platform for +STMicroelectronics ARM |reg| Cortex |reg|-M33 core-based STM32H533RET6 +microcontroller with TrustZone |reg|. +Here are some highlights of the Nucleo H533RE board: + +- STM32H533RE microcontroller featuring 512 kbytes of Flash memory and 272 Kbytes of + SRAM in LQFP64 package + +- Board connectors: + + - USB Type-C |trade| Sink device FS + - ST Zio expansion connector including Arduino Uno V3 connectivity (CN5, CN6, CN8, CN9) + - ST morpho extension connector (CN7, CN10) + +- Flexible board power supply: + + - 5V_USB_STLK from ST-Link USB connector + - VIN (7 - 12V, 0.8) supplied via pin header CN6 pin 8 or CN7 pin 24 + - ESV on the ST morpho connector CN7 Pin 6 (5V, O.5A) + - VBUS_STLK from a USB charger via the ST-LINK USB connector + - VBUSC from the USB user connector (5V, 0.5A) + - 3V3_EXT supplied via a pin header CN6 pin 4 or CN7 pin 16 (3.3V, 1.3A) + +- On-board ST-LINK/V3EC debugger/programmer + + - mass storage + - Virtual COM port + - debug port + +- One user LED shared with ARDUINO |reg| Uno V3 +- Two push-buttons: USER and RESET +- 32.768 kHz crystal oscillator + +More information about the board can be found at the `NUCLEO_H533RE website`_. + +.. image:: img/nucleo_h533re.jpg + :align: center + :alt: NUCLEO H533RE + +Hardware +******** + +The STM32H533xx devices are high-performance microcontrollers from the STM32H5 +Series based on the high-performance Arm |reg| Cortex |reg|-M33 32-bit RISC core. +They operate at a frequency of up to 250 MHz. + +- Core: ARM |reg| 32-bit Cortex |reg| -M33 CPU with TrustZone |reg| and FPU. +- Performance benchmark: + + - 375 DMPIS/MHz (Dhrystone 2.1) + +- Security + + - Arm |reg| TrustZone |reg| with Armv8-M mainline security extension + - Up to eight configurable SAU regions + - TrustZone |reg| aware and securable peripherals + - Flexible life cycle scheme with secure debug authentication + - SESIP3 and PSA Level 3 certified assurance target + - Preconfigured immutable root of trust (ST-iROT) + - SFI (secure firmware installation) + - Root of trust thanks to unique boot entry and secure hide protection area (HDP) + - Secure data storage with hardware unique key (HUK) + - Secure firmware upgrade support with TF-M + - Two AES coprocessors including one with DPA resistance + - Public key accelerator, DPA resistant + - On-the-fly decryption of Octo-SPI external memories + - HASH hardware accelerator + - True random number generator, NIST SP800-90B compliant + - 96-bit unique ID + - Active tampers + +- Clock management: + + - 24 MHz crystal oscillator (HSE) + - 32 kHz crystal oscillator for RTC (LSE) + - Internal 64 MHz (HSI) trimmable by software + - Internal low-power 32 kHz RC (LSI)( |plusminus| 5%) + - Internal 4 MHz oscillator (CSI), trimmable by software + - Internal 48 MHz (HSI48) with recovery system + - 3 PLLs for system clock, USB, audio, ADC + +- Power management + + - Embedded regulator (LDO) with three configurable range output to supply the digital circuitry + - Embedded SMPS step-down converter + +- RTC with HW calendar, alarms and calibration +- Up to 112 fast I/Os, most 5 V-tolerant, up to 10 I/Os with independent supply down to 1.08 V +- Up to 16 timers and 2 watchdogs + + - 8x 16-bit + - 2x 32-bit timers with up to 4 IC/OC/PWM or pulse counter and quadrature (incremental) encoder input + - 2x 16-bit low-power 16-bit timers (available in Stop mode) + - 2x watchdogs + - 2x SysTick timer + +- Memories + + - Up to 512 Kbytes Flash, 2 banks read-while-write + - 1 Kbyte OTP (one-time programmable) + - 272 Kbytes of SRAM (80-Kbyte SRAM2 with ECC) + - 2 Kbytes of backup SRAM available in the lowest power modes + - Flexible external memory controller with up to 16-bit data bus: SRAM, PSRAM, FRAM, NOR/NAND memories + - 1x OCTOSPI memory interface with on-the-fly decryption and support for serial PSRAM/NAND/NOR, Hyper RAM/Flash frame formats + - 1x SD/SDIO/MMC interfaces + +- Rich analog peripherals (independent supply) + + - 2x 12-bit ADC with up to 5 MSPS in 12-bit + - 1x 12-bit DAC with 2 channels + - 1x Digital temperature sensor + - Voltage reference buffer + +- 34x communication interfaces + + - 1x USB Type-C / USB power-delivery controller + - 1x USB 2.0 full-speed host and device (crystal-less) + - 3x I2C FM+ interfaces (SMBus/PMBus) + - 2x I3C interface + - 6x U(S)ARTS (ISO7816 interface, LIN, IrDA, modem control) + - 1x LP UART + - 4x SPIs including 3 muxed with full-duplex I2S + - 4x additional SPI from 4x USART when configured in Synchronous mode + - 2x FDCAN + - 1x SDMMC interface + - 2x 16 channel DMA controllers + - 1x 8- to 14- bit camera interface + - 1x HDMI-CEC + - 1x 16-bit parallel slave synchronous-interface + +- Development support: serial wire debug (SWD), JTAG, Embedded Trace Macrocell |trade| + +More information about STM32H533RE can be found here: + +- `STM32H533re on www.st.com`_ +- `STM32H533 reference manual`_ + +Supported Features +================== + +The Zephyr nucleo_h533re board configuration supports the following hardware features: + ++-----------+------------+-------------------------------------+ +| Interface | Controller | Driver/Component | ++===========+============+=====================================+ +| CLOCK | on-chip | reset and clock control | ++-----------+------------+-------------------------------------+ +| GPIO | on-chip | gpio | ++-----------+------------+-------------------------------------+ +| NVIC | on-chip | nested vector interrupt controller | ++-----------+------------+-------------------------------------+ +| PINMUX | on-chip | pinmux | ++-----------+------------+-------------------------------------+ +| PWM | on-chip | PWM | ++-----------+------------+-------------------------------------+ +| RNG | on-chip | True Random number generator | ++-----------+------------+-------------------------------------+ +| RTC | on-chip | Real Time Clock | ++-----------+------------+-------------------------------------+ +| UART | on-chip | serial port-polling; | +| | | serial port-interrupt | ++-----------+------------+-------------------------------------+ +| WATCHDOG | on-chip | independent watchdog | ++-----------+------------+-------------------------------------+ + +Other hardware features are not yet supported on this Zephyr port. + +The default configuration can be found in the defconfig and dts files: + +- Secure target: + + - :zephyr_file:`boards/st/nucleo_h533re/nucleo_h533re_defconfig` + - :zephyr_file:`boards/st/nucleo_h533re/nucleo_h533re.dts` + +Zephyr board options +==================== + +The STM32H533 is a SoC with Cortex-M33 architecture. Zephyr provides support +for building for Secure firmware. + +The BOARD options are summarized below: + ++----------------------+-----------------------------------------------+ +| BOARD | Description | ++======================+===============================================+ +| nucleo_h533re | For building Secure firmware | ++----------------------+-----------------------------------------------+ + +Connections and IOs +=================== + +Nucleo H533RE Board has 8 GPIO controllers. These controllers are responsible for pin muxing, +input/output, pull-up, etc. + +For more details please refer to `STM32H5 Nucleo-64 board User Manual`_. + +Default Zephyr Peripheral Mapping: +---------------------------------- + +- ADC1 channel 14 input: PB1 +- USART1 TX/RX : PB14/PB15 (Arduino USART1) +- SPI1 SCK/MISO/MOSI/NSS: PA5/PA6/PA7/PC9 +- UART2 TX/RX : PA2/PA3 (VCP) +- USER_PB : PC13 + +System Clock +------------ + +Nucleo H533RE System Clock could be driven by internal or external oscillator, +as well as main PLL clock. By default System clock is driven by PLL clock at +240MHz, driven by an 24MHz high-speed external clock. + +Serial Port +----------- + +Nucleo H533RE board has up to 6 U(S)ARTs. The Zephyr console output is assigned +to USART2. Default settings are 115200 8N1. + +Programming and Debugging +************************* + +Applications for the ``nucleo_h533re`` board can be built and +flashed in the usual way (see :ref:`build_an_application` and +:ref:`application_run` for more details). + +Flashing +======== + +Nucleo H533RE board includes an ST-LINK/V3EC embedded debug tool interface. +This probe allows to flash the board using various tools. + +Board is configured to be flashed using west STM32CubeProgrammer runner. +Installation of `STM32CubeProgrammer`_ is then required to flash the board. + +Alternatively, pyocd or jlink via an external probe can also be used to flash +and debug the board if west is told to use it as runner, which can be done by +passing either or ``-r pyocd``, or ``-r jlink``. + +For pyocd additional target information needs to be installed. +This can be done by executing the following commands. + +.. code-block:: console + + $ pyocd pack --update + $ pyocd pack --install stm32h5 + + +Flashing an application to Nucleo H533RE +------------------------------------------ + +Connect the Nucleo H533RE to your host computer using the USB port. +Then build and flash an application. Here is an example for the +:ref:`hello_world` application. + +Run a serial host program to connect with your Nucleo board: + +.. code-block:: console + + $ minicom -D /dev/ttyACM0 + +Then build and flash the application. + +.. zephyr-app-commands:: + :zephyr-app: samples/hello_world + :board: nucleo_h533re + :goals: build flash + +You should see the following message on the console: + +.. code-block:: console + + Hello World! nucleo_h533re + +Debugging +========= + +You can debug an application in the usual way. Here is an example for the +:zephyr:code-sample:`blinky` application. + +.. zephyr-app-commands:: + :zephyr-app: samples/basic/blinky + :board: nucleo_h533re + :goals: debug + +.. _NUCLEO_H533RE website: + https://www.st.com/en/evaluation-tools/nucleo-h533re + +.. _STM32H5 Nucleo-64 board User Manual: + https://www.st.com/resource/en/user_manual/um3121-stm32h5-nucleo64-board-mb1814-stmicroelectronics.pdf + +.. _STM32H533RE on www.st.com: + https://www.st.com/en/microcontrollers-microprocessors/stm32h533re + +.. _STM32H533 reference manual: + https://www.st.com/resource/en/reference_manual/rm0481-stm32h533-stm32h563-stm32h573-and-stm32h562-armbased-32bit-mcus-stmicroelectronics.pdf + +.. _STM32CubeProgrammer: + https://www.st.com/en/development-tools/stm32cubeprog.html diff --git a/boards/st/nucleo_h533re/nucleo_h533re.dts b/boards/st/nucleo_h533re/nucleo_h533re.dts new file mode 100644 index 00000000000..7071a5e21a8 --- /dev/null +++ b/boards/st/nucleo_h533re/nucleo_h533re.dts @@ -0,0 +1,137 @@ +/* + * Copyright (c) 2024 STMicroelectronics + * + * SPDX-License-Identifier: Apache-2.0 + */ + +/dts-v1/; +#include +#include +#include "arduino_r3_connector.dtsi" +#include "st_morpho_connector.dtsi" +#include + +/ { + model = "STMicroelectronics STM32H533RE-NUCLEO board"; + compatible = "st,stm32h533re-nucleo"; + + chosen { + zephyr,console = &usart2; + zephyr,shell-uart = &usart2; + zephyr,sram = &sram1; + zephyr,flash = &flash0; + }; + + leds: leds { + compatible = "gpio-leds"; + green_led_2: led_42 { + gpios = <&gpioa 5 GPIO_ACTIVE_LOW>; + label = "User LD2"; + }; + }; + + + pwmleds { + compatible = "pwm-leds"; + + green_pwm_led: green_pwm_led { + pwms = <&pwm3 1 PWM_MSEC(20) PWM_POLARITY_NORMAL>; + }; + }; + + gpio_keys { + compatible = "gpio-keys"; + user_button: button { + label = "User"; + gpios = <&gpioc 13 GPIO_ACTIVE_HIGH>; + zephyr,code = ; + }; + }; + + aliases { + led0 = &green_led_2; + pwm-led0 = &green_pwm_led; + sw0 = &user_button; + watchdog0 = &iwdg; + volt-sensor0 = &vref; + }; +}; + +&clk_csi { + status = "okay"; +}; + +&clk_hsi { + status = "okay"; +}; + +&clk_hse { + clock-frequency = ; + status = "okay"; +}; + +&pll { + div-m = <2>; + mul-n = <40>; + div-p = <2>; + div-q = <2>; + div-r = <2>; + clocks = <&clk_hse>; + status = "okay"; +}; + +&rcc { + clocks = <&pll>; + clock-frequency = ; + ahb-prescaler = <1>; + apb1-prescaler = <1>; + apb2-prescaler = <1>; + apb3-prescaler = <1>; +}; + +&usart1 { + pinctrl-0 = <&usart1_tx_pb14 &usart1_rx_pb15>; + pinctrl-names = "default"; + current-speed = <115200>; + status = "okay"; +}; + +&usart2 { + pinctrl-0 = <&usart2_tx_pa2 &usart2_rx_pa3>; + pinctrl-names = "default"; + current-speed = <115200>; + status = "okay"; +}; + +&iwdg { + status = "okay"; +}; + +&timers3 { + st,prescaler = <1000>; + status = "okay"; + + pwm3: pwm { + pinctrl-0 = <&tim3_ch3_pb0>; + pinctrl-names = "default"; + status = "okay"; + }; +}; + +&vref { + status = "okay"; +}; + +&rng { + status = "okay"; +}; + +&clk_lse { + status = "okay"; +}; + +&rtc { + clocks = <&rcc STM32_CLOCK_BUS_APB3 0x00200000>, + <&rcc STM32_SRC_LSE RTC_SEL(1)>; + status = "okay"; +}; diff --git a/boards/st/nucleo_h533re/nucleo_h533re.yaml b/boards/st/nucleo_h533re/nucleo_h533re.yaml new file mode 100644 index 00000000000..8262b95a843 --- /dev/null +++ b/boards/st/nucleo_h533re/nucleo_h533re.yaml @@ -0,0 +1,17 @@ +# Copyright (c) 2024 +# SPDX-License-Identifier: Apache-2.0 + +identifier: nucleo_h533re +name: ST Nucleo H533RE +type: mcu +arch: arm +toolchain: + - zephyr +ram: 272 +flash: 512 +supported: + - gpio + - watchdog + - pwm + - rtc +vendor: st diff --git a/boards/st/nucleo_h533re/nucleo_h533re_defconfig b/boards/st/nucleo_h533re/nucleo_h533re_defconfig new file mode 100644 index 00000000000..5b88c80b24f --- /dev/null +++ b/boards/st/nucleo_h533re/nucleo_h533re_defconfig @@ -0,0 +1,16 @@ +# SPDX-License-Identifier: Apache-2.0 + +# enable uart driver +CONFIG_SERIAL=y + +# console +CONFIG_CONSOLE=y +CONFIG_UART_CONSOLE=y + +# Enable clock +CONFIG_CLOCK_CONTROL=y + +# enable GPIO +CONFIG_GPIO=y +# enable pin controller +CONFIG_PINCTRL=y diff --git a/boards/st/nucleo_h533re/st_morpho_connector.dtsi b/boards/st/nucleo_h533re/st_morpho_connector.dtsi new file mode 100644 index 00000000000..ce3d7c84017 --- /dev/null +++ b/boards/st/nucleo_h533re/st_morpho_connector.dtsi @@ -0,0 +1,65 @@ +/* + * Copyright (c) 2024 STMicroelectronics + * SPDX-License-Identifier: Apache-2.0 + */ + +#include +#include + +/ { + st_morpho_header: st-morpho-header { + compatible = "st-morpho-header"; + #gpio-cells = <2>; + gpio-map-mask = ; + gpio-map-pass-thru = <0x0 GPIO_DT_FLAGS_MASK>; + gpio-map = , + , + , + , + , /* SB40=ON, SB41=ON */ + , /* SB40=ON, SB41=ON */ + , + , + , + , + , + , + , + , + , + , + , + , + , + , + + , + , + , + , + , + , + , /* SB13=ON, SB17=ON */ + , + , /* SB13=ON, SB17=ON */ + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + ; + }; +};