boards: adi: Add MAX78002EVKIT board
Add MAX78002EVKIT board. For more information about this board please check https://www.analog.com/ Signed-off-by: Furkan Akkiz <hasanfurkan.akkiz@analog.com>
This commit is contained in:
Furkan Akkiz
Anas Nashif
parent
9c98ab7b73
commit
4488728822
9 changed files with 482 additions and 0 deletions
7
boards/adi/max78002evkit/Kconfig.max78002evkit
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boards/adi/max78002evkit/Kconfig.max78002evkit
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# MAX78002EVKIT board configuration
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# Copyright (c) 2024 Analog Devices, Inc.
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# SPDX-License-Identifier: Apache-2.0
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config BOARD_MAX78002EVKIT
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select SOC_MAX78002_M4 if BOARD_MAX78002EVKIT_MAX78002_M4
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boards/adi/max78002evkit/board.cmake
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boards/adi/max78002evkit/board.cmake
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# Copyright (c) 2024 Analog Devices, Inc.
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# SPDX-License-Identifier: Apache-2.0
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board_runner_args(openocd --cmd-pre-init "source [find interface/cmsis-dap.cfg]")
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board_runner_args(openocd --cmd-pre-init "source [find target/max78002.cfg]")
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include(${ZEPHYR_BASE}/boards/common/openocd.board.cmake)
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boards/adi/max78002evkit/board.yml
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boards/adi/max78002evkit/board.yml
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# Copyright (c) 2024 Analog Devices, Inc.
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# SPDX-License-Identifier: Apache-2.0
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board:
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name: max78002evkit
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full_name: MAX78002EVKIT
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vendor: adi
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socs:
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- name: max78002
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BIN
boards/adi/max78002evkit/doc/img/max78002evkit.webp
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boards/adi/max78002evkit/doc/img/max78002evkit.webp
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boards/adi/max78002evkit/doc/img/max78002evkit_back.webp
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boards/adi/max78002evkit/doc/img/max78002evkit_back.webp
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boards/adi/max78002evkit/doc/index.rst
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boards/adi/max78002evkit/doc/index.rst
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.. zephyr:board:: max78002evkit
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Overview
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********
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The MAX78002 evaluation kit (EV kit) provides a platform and tools for leveraging device capabilities to build new
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generations of artificial intelligence (AI) products.
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The kit provides optimal versatility with a modular peripheral architecture, allowing a variety of input and output
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devices to be remotely located. DVP and CSI cameras, I2S audio peripherals, digital microphones, and analog sensors
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are supported, while a pair of industry-standard QWIIC connectors supports a large and growing array of aftermarket
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development boards. An onboard stereo audio codec offers line-level audio input and output, and tactile input is
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provided by a touch-enabled 2.4in TFT display. The MAX78002 energy consumption is tracked by a power accumulator,
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with four channels of formatted results presented on a secondary TFT display. All device GPIOs are accessible on
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0.1in pin headers. A standard coaxial power jack serves as power input, using the included 5V, 3A wall-mount
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adapter. Two USB connectors provide serial access to the MAX78002, one directly and the other through a USB to UART
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bridge. A third USB connector allows access to the MAX78002 energy consumption data. Rounding out the features, a
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microSD connector provides the capability for inexpensive highdensity portable data storage.
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The Zephyr port is running on the MAX78002 MCU.
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.. image:: img/max78002evkit.webp
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:align: center
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:alt: MAX78002 EVKIT Front
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.. image:: img/max78002evkit_back.webp
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:align: center
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:alt: MAX78002 EVKIT Back
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Hardware
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********
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- MAX78002 MCU:
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- Dual-Core, Low-Power Microcontroller
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- Arm Cortex-M4 Processor with FPU up to 120MHz
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- 2.5MB Flash, 64KB ROM, and 384KB SRAM
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- Optimized Performance with 16KB Instruction Cache
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- Optional Error Correction Code (ECC SEC-DED) for SRAM
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- 32-Bit RISC-V Coprocessor up to 60MHz
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- Up to 60 General-Purpose I/O Pins
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- MIPI Camera Serial Interface 2 (MIPI CSI-2) Controller V2.1
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- Support for Two Data Lanes
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- 12-Bit Parallel Camera Interface
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- I 2S Controller/Target for Digital Audio Interface
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- Secure Digital Interface Supports SD 3.0/SDIO 3.0/eMMC 4.51
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- Convolutional Neural Network (CNN) Accelerator
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- Highly Optimized for Deep CNNs
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- 2 Million 8-Bit Weight Capacity with 1-, 2-, 4-, and 8-bit Weights
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- 1.3MB CNN Data Memory
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- Programmable Input Image Size up to 2048 x 2048 Pixels
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- Programmable Network Depth up to 128 Layers
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- Programmable per Layer Network Channel Widths up to 1024 Channels
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- 1- and 2-Dimensional Convolution Processing
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- Capable of Processing VGA Images at 30fps
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- Power Management for Extending Battery Life
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- Integrated Single-Inductor Multiple-Output (SIMO) Switch-Mode Power Supply (SMPS)
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- 2.85V to 3.6V Supply Voltage Range
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- Support of Optional External Auxiliary CNN Power Supply
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- Dynamic Voltage Scaling Minimizes Active Core Power Consumption
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- 23.9μA/MHz While Loop Execution at 3.3V from Cache (CM4 only)
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- Selectable SRAM Retention in Low-Power Modes with Real-Time Clock (RTC) Enabled
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- Security and Integrity
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- Available Secure Boot
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- AES 128/192/256 Hardware Acceleration Engine
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- True Random Number Generator (TRNG) Seed Generator
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- Ultra-Low-Power Wireless Microcontroller
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- Internal 100MHz Oscillator
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- Flexible Low-Power Modes with 7.3728MHz System Clock Option
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- 512KB Flash and 128KB SRAM (Optional ECC on One 32KB SRAM Bank)
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- 16KB Instruction Cache
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- Bluetooth 5.2 LE Radio
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- Dedicated, Ultra-Low-Power, 32-Bit RISC-V Coprocessor to Offload Timing-Critical Bluetooth Processing
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- Fully Open-Source Bluetooth 5.2 Stack Available
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- Supports AoA, AoD, LE Audio, and Mesh
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- High-Throughput (2Mbps) Mode
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- Long-Range (125kbps and 500kbps) Modes
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- Rx Sensitivity: -97.5dBm; Tx Power: +4.5dBm
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- Single-Ended Antenna Connection (50Ω)
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- Power Management Maximizes Battery Life
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- 2.0V to 3.6V Supply Voltage Range
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- Integrated SIMO Power Regulator
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- Dynamic Voltage Scaling (DVS)
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- 23.8μA/MHz Active Current at 3.0V
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- 4.4μA at 3.0V Retention Current for 32KB
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- Selectable SRAM Retention + RTC in Low-Power Modes
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- Multiple Peripherals for System Control
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- Up to Two High-Speed SPI Master/Slave
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- Up to Three High-Speed I2C Master/Slave (3.4Mbps)
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- Up to Four UART, One I2S Master/Slave
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- Up to 8-Input, 10-Bit Sigma-Delta ADC 7.8ksps
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- Up to Four Micro-Power Comparators
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- Timers: Up to Two Four 32-Bit, Two LP, TwoWatchdog Timers
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- 1-Wire® Master
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- Up to Four Pulse Train (PWM) Engines
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- RTC with Wake-Up Timer
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- Up to 52 GPIOs
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- Security and Integrity
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- Available Secure Boot
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- TRNG Seed Generator
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- AES 128/192/256 Hardware Acceleration Engine
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- External devices connected to the MAX78002 EVKIT:
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- Color TFT Display
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- Audio Stereo Codec Interface
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- Digital Microphone
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- A 8Mb QSPI ram
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Supported Features
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==================
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The ``max78002evkit/max78002/m4`` board target supports the following interfaces:
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+-----------+------------+-------------------------------------+
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| Interface | Controller | Driver/Component |
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+===========+============+=====================================+
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| NVIC | on-chip | nested vector interrupt controller |
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+-----------+------------+-------------------------------------+
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| SYSTICK | on-chip | systick |
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+-----------+------------+-------------------------------------+
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| CLOCK | on-chip | clock and reset control |
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+-----------+------------+-------------------------------------+
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| GPIO | on-chip | gpio |
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+-----------+------------+-------------------------------------+
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| UART | on-chip | serial |
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+-----------+------------+-------------------------------------+
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| TRNG | on-chip | entropy |
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+-----------+------------+-------------------------------------+
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| I2C | on-chip | i2c |
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+-----------+------------+-------------------------------------+
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| DMA | on-chip | dma controller |
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+-----------+------------+-------------------------------------+
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| Watchdog | on-chip | watchdog |
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+-----------+------------+-------------------------------------+
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| SPI | on-chip | spi |
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+-----------+------------+-------------------------------------+
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| ADC | on-chip | adc |
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+-----------+------------+-------------------------------------+
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| Timer | on-chip | counter |
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+-----------+------------+-------------------------------------+
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| PWM | on-chip | pwm |
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+-----------+------------+-------------------------------------+
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| W1 | on-chip | one wire master |
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+-----------+------------+-------------------------------------+
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| Flash | on-chip | flash |
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+-----------+------------+-------------------------------------+
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Connections and IOs
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===================
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+-----------+-------------------+----------------------------------------------------------------------------------+
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| Name | Signal | Usage |
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+===========+===================+==================================================================================+
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| JP1 | 3V3 MON | Normal operation in conjunction with JP3 jumpered 1-2 |
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+-----------+-------------------+----------------------------------------------------------------------------------+
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| JP2 | 3V3 SW PM BYPASS | Power monitor shunts for main 3.3 V system power are bypassed |
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+-----------+-------------------+----------------------------------------------------------------------------------+
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| JP3 | CNN MON | Normal operation in conjunction with JP6 jumpered 1-2 |
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+-----------+-------------------+----------------------------------------------------------------------------------+
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| JP4 | VCOREA PM BYPASS | Power monitor shunts for U4's share of VCOREA + CNN loads are bypassed |
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+-----------+-------------------+----------------------------------------------------------------------------------+
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| JP5 | VCOREB PM BYPASS | Power monitor shunts for VCOREB are bypassed |
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+-----------+-------------------+----------------------------------------------------------------------------------+
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| JP6 | VREGO_A PM BYPASS | Power monitor shunts for VREGO_A are bypassed |
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+-----------+-------------------+----------------------------------------------------------------------------------+
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| JP7 | VBAT | Enable/Disable 3V3 VBAT power |
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+-----------+-------------------+----------------------------------------------------------------------------------+
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| JP8 | VREGI | Enable/Disable 3V3 VREGI power |
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+-----------+-------------------+----------------------------------------------------------------------------------+
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| JP9 | VREGI/VBAT | Onboard 3V3_PM / external source at TP10 supplies VREGI/VBAT |
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+-----------+-------------------+----------------------------------------------------------------------------------+
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| JP10 | VDDIOH | Onboard 3V3_PM/3V3_SW supplies VDDIOH |
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+-----------+-------------------+----------------------------------------------------------------------------------+
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| JP11 | VDDA | VREGO_A_PM powers VDDA |
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+-----------+-------------------+----------------------------------------------------------------------------------+
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| JP12 | VDDIO | VREGO_A_PM powers VDDIO |
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+-----------+-------------------+----------------------------------------------------------------------------------+
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| JP13 | VCOREB | VREGO_B powers VCOREB |
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+-----------+-------------------+----------------------------------------------------------------------------------+
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| JP14 | VCOREA | VREGO_C ties to net VCOREA |
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+-----------+-------------------+----------------------------------------------------------------------------------+
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| JP15 | VREF | DUT ADC VREF is supplied by precision external reference |
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+-----------+-------------------+----------------------------------------------------------------------------------+
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| JP16 | I2C1 SDA | I2C1 DATA pull-up |
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+-----------+-------------------+----------------------------------------------------------------------------------+
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| JP17 | I2C1 SCL | I2C1 CLOCK pull-up |
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+-----------+-------------------+----------------------------------------------------------------------------------+
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| JP18 | TRIG1 | PWR accumulator trigger signal 1 ties to port 1.6 |
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+-----------+-------------------+----------------------------------------------------------------------------------+
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| JP19 | TRIG2 | PWR accumulator trigger signal 2 ties to port 1.7 |
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+-----------+-------------------+----------------------------------------------------------------------------------+
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| JP20 | UART0 EN | Connect/Disconnect USB-UART bridge to UART0 |
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+-----------+-------------------+----------------------------------------------------------------------------------+
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| JP21 | I2C0_SDA | I2C0 DATA pull-up |
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+-----------+-------------------+----------------------------------------------------------------------------------+
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| JP22 | I2C0_SCL | I2C0 CLOCK pull-up |
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+-----------+-------------------+----------------------------------------------------------------------------------+
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| JP23 | UART1 EN | Connect/Disconnect USB-UART bridge to UART1 |
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+-----------+-------------------+----------------------------------------------------------------------------------+
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| JP24 | EXT I2C0 EN | Enable/Disable QWIIC interface for I2C0 |
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+-----------+-------------------+----------------------------------------------------------------------------------+
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| JP25 | PB1 PU | Enable/Disable 100kΩ pull-up for pushbutton mode, port 2.6 |
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+-----------+-------------------+----------------------------------------------------------------------------------+
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| JP26 | PB2 PU | Enable/Disable 100kΩ pull-up for pushbutton mode, port 2.7 |
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+-----------+-------------------+----------------------------------------------------------------------------------+
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| JP27 | I2C2 SDA | I2C2 DATA pull-up |
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+-----------+-------------------+----------------------------------------------------------------------------------+
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| JP28 | I2C2 SCL | I2C2 CLOCK pull-up |
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+-----------+-------------------+----------------------------------------------------------------------------------+
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| JP29 | VDDB | USB XCVR VDDB powered from VBUS / powered full time by system 3V3_PM |
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+-----------+-------------------+----------------------------------------------------------------------------------+
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| JP30 | EXT I2C2 EN | Enable/Disable QWIIC interface for I2C2 |
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+-----------+-------------------+----------------------------------------------------------------------------------+
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| JP31 | L/R SEL | Select MIC ON R/L CH, I2S microphone data stream |
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+-----------+-------------------+----------------------------------------------------------------------------------+
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| JP32 | MIC-I2S I/O | External I2S/MIC data from I2S I/O / MIC header connected to I2S SDI |
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+-----------+-------------------+----------------------------------------------------------------------------------+
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| JP33 | MIC-I2S/CODEC | Onboard CODEC data / external I2S data from header connects to I2S SDI |
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+-----------+-------------------+----------------------------------------------------------------------------------+
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| JP34 | I2S VDD | Select 1.8V/3.3V for external MIC and DATA I2S interface |
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+-----------+-------------------+----------------------------------------------------------------------------------+
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| JP35 | I2C1 SDA | I2C1 DATA pull-up |
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+-----------+-------------------+----------------------------------------------------------------------------------+
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| JP36 | I2C1 SCL | I2C1 CLOCK pull-up |
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+-----------+-------------------+----------------------------------------------------------------------------------+
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| JP37 | I2S CK SEL | Select SMA connector J6 / onboard crystal oscillator for I2S master clock source |
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+-----------+-------------------+----------------------------------------------------------------------------------+
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| JP38 | DVP CAM PWR | Enable/Disable OVM7692 for DVP camera PWDN input |
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+-----------+-------------------+----------------------------------------------------------------------------------+
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| JP39 | SW CAM PWUP | Camera reset and power up under port pin control |
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+-----------+-------------------+----------------------------------------------------------------------------------+
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| JP40 | HW PWUP / SW PWUP | Camera will reset and power up as soon as 3.3V reaches a valid level |
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+-----------+-------------------+----------------------------------------------------------------------------------+
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| JP41 | CSI CAM I2C EN | Connect/Disconnect I2C1 to CSI camera Digilent P5C I2C |
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+-----------+-------------------+----------------------------------------------------------------------------------+
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| JP42 | TFT DC | TFT data/command select connects to port 2.2 |
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+-----------+-------------------+----------------------------------------------------------------------------------+
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| JP43 | TFT CS | Select port 0.3 / port 1.7 to drive TFT CS |
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+-----------+-------------------+----------------------------------------------------------------------------------+
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| JP44 | LED1 EN | Enable/Disable LED1 |
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+-----------+-------------------+----------------------------------------------------------------------------------+
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| JP45 | LED2 EN | Enable/Disable LED2 |
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+-----------+-------------------+----------------------------------------------------------------------------------+
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Programming and Debugging
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*************************
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Flashing
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========
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The MAX78002 MCU can be flashed by connecting an external debug probe to the
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SWD port. SWD debug can be accessed through the Cortex 10-pin connector, JH8.
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Logic levels are fixed to VDDIO (1.8V).
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Once the debug probe is connected to your host computer, then you can simply run the
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``west flash`` command to write a firmware image into flash.
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.. note::
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This board uses OpenOCD as the default debug interface. You can also use
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a Segger J-Link with Segger's native tooling by overriding the runner,
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appending ``--runner jlink`` to your ``west`` command(s). The J-Link should
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be connected to the standard 2*5 pin debug connector (JH8) using an
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appropriate adapter board and cable.
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Debugging
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=========
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Please refer to the `Flashing`_ section and run the ``west debug`` command
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instead of ``west flash``.
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References
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**********
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- `MAX78002EVKIT web page`_
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.. _MAX78002EVKIT web page:
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||||||
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https://www.analog.com/en/resources/evaluation-hardware-and-software/evaluation-boards-kits/max78002evkit.html
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||||||
127
boards/adi/max78002evkit/max78002evkit_max78002_m4.dts
Normal file
127
boards/adi/max78002evkit/max78002evkit_max78002_m4.dts
Normal file
|
|
@ -0,0 +1,127 @@
|
||||||
|
/*
|
||||||
|
* Copyright (c) 2024 Analog Devices, Inc.
|
||||||
|
*
|
||||||
|
* SPDX-License-Identifier: Apache-2.0
|
||||||
|
*/
|
||||||
|
|
||||||
|
/dts-v1/;
|
||||||
|
|
||||||
|
#include <adi/max32/max78002.dtsi>
|
||||||
|
#include <adi/max32/max78002-pinctrl.dtsi>
|
||||||
|
#include <zephyr/dt-bindings/gpio/adi-max32-gpio.h>
|
||||||
|
#include <zephyr/dt-bindings/input/input-event-codes.h>
|
||||||
|
|
||||||
|
/ {
|
||||||
|
model = "Analog Devices MAX78002EVKIT";
|
||||||
|
compatible = "adi,max78002evkit";
|
||||||
|
|
||||||
|
chosen {
|
||||||
|
zephyr,console = &uart0;
|
||||||
|
zephyr,shell-uart = &uart0;
|
||||||
|
zephyr,sram = &sram2;
|
||||||
|
zephyr,flash = &flash0;
|
||||||
|
};
|
||||||
|
|
||||||
|
leds {
|
||||||
|
compatible = "gpio-leds";
|
||||||
|
led1: led_1 {
|
||||||
|
gpios = <&gpio2 4 GPIO_ACTIVE_HIGH>;
|
||||||
|
label = "Green LED";
|
||||||
|
};
|
||||||
|
led2: led_2 {
|
||||||
|
gpios = <&gpio2 5 GPIO_ACTIVE_HIGH>;
|
||||||
|
label = "Red LED";
|
||||||
|
};
|
||||||
|
};
|
||||||
|
|
||||||
|
buttons {
|
||||||
|
compatible = "gpio-keys";
|
||||||
|
pb1: pb1 {
|
||||||
|
gpios = <&gpio2 6 (GPIO_PULL_UP | GPIO_ACTIVE_LOW)>;
|
||||||
|
label = "SW2";
|
||||||
|
zephyr,code = <INPUT_KEY_0>;
|
||||||
|
};
|
||||||
|
pb2: pb2 {
|
||||||
|
gpios = <&gpio2 7 (GPIO_PULL_UP | GPIO_ACTIVE_LOW)>;
|
||||||
|
label = "SW3";
|
||||||
|
zephyr,code = <INPUT_KEY_1>;
|
||||||
|
};
|
||||||
|
pb_wakeup: pb_wakeup {
|
||||||
|
gpios = <&gpio3 1 (GPIO_PULL_UP | GPIO_ACTIVE_LOW
|
||||||
|
| MAX32_GPIO_VSEL_VDDIOH)>;
|
||||||
|
label = "Wakeup";
|
||||||
|
zephyr,code = <INPUT_KEY_WAKEUP>;
|
||||||
|
};
|
||||||
|
};
|
||||||
|
|
||||||
|
/* These aliases are provided for compatibility with samples */
|
||||||
|
aliases {
|
||||||
|
led0 = &led1;
|
||||||
|
led1 = &led2;
|
||||||
|
sw0 = &pb1;
|
||||||
|
sw1 = &pb2;
|
||||||
|
watchdog0 = &wdt0;
|
||||||
|
};
|
||||||
|
};
|
||||||
|
|
||||||
|
&uart0 {
|
||||||
|
pinctrl-0 = <&uart0a_tx_p0_1 &uart0a_rx_p0_0>;
|
||||||
|
pinctrl-names = "default";
|
||||||
|
current-speed = <115200>;
|
||||||
|
data-bits = <8>;
|
||||||
|
parity = "none";
|
||||||
|
status = "okay";
|
||||||
|
};
|
||||||
|
|
||||||
|
&clk_ipo {
|
||||||
|
status = "okay";
|
||||||
|
};
|
||||||
|
|
||||||
|
&clk_ibro {
|
||||||
|
status = "okay";
|
||||||
|
};
|
||||||
|
|
||||||
|
&gpio0 {
|
||||||
|
status = "okay";
|
||||||
|
};
|
||||||
|
|
||||||
|
&gpio1 {
|
||||||
|
status = "okay";
|
||||||
|
};
|
||||||
|
|
||||||
|
&gpio2 {
|
||||||
|
status = "okay";
|
||||||
|
};
|
||||||
|
|
||||||
|
&gpio3 {
|
||||||
|
status = "okay";
|
||||||
|
};
|
||||||
|
|
||||||
|
&trng {
|
||||||
|
status = "okay";
|
||||||
|
};
|
||||||
|
|
||||||
|
&i2c0 {
|
||||||
|
status = "okay";
|
||||||
|
pinctrl-0 = <&i2c0_scl_p0_10 &i2c0_sda_p0_11>;
|
||||||
|
pinctrl-names = "default";
|
||||||
|
};
|
||||||
|
|
||||||
|
&dma0 {
|
||||||
|
status = "okay";
|
||||||
|
};
|
||||||
|
|
||||||
|
&wdt0 {
|
||||||
|
status = "okay";
|
||||||
|
};
|
||||||
|
|
||||||
|
&spi0 {
|
||||||
|
status = "okay";
|
||||||
|
pinctrl-0 = <&spi0_mosi_p0_5 &spi0_miso_p0_6 &spi0_sck_p0_7 &spi0_ss0_p0_4>;
|
||||||
|
pinctrl-names = "default";
|
||||||
|
};
|
||||||
|
|
||||||
|
&w1 {
|
||||||
|
pinctrl-0 = <&owm_io_p0_6 &owm_pe_p0_7>;
|
||||||
|
pinctrl-names = "default";
|
||||||
|
};
|
||||||
24
boards/adi/max78002evkit/max78002evkit_max78002_m4.yaml
Normal file
24
boards/adi/max78002evkit/max78002evkit_max78002_m4.yaml
Normal file
|
|
@ -0,0 +1,24 @@
|
||||||
|
identifier: max78002evkit/max78002/m4
|
||||||
|
name: max78002evkit m4
|
||||||
|
vendor: adi
|
||||||
|
type: mcu
|
||||||
|
arch: arm
|
||||||
|
toolchain:
|
||||||
|
- zephyr
|
||||||
|
- gnuarmemb
|
||||||
|
- xtools
|
||||||
|
supported:
|
||||||
|
- gpio
|
||||||
|
- serial
|
||||||
|
- trng
|
||||||
|
- i2c
|
||||||
|
- dma
|
||||||
|
- watchdog
|
||||||
|
- spi
|
||||||
|
- adc
|
||||||
|
- counter
|
||||||
|
- pwm
|
||||||
|
- w1
|
||||||
|
- flash
|
||||||
|
ram: 384
|
||||||
|
flash: 2560
|
||||||
13
boards/adi/max78002evkit/max78002evkit_max78002_m4_defconfig
Normal file
13
boards/adi/max78002evkit/max78002evkit_max78002_m4_defconfig
Normal file
|
|
@ -0,0 +1,13 @@
|
||||||
|
# Copyright (c) 2024 Analog Devices, Inc.
|
||||||
|
# SPDX-License-Identifier: Apache-2.0
|
||||||
|
|
||||||
|
# Enable GPIO
|
||||||
|
CONFIG_GPIO=y
|
||||||
|
|
||||||
|
# Console
|
||||||
|
CONFIG_CONSOLE=y
|
||||||
|
CONFIG_UART_CONSOLE=y
|
||||||
|
|
||||||
|
# Enable UART
|
||||||
|
CONFIG_SERIAL=y
|
||||||
|
CONFIG_UART_INTERRUPT_DRIVEN=y
|
||||||
Loading…
Add table
Add a link
Reference in a new issue