Revert "arch/riscv: Use arch_switch() for context swap"
This reverts commit be28de692c.
The purpose of this commit will be reintroduced later on top of
a cleaner codebase.
Signed-off-by: Nicolas Pitre <npitre@baylibre.com>
This commit is contained in:
Nicolas Pitre
Anas Nashif
parent
13a7047ea9
commit
442ab22bdc
6 changed files with 204 additions and 248 deletions
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@ -108,8 +108,6 @@ config RISCV
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select HAS_DTS
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select ARCH_SUPPORTS_COREDUMP
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select ARCH_HAS_THREAD_LOCAL_STORAGE
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select USE_SWITCH
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select USE_SWITCH_SUPPORTED
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select SCHED_IPI_SUPPORTED if SMP
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imply XIP
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help
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@ -12,7 +12,7 @@ zephyr_library_sources(
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prep_c.c
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reboot.c
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reset.S
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switch.S
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swap.S
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smp.c
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thread.c
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)
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@ -222,14 +222,6 @@
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la ret, _kernel ;\
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add ret, ret, temp ;
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#define RISCV_IRQ_INTERRUPT 0x1
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#define RISCV_IRQ_USER_ECALL 0x2
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#define RISCV_IRQ_EXCEPTION 0x3
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#define RISCV_IRQ_RETURN_FROM_SYSCALL 0x4
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#define RISCV_IRQ_FORCED_SYSCALL 0x5
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#define RISCV_IRQ_OFFLOAD 0x6
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#define RISCV_IRQ_CONTEXT_SWITCH 0x7
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/* imports */
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GDATA(_sw_isr_table)
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GTEXT(__soc_is_irq)
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@ -240,7 +232,9 @@ GTEXT(__soc_save_context)
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GTEXT(__soc_restore_context)
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#endif /* CONFIG_RISCV_SOC_CONTEXT_SAVE */
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GTEXT(z_get_next_switch_handle)
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GTEXT(_k_neg_eagain)
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GTEXT(_is_next_thread_current)
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GTEXT(z_get_next_ready_thread)
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#ifdef CONFIG_INSTRUMENT_THREAD_SWITCHING
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GTEXT(z_thread_mark_switched_in)
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@ -306,110 +300,22 @@ SECTION_FUNC(exception.entry, __irq_wrapper)
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/*
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* Save caller-saved registers on current thread stack.
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* NOTE: need to be updated to account for floating-point registers
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* floating-point registers should be accounted for when corresponding
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* config variable is set
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*/
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STORE_CALLER_SAVED()
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/* Let's quickly figure out why we're here: context switch, IRQ offload,
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* user syscall, forced syscall, IRQ or returning from syscall.
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* Save this information in a0 to guide flow after.
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*/
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/*
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* Check if exception is the result of an interrupt or not.
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* (SOC dependent). Following the RISC-V architecture spec, the MSB
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* of the mcause register is used to indicate whether an exception
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* is the result of an interrupt or an exception/fault. But for some
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* SOCs (like pulpino or riscv-qemu), the MSB is never set to indicate
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* interrupt. Hence, check for interrupt/exception via the __soc_is_irq
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* function (that needs to be implemented by each SOC). The result is
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* returned via register a0 (1: interrupt, 0 exception)
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*/
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jal ra, __soc_is_irq
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bnez a0, dispatch_end
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/* Is our exception an ECALL? From machine or user mode? */
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csrr t0, mcause
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li t1, SOC_MCAUSE_EXP_MASK
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and t0, t1, t0
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li t1, SOC_MCAUSE_ECALL_EXP
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beq t0, t1, dispatch_kernel_syscall
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#ifdef CONFIG_USERSPACE
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li t1, SOC_MCAUSE_USER_ECALL_EXP
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bne t0, t1, dispatch_exception
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li a0, RISCV_IRQ_USER_ECALL
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j dispatch_end
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dispatch_exception:
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#endif
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/* If nothing else, this is an exception */
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li a0, RISCV_IRQ_EXCEPTION
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j dispatch_end
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dispatch_kernel_syscall:
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/* Kernel syscall, it can still be context switch, IRQ offload,
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forced syscall or returning from syscall. */
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#ifdef CONFIG_USERSPACE
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/* Check if it is a return from user syscall */
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csrr t0, mepc
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la t1, z_riscv_do_syscall_start
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bltu t0, t1, dispatch_not_return_from_syscall
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la t1, z_riscv_do_syscall_end
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bgtu t0, t1, dispatch_not_return_from_syscall
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li a0, RISCV_IRQ_RETURN_FROM_SYSCALL
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j dispatch_end
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dispatch_not_return_from_syscall:
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/* Could still be forced syscall. */
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li t0, FORCE_SYSCALL_ID
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bne a7, t0, dispatch_not_forced_syscall
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li a0, RISCV_IRQ_FORCED_SYSCALL
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j dispatch_end
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dispatch_not_forced_syscall:
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#endif /* CONFIG_USERSPACE */
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#ifdef CONFIG_IRQ_OFFLOAD
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/*
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* Determine if the system call is the result of an IRQ offloading.
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* Done by checking if _offload_routine is not pointing to NULL.
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*/
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la t0, _offload_routine
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RV_OP_LOADREG t1, 0x00(t0)
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beqz t1, dispatch_not_irq_offload
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li a0, RISCV_IRQ_OFFLOAD
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j dispatch_end
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dispatch_not_irq_offload:
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#endif
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/* Context switch be it then. */
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li a0, RISCV_IRQ_CONTEXT_SWITCH
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dispatch_end:
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#if defined(CONFIG_FPU) && defined(CONFIG_FPU_SHARING)
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/* Assess whether floating-point registers need to be saved.
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* Note that there's a catch here: if we're performing a
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* context switch, _current is *not* the outgoing thread - that
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* can be found via CONTAINER_OF(a1).
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*/
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li t0, RISCV_IRQ_CONTEXT_SWITCH
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beq a0, t0, store_fp_caller_context_switch
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/* Assess whether floating-point registers need to be saved. */
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GET_CPU(t0, t1)
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RV_OP_LOADREG t0, ___cpu_t_current_OFFSET(t0)
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j store_fp_caller_saved
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store_fp_caller_context_switch:
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RV_OP_LOADREG a1, __z_arch_esf_t_a1_OFFSET(sp)
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addi t0, a1, -___thread_t_switch_handle_OFFSET
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store_fp_caller_saved:
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/* t0 should be the thread to have its context saved */
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RV_OP_LOADREG t0, _thread_offset_to_user_options(t0)
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andi t0, t0, K_FP_REGS
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RV_OP_STOREREG t0, __z_arch_esf_t_fp_state_OFFSET(sp)
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beqz t0, skip_store_fp_caller_saved
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STORE_FP_CALLER_SAVED(sp)
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skip_store_fp_caller_saved:
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#endif /* CONFIG_FPU && CONFIG_FPU_SHARING */
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@ -423,14 +329,8 @@ skip_store_fp_caller_saved:
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#ifdef CONFIG_RISCV_SOC_CONTEXT_SAVE
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/* Handle context saving at SOC level. */
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addi sp, sp, -16
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RV_OP_STOREREG a0, 0x00(sp)
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addi a0, sp, __z_arch_esf_t_soc_context_OFFSET
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jal ra, __soc_save_context
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RV_OP_LOADREG a0, 0x00(sp)
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addi sp, sp, 16
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#endif /* CONFIG_RISCV_SOC_CONTEXT_SAVE */
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#ifdef CONFIG_USERSPACE
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@ -471,9 +371,21 @@ is_priv_sp:
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sb zero, 0x00(t0)
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#endif /* CONFIG_USERSPACE */
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/* Jump to is_interrupt to handle interrupts. */
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li t0, RISCV_IRQ_INTERRUPT
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beq a0, t0, is_interrupt
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/*
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* Check if exception is the result of an interrupt or not.
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* (SOC dependent). Following the RISC-V architecture spec, the MSB
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* of the mcause register is used to indicate whether an exception
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* is the result of an interrupt or an exception/fault. But for some
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* SOCs (like pulpino or riscv-qemu), the MSB is never set to indicate
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* interrupt. Hence, check for interrupt/exception via the __soc_is_irq
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* function (that needs to be implemented by each SOC). The result is
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* returned via register a0 (1: interrupt, 0 exception)
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*/
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jal ra, __soc_is_irq
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/* If a0 != 0, jump to is_interrupt */
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addi t1, x0, 0
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bnez a0, is_interrupt
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#ifdef CONFIG_USERSPACE
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/* Reset IRQ flag */
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@ -481,41 +393,32 @@ is_priv_sp:
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sb zero, 0x00(t1)
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#endif /* CONFIG_USERSPACE */
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li t0, RISCV_IRQ_EXCEPTION
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beq a0, t0, handle_exception
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/*
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* If the exception is the result of an ECALL, check whether to
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* perform a context-switch or an IRQ offload. Otherwise call _Fault
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* to report the exception.
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*/
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csrr t0, mcause
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li t2, SOC_MCAUSE_EXP_MASK
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and t0, t0, t2
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li t1, SOC_MCAUSE_ECALL_EXP
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/*
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* If mcause == SOC_MCAUSE_ECALL_EXP, handle system call from
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* kernel thread.
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*/
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beq t0, t1, is_kernel_syscall
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#ifdef CONFIG_USERSPACE
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li t0, RISCV_IRQ_RETURN_FROM_SYSCALL
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beq a0, t0, return_from_syscall
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li t1, SOC_MCAUSE_USER_ECALL_EXP
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/*
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* If mcause == SOC_MCAUSE_USER_ECALL_EXP, handle system call from
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* user thread, otherwise handle fault.
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*/
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beq t0, t1, is_user_syscall
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#endif /* CONFIG_USERSPACE */
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/* At this point, we're sure to be handling a syscall, which
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* is a result of an ECALL instruction. Increment MEPC to
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* to avoid triggering the same ECALL again when leaving the
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* ISR.
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*
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* It's safe to always increment by 4, even with compressed
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* instructions, because the ecall instruction is always 4 bytes.
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*/
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RV_OP_LOADREG t1, __z_arch_esf_t_mepc_OFFSET(sp)
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addi t1, t1, 4
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RV_OP_STOREREG t1, __z_arch_esf_t_mepc_OFFSET(sp)
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#ifdef CONFIG_USERSPACE
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li t0, RISCV_IRQ_USER_ECALL
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beq a0, t0, is_user_syscall
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#endif
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/* IRQ offload is handled by is_interrupt */
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li t0, RISCV_IRQ_OFFLOAD
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beq a0, t0, is_interrupt
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/* Both forced syscall and context switches are handled by
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* handle_kernel_syscall.
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*/
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j handle_kernel_syscall
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handle_exception:
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/*
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* Call _Fault to handle exception.
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* Stack pointer is pointing to a z_arch_esf_t structure, pass it
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@ -539,8 +442,7 @@ user_fault:
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RV_OP_LOADREG t1, ___cpu_t_current_OFFSET(t0)
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RV_OP_LOADREG t0, _thread_offset_to_priv_stack_start(t1)
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RV_OP_STOREREG sp, _thread_offset_to_user_sp(t1) /* Update user SP */
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li t2, CONFIG_PRIVILEGED_STACK_SIZE
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add sp, t0, t2
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addi sp, t0, CONFIG_PRIVILEGED_STACK_SIZE
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tail _Fault
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supervisor_fault:
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@ -549,7 +451,41 @@ supervisor_fault:
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la ra, no_reschedule
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tail _Fault
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handle_kernel_syscall:
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is_kernel_syscall:
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#ifdef CONFIG_USERSPACE
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/* Check if it is a return from user syscall */
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csrr t0, mepc
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la t1, z_riscv_do_syscall_start
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bltu t0, t1, not_user_syscall
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la t1, z_riscv_do_syscall_end
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bleu t0, t1, return_from_syscall
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not_user_syscall:
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#endif /* CONFIG_USERSPACE */
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/*
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* A syscall is the result of an ecall instruction, in which case the
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* MEPC will contain the address of the ecall instruction.
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* Increment saved MEPC by 4 to prevent triggering the same ecall
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* again upon exiting the ISR.
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*
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* It's safe to always increment by 4, even with compressed
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* instructions, because the ecall instruction is always 4 bytes.
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*/
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RV_OP_LOADREG t0, __z_arch_esf_t_mepc_OFFSET(sp)
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addi t0, t0, 4
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RV_OP_STOREREG t0, __z_arch_esf_t_mepc_OFFSET(sp)
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#ifdef CONFIG_IRQ_OFFLOAD
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/*
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* Determine if the system call is the result of an IRQ offloading.
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* Done by checking if _offload_routine is not pointing to NULL.
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* If NULL, jump to reschedule to perform a context-switch, otherwise,
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* jump to is_interrupt to handle the IRQ offload.
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*/
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la t0, _offload_routine
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RV_OP_LOADREG t1, 0x00(t0)
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bnez t1, is_interrupt
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#endif /* CONFIG_IRQ_OFFLOAD */
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#ifdef CONFIG_PMP_STACK_GUARD
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li t0, MSTATUS_MPRV
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csrs mstatus, t0
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@ -558,7 +494,6 @@ handle_kernel_syscall:
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csrrw sp, mscratch, sp
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csrr t0, mscratch
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addi sp, sp, -__z_arch_esf_t_SIZEOF
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#if defined(CONFIG_FPU) && defined(CONFIG_FPU_SHARING)
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RV_OP_LOADREG t1, __z_arch_esf_t_fp_state_OFFSET(t0)
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beqz t1, skip_fp_move_kernel_syscall
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@ -575,16 +510,16 @@ skip_fp_move_kernel_syscall:
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#ifdef CONFIG_USERSPACE
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/*
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* Check for forced syscall,
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* otherwise go to riscv_switch to handle context-switch
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* otherwise go to reschedule to handle context-switch
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*/
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li t0, FORCE_SYSCALL_ID
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bne a7, t0, riscv_switch
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bne a7, t0, reschedule
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RV_OP_LOADREG a0, __z_arch_esf_t_a0_OFFSET(sp)
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/* Check for user_mode_enter function */
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la t0, arch_user_mode_enter
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bne t0, a0, riscv_switch
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bne t0, a0, reschedule
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RV_OP_LOADREG a0, __z_arch_esf_t_a1_OFFSET(sp)
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RV_OP_LOADREG a1, __z_arch_esf_t_a2_OFFSET(sp)
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@ -599,22 +534,32 @@ skip_fp_move_kernel_syscall:
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j z_riscv_user_mode_enter_syscall
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#endif /* CONFIG_USERSPACE */
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/*
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* Handle context-switch.
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* Go to reschedule to handle context-switch
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*/
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riscv_switch:
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RV_OP_LOADREG a0, __z_arch_esf_t_a0_OFFSET(sp)
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RV_OP_LOADREG a1, __z_arch_esf_t_a1_OFFSET(sp)
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addi t1, a1, -___thread_t_switch_handle_OFFSET
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j do_switch
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j reschedule
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#ifdef CONFIG_USERSPACE
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is_user_syscall:
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#ifdef CONFIG_PMP_STACK_GUARD
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GET_CPU(t0, t1)
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RV_OP_LOADREG a0, ___cpu_t_current_OFFSET(t0)
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jal ra, z_riscv_configure_stack_guard
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#endif /* CONFIG_PMP_STACK_GUARD */
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/*
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* A syscall is the result of an ecall instruction, in which case the
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* MEPC will contain the address of the ecall instruction.
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* Increment saved MEPC by 4 to prevent triggering the same ecall
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* again upon exiting the ISR.
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*
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* It is safe to always increment by 4, even with compressed
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* instructions, because the ecall instruction is always 4 bytes.
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*/
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RV_OP_LOADREG t1, __z_arch_esf_t_mepc_OFFSET(sp)
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addi t1, t1, 4
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RV_OP_STOREREG t1, __z_arch_esf_t_mepc_OFFSET(sp)
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#ifdef CONFIG_PMP_STACK_GUARD
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/*
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* Copy ESF to user stack in case of rescheduling
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* directly from kernel ECALL (nested ECALL)
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@ -646,8 +591,7 @@ skip_fp_copy_user_syscall:
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RV_OP_LOADREG t1, ___cpu_t_current_OFFSET(t0)
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RV_OP_LOADREG t0, _thread_offset_to_priv_stack_start(t1)
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RV_OP_STOREREG sp, _thread_offset_to_user_sp(t1) /* Update user SP */
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li t2, CONFIG_PRIVILEGED_STACK_SIZE
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add sp, t0, t2
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addi sp, t0, CONFIG_PRIVILEGED_STACK_SIZE
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/* validate syscall limit */
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li t0, K_SYSCALL_LIMIT
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@ -750,10 +694,10 @@ on_irq_stack:
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#ifdef CONFIG_IRQ_OFFLOAD
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/*
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* Are we here to perform IRQ offloading?
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* If we are here due to a system call, t1 register should != 0.
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* In this case, perform IRQ offloading, otherwise jump to call_irq
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*/
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li t0, RISCV_IRQ_OFFLOAD
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bne a0, t0, call_irq
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beqz t1, call_irq
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/*
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* Call z_irq_do_offload to handle IRQ offloading.
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@ -814,51 +758,31 @@ on_thread_stack:
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#ifdef CONFIG_STACK_SENTINEL
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call z_check_stack_sentinel
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GET_CPU(t1, t2)
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#endif
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reschedule:
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/* Get next thread to run and switch to it - or not, if the same */
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GET_CPU(t0, t1)
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RV_OP_LOADREG t1, ___cpu_t_current_OFFSET(t0)
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addi sp, sp, -16
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RV_OP_STOREREG t1, 0x00(sp)
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||||
#ifdef CONFIG_SMP
|
||||
/* Send NULL so this function doesn't mark outgoing thread
|
||||
* as available for pickup by another CPU. The catch: it will
|
||||
* also return NULL. But luckily, it will update _current.
|
||||
#ifdef CONFIG_PREEMPT_ENABLED
|
||||
/*
|
||||
* Check if we need to perform a reschedule
|
||||
*/
|
||||
li a0, 0
|
||||
call z_get_next_switch_handle
|
||||
GET_CPU(t0, t1)
|
||||
RV_OP_LOADREG a0, ___cpu_t_current_OFFSET(t0)
|
||||
|
||||
/* Get pointer to _current_cpu.current */
|
||||
RV_OP_LOADREG t2, ___cpu_t_current_OFFSET(t1)
|
||||
|
||||
/*
|
||||
* Check if next thread to schedule is current thread.
|
||||
* If yes do not perform a reschedule
|
||||
*/
|
||||
RV_OP_LOADREG t3, _kernel_offset_to_ready_q_cache(t1)
|
||||
beq t3, t2, no_reschedule
|
||||
#else
|
||||
mv a0, t1
|
||||
call z_get_next_switch_handle
|
||||
#endif
|
||||
|
||||
RV_OP_LOADREG t1, 0x00(sp)
|
||||
addi sp, sp, 16
|
||||
|
||||
/* From now on, t1 is the outgoing thread */
|
||||
beq a0, t1, no_reschedule
|
||||
mv a1, x0
|
||||
j no_reschedule
|
||||
#endif /* CONFIG_PREEMPT_ENABLED */
|
||||
|
||||
#ifdef CONFIG_PMP_STACK_GUARD
|
||||
addi sp, sp, -32
|
||||
RV_OP_STOREREG a0, 0x00(sp)
|
||||
RV_OP_STOREREG a1, 0x08(sp)
|
||||
RV_OP_STOREREG t1, 0x10(sp)
|
||||
|
||||
GET_CPU(t2, t3)
|
||||
mv a0, t1
|
||||
RV_OP_LOADREG a0, ___cpu_t_current_OFFSET(t1)
|
||||
jal ra, z_riscv_configure_stack_guard
|
||||
|
||||
RV_OP_LOADREG a0, 0x00(sp)
|
||||
RV_OP_LOADREG a1, 0x08(sp)
|
||||
RV_OP_LOADREG t1, 0x10(sp)
|
||||
addi sp, sp, 32
|
||||
/*
|
||||
* Move to saved SP and move ESF to retrieve it
|
||||
* after reschedule.
|
||||
|
|
@ -867,13 +791,13 @@ reschedule:
|
|||
csrr t0, mscratch
|
||||
addi sp, sp, -__z_arch_esf_t_SIZEOF
|
||||
#if defined(CONFIG_FPU) && defined(CONFIG_FPU_SHARING)
|
||||
RV_OP_LOADREG t2, __z_arch_esf_t_fp_state_OFFSET(t0)
|
||||
beqz t2, skip_fp_move_irq
|
||||
COPY_ESF_FP(sp, t0, t2)
|
||||
RV_OP_LOADREG t1, __z_arch_esf_t_fp_state_OFFSET(t0)
|
||||
beqz t1, skip_fp_move_irq
|
||||
COPY_ESF_FP(sp, t0, t1)
|
||||
skip_fp_move_irq:
|
||||
COPY_ESF_FP_STATE(sp, t0, t2)
|
||||
COPY_ESF_FP_STATE(sp, t0, t1)
|
||||
#endif /* CONFIG_FPU && CONFIG_FPU_SHARING */
|
||||
COPY_ESF(sp, t0, t2)
|
||||
COPY_ESF(sp, t0, t1)
|
||||
addi t0, t0, __z_arch_esf_t_SIZEOF
|
||||
csrw mscratch, t0
|
||||
#endif /* CONFIG_PMP_STACK_GUARD */
|
||||
|
|
@ -881,33 +805,48 @@ skip_fp_move_irq:
|
|||
#ifdef CONFIG_USERSPACE
|
||||
/* Check if we are in user thread */
|
||||
WAS_NOT_USER(t3, t4)
|
||||
bnez t3, do_switch
|
||||
bnez t3, reschedule
|
||||
|
||||
/*
|
||||
* Switch to privilege stack because we want
|
||||
* this starting point after reschedule.
|
||||
*/
|
||||
RV_OP_LOADREG t2, _thread_offset_to_priv_stack_start(t1)
|
||||
RV_OP_STOREREG sp, _thread_offset_to_user_sp(t1) /* Save user SP */
|
||||
RV_OP_LOADREG t3, _thread_offset_to_priv_stack_start(t2)
|
||||
RV_OP_STOREREG sp, _thread_offset_to_user_sp(t2) /* Save user SP */
|
||||
mv t0, sp
|
||||
li t3, CONFIG_PRIVILEGED_STACK_SIZE
|
||||
add sp, t2, t3
|
||||
addi sp, t3, CONFIG_PRIVILEGED_STACK_SIZE
|
||||
|
||||
/*
|
||||
* Copy Saved ESF to priv stack, that will allow us to know during
|
||||
* rescheduling if the thread was working on user mode.
|
||||
*/
|
||||
addi sp, sp, -__z_arch_esf_t_SIZEOF
|
||||
COPY_ESF(sp, t0, t2)
|
||||
COPY_ESF(sp, t0, t1)
|
||||
|
||||
#endif /* CONFIG_USERSPACE */
|
||||
|
||||
do_switch:
|
||||
/* Expectations:
|
||||
* a0: handle for next thread
|
||||
* a1: address of handle for outgoing thread or 0, if not handling arch_switch
|
||||
* t1: k_thread for outgoing thread
|
||||
reschedule:
|
||||
/*
|
||||
* Check if the current thread is the same as the thread on the ready Q. If
|
||||
* so, do not reschedule.
|
||||
* Note:
|
||||
* Sometimes this code is execute back-to-back before the target thread
|
||||
* has a chance to run. If this happens, the current thread and the
|
||||
* target thread will be the same.
|
||||
*/
|
||||
GET_CPU(t0, t1)
|
||||
RV_OP_LOADREG t2, ___cpu_t_current_OFFSET(t0)
|
||||
RV_OP_LOADREG t3, _kernel_offset_to_ready_q_cache(t0)
|
||||
beq t2, t3, no_reschedule_resched
|
||||
|
||||
#if CONFIG_INSTRUMENT_THREAD_SWITCHING
|
||||
call z_thread_mark_switched_out
|
||||
#endif
|
||||
/* Get reference to current CPU */
|
||||
GET_CPU(t0, t1)
|
||||
|
||||
/* Get pointer to current thread */
|
||||
RV_OP_LOADREG t1, ___cpu_t_current_OFFSET(t0)
|
||||
|
||||
#ifdef CONFIG_USERSPACE
|
||||
/*
|
||||
|
|
@ -944,34 +883,25 @@ skip_callee_saved_reg:
|
|||
li t3, CONFIG_ISR_STACK_SIZE
|
||||
add t2, t2, t3
|
||||
csrw mscratch, t2
|
||||
|
||||
#endif /* CONFIG_PMP_STACK_GUARD */
|
||||
|
||||
/* Save stack pointer of current thread. */
|
||||
/*
|
||||
* Save stack pointer of current thread and set the default return value
|
||||
* of z_swap to _k_neg_eagain for the thread.
|
||||
*/
|
||||
RV_OP_STOREREG sp, _thread_offset_to_sp(t1)
|
||||
la t2, _k_neg_eagain
|
||||
lw t3, 0x00(t2)
|
||||
sw t3, _thread_offset_to_swap_return_value(t1)
|
||||
|
||||
/* Get next thread to schedule. */
|
||||
RV_OP_LOADREG t1, _kernel_offset_to_ready_q_cache(t0)
|
||||
|
||||
/*
|
||||
* Current thread is saved. If a1 != 0, we're coming from riscv_switch
|
||||
* and need to update switched_from, as it's a synchronization signal
|
||||
* that old thread is saved.
|
||||
* Set _current_cpu.current to new thread loaded in t1
|
||||
*/
|
||||
beqz a1, clear_old_thread_switch_handle
|
||||
addi t2, a1, -___thread_t_switch_handle_OFFSET
|
||||
RV_OP_STOREREG t2, 0x00(a1)
|
||||
j load_new_thread
|
||||
|
||||
clear_old_thread_switch_handle:
|
||||
#ifdef CONFIG_SMP
|
||||
/* Signal that old thread can be picked up by any CPU to be run again */
|
||||
RV_OP_STOREREG t1, ___thread_t_switch_handle_OFFSET(t1)
|
||||
#endif
|
||||
|
||||
load_new_thread:
|
||||
/*
|
||||
* At this point, a0 contains the new thread. Set
|
||||
* t0 to be current CPU and t1 to be the new thread.
|
||||
*/
|
||||
GET_CPU(t0, t1)
|
||||
mv t1, a0
|
||||
RV_OP_STOREREG t1, ___cpu_t_current_OFFSET(t0)
|
||||
|
||||
/* Switch to new thread stack */
|
||||
RV_OP_LOADREG sp, _thread_offset_to_sp(t1)
|
||||
|
|
|
|||
|
|
@ -10,24 +10,49 @@
|
|||
#include <arch/cpu.h>
|
||||
|
||||
/* exports */
|
||||
GTEXT(arch_switch)
|
||||
GTEXT(arch_swap)
|
||||
GTEXT(z_thread_entry_wrapper)
|
||||
|
||||
/* Use ABI name of registers for the sake of simplicity */
|
||||
|
||||
/*
|
||||
* void arch_switch(void *switch_to, void **switched_from);
|
||||
* unsigned int arch_swap(unsigned int key)
|
||||
*
|
||||
* Always called with interrupts locked
|
||||
*
|
||||
* a0 = (struct k_thread *) switch_to
|
||||
* a1 = (struct k_thread **) address of output thread switch_handle field
|
||||
* key is stored in a0 register
|
||||
*/
|
||||
SECTION_FUNC(exception.other, arch_switch)
|
||||
SECTION_FUNC(exception.other, arch_swap)
|
||||
|
||||
/* Make a system call to perform context switch */
|
||||
ecall
|
||||
|
||||
/*
|
||||
* when thread is rescheduled, unlock irq and return.
|
||||
* Restored register a0 contains IRQ lock state of thread.
|
||||
*
|
||||
* Prior to unlocking irq, load return value of
|
||||
* arch_swap to temp register t2 (from
|
||||
* _thread_offset_to_swap_return_value). Normally, it should be -EAGAIN,
|
||||
* unless someone has previously called arch_thread_return_value_set(..).
|
||||
*/
|
||||
la t0, _kernel
|
||||
|
||||
/* Get pointer to _kernel.current */
|
||||
RV_OP_LOADREG t1, _kernel_offset_to_current(t0)
|
||||
|
||||
/* Load return value of arch_swap function in temp register t2 */
|
||||
lw t2, _thread_offset_to_swap_return_value(t1)
|
||||
|
||||
/*
|
||||
* Unlock irq, following IRQ lock state in a0 register.
|
||||
* Use atomic instruction csrrs to do so.
|
||||
*/
|
||||
andi a0, a0, MSTATUS_IEN
|
||||
csrrs t0, mstatus, a0
|
||||
|
||||
/* Set value of return register a0 to value of register t2 */
|
||||
addi a0, t2, 0
|
||||
|
||||
/* Return */
|
||||
ret
|
||||
|
||||
|
|
@ -38,7 +63,7 @@ SECTION_FUNC(exception.other, arch_switch)
|
|||
SECTION_FUNC(TEXT, z_thread_entry_wrapper)
|
||||
/*
|
||||
* z_thread_entry_wrapper is called for every new thread upon the return
|
||||
* of arch_switch or ISR. Its address, as well as its input function
|
||||
* of arch_swap or ISR. Its address, as well as its input function
|
||||
* arguments thread_entry_t, void *, void *, void * are restored from
|
||||
* the thread stack (initialized via function _thread).
|
||||
* In this case, thread_entry_t, * void *, void * and void * are stored
|
||||
|
|
@ -127,7 +127,6 @@ void arch_new_thread(struct k_thread *thread, k_thread_stack_t *stack,
|
|||
#endif
|
||||
|
||||
thread->callee_saved.sp = (ulong_t)stack_init;
|
||||
thread->switch_handle = thread;
|
||||
}
|
||||
|
||||
#if defined(CONFIG_FPU) && defined(CONFIG_FPU_SHARING)
|
||||
|
|
|
|||
|
|
@ -34,7 +34,11 @@ static ALWAYS_INLINE void arch_kernel_init(void)
|
|||
#endif
|
||||
}
|
||||
|
||||
void arch_switch(void *switch_to, void **switched_from);
|
||||
static ALWAYS_INLINE void
|
||||
arch_thread_return_value_set(struct k_thread *thread, unsigned int value)
|
||||
{
|
||||
thread->arch.swap_return_value = value;
|
||||
}
|
||||
|
||||
FUNC_NORETURN void z_riscv_fatal_error(unsigned int reason,
|
||||
const z_arch_esf_t *esf);
|
||||
|
|
|
|||
Loading…
Add table
Add a link
Reference in a new issue