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all: Update reserved function names

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Update reserved function names starting with one underscore, replacing
them as follows:
   '_k_' with 'z_'
   '_K_' with 'Z_'
   '_handler_' with 'z_handl_'
   '_Cstart' with 'z_cstart'
   '_Swap' with 'z_swap'

This renaming is done on both global and those static function names
in kernel/include and include/. Other static function names in kernel/
are renamed by removing the leading underscore. Other function names
not starting with any prefix listed above are renamed starting with
a 'z_' or 'Z_' prefix.

Function names starting with two or three leading underscores are not
automatcally renamed since these names will collide with the variants
with two or three leading underscores.

Various generator scripts have also been updated as well as perf,
linker and usb files. These are
   drivers/serial/uart_handlers.c
   include/linker/kobject-text.ld
   kernel/include/syscall_handler.h
   scripts/gen_kobject_list.py
   scripts/gen_syscall_header.py

Signed-off-by: Patrik Flykt <patrik.flykt@intel.com>
This commit is contained in:
Patrik Flykt 2019-03-08 14:19:05 -07:00 • committed by Anas Nashif
commit 4344e27c26
324 changed files with 2264 additions and 2263 deletions
Download patch file Download diff file Expand all files Collapse all files

2
soc/xtensa/esp32/esp32-mp.c
View file

@ -190,7 +190,7 @@ static void appcpu_start(void)
smp_log("ESP32: APPCPU start sequence complete");
}
void _arch_start_cpu(int cpu_num, k_thread_stack_t *stack, int sz,
void z_arch_start_cpu(int cpu_num, k_thread_stack_t *stack, int sz,
void (*fn)(int, void *), void *arg)
{
volatile struct cpustart_rec sr;

4
soc/xtensa/esp32/soc.c
View file

@ -16,7 +16,7 @@
#include <toolchain/gcc.h>
#include <zephyr/types.h>
extern void _Cstart(void);
extern void z_cstart(void);
/*
* This is written in C rather than assembly since, during the port bring up,
@ -70,7 +70,7 @@ void __attribute__((section(".iram1"))) __start(void)
/* Start Zephyr */
_Cstart();
z_cstart();
CODE_UNREACHABLE;
}

14
soc/xtensa/intel_s1000/soc.c
View file

@ -19,7 +19,7 @@ LOG_MODULE_REGISTER(soc);
static u32_t ref_clk_freq;
void _soc_irq_enable(u32_t irq)
void z_soc_irq_enable(u32_t irq)
{
struct device *dev_cavs, *dev_ictl;
@ -38,7 +38,7 @@ void _soc_irq_enable(u32_t irq)
break;
default:
/* regular interrupt */
_xtensa_irq_enable(XTENSA_IRQ_NUMBER(irq));
z_xtensa_irq_enable(XTENSA_IRQ_NUMBER(irq));
return;
}
@ -50,7 +50,7 @@ void _soc_irq_enable(u32_t irq)
/* If the control comes here it means the specified interrupt
* is in either CAVS interrupt logic or DW interrupt controller
*/
_xtensa_irq_enable(XTENSA_IRQ_NUMBER(irq));
z_xtensa_irq_enable(XTENSA_IRQ_NUMBER(irq));
switch (CAVS_IRQ_NUMBER(irq)) {
case DW_ICTL_IRQ_CAVS_OFFSET:
@ -78,7 +78,7 @@ void _soc_irq_enable(u32_t irq)
irq_enable_next_level(dev_ictl, INTR_CNTL_IRQ_NUM(irq));
}
void _soc_irq_disable(u32_t irq)
void z_soc_irq_disable(u32_t irq)
{
struct device *dev_cavs, *dev_ictl;
@ -97,7 +97,7 @@ void _soc_irq_disable(u32_t irq)
break;
default:
/* regular interrupt */
_xtensa_irq_disable(XTENSA_IRQ_NUMBER(irq));
z_xtensa_irq_disable(XTENSA_IRQ_NUMBER(irq));
return;
}
@ -120,7 +120,7 @@ void _soc_irq_disable(u32_t irq)
/* Disable the parent IRQ if all children are disabled */
if (!irq_is_enabled_next_level(dev_cavs)) {
_xtensa_irq_disable(XTENSA_IRQ_NUMBER(irq));
z_xtensa_irq_disable(XTENSA_IRQ_NUMBER(irq));
}
return;
}
@ -142,7 +142,7 @@ void _soc_irq_disable(u32_t irq)
irq_disable_next_level(dev_cavs, CAVS_IRQ_NUMBER(irq));
if (!irq_is_enabled_next_level(dev_cavs)) {
_xtensa_irq_disable(XTENSA_IRQ_NUMBER(irq));
z_xtensa_irq_disable(XTENSA_IRQ_NUMBER(irq));
}
}
}

4
soc/xtensa/intel_s1000/soc.h
View file

@ -210,8 +210,8 @@ struct soc_global_regs {
#define SOC_DCACHE_INVALIDATE(addr, size) \
xthal_dcache_region_invalidate((addr), (size))
extern void _soc_irq_enable(u32_t irq);
extern void _soc_irq_disable(u32_t irq);
extern void z_soc_irq_enable(u32_t irq);
extern void z_soc_irq_disable(u32_t irq);
extern u32_t soc_get_ref_clk_freq(void);