From 431da79dfa564b7f716f4b57bd377f16a6e7c70d Mon Sep 17 00:00:00 2001 From: Fabiola Kwasowiec Date: Thu, 7 Dec 2023 16:29:10 +0100 Subject: [PATCH] hda: separation of l1 settings to new function Separating two new functions force and allow l1 to have the current state with separated functions in the ipc file so that SOF can call these functions via IPC DMI_FORCE_L1_EXIT. Change related to the addition of a new parameter to force DMI L1 exit on IPC request. Signed-off-by: Fabiola Kwasowiec --- drivers/dma/dma_intel_adsp_hda.c | 8 ++------ .../intel_adsp/common/include/intel_adsp_hda.h | 15 +++++++++++++++ 2 files changed, 17 insertions(+), 6 deletions(-) diff --git a/drivers/dma/dma_intel_adsp_hda.c b/drivers/dma/dma_intel_adsp_hda.c index 2dd0bea6ed6..7a131db2216 100644 --- a/drivers/dma/dma_intel_adsp_hda.c +++ b/drivers/dma/dma_intel_adsp_hda.c @@ -176,9 +176,7 @@ int intel_adsp_hda_dma_host_reload(const struct device *dev, uint32_t channel, __ASSERT(channel < cfg->dma_channels, "Channel does not exist"); #if CONFIG_DMA_INTEL_ADSP_HDA_TIMING_L1_EXIT -#if CONFIG_SOC_SERIES_INTEL_ACE - ACE_DfPMCCH.svcfg |= ADSP_FORCE_DECOUPLED_HDMA_L1_EXIT_BIT; -#endif + intel_adsp_force_dmi_l0_state(); switch (cfg->direction) { case HOST_TO_MEMORY: ; /* Only statements can be labeled in C, a declaration is not valid */ @@ -458,9 +456,7 @@ void intel_adsp_hda_dma_isr(void) } if (clear_l1_exit) { -#if CONFIG_SOC_SERIES_INTEL_ACE - ACE_DfPMCCH.svcfg &= ~(ADSP_FORCE_DECOUPLED_HDMA_L1_EXIT_BIT); -#endif + intel_adsp_allow_dmi_l1_state(); } #endif } diff --git a/soc/xtensa/intel_adsp/common/include/intel_adsp_hda.h b/soc/xtensa/intel_adsp/common/include/intel_adsp_hda.h index 2b403eb17a4..9a123a71b15 100644 --- a/soc/xtensa/intel_adsp/common/include/intel_adsp_hda.h +++ b/soc/xtensa/intel_adsp/common/include/intel_adsp_hda.h @@ -10,6 +10,7 @@ #include #include #include +#include /** * @brief HDA stream functionality for Intel ADSP @@ -441,6 +442,20 @@ static inline void intel_adsp_hda_disable_buffer_interrupt(uint32_t base, uint32 *DGCS(base, regblock_size, sid) &= ~DGCS_BSCIE; } +static inline void intel_adsp_force_dmi_l0_state(void) +{ +#ifdef CONFIG_SOC_SERIES_INTEL_ACE + ACE_DfPMCCH.svcfg |= ADSP_FORCE_DECOUPLED_HDMA_L1_EXIT_BIT; +#endif +} + +static inline void intel_adsp_allow_dmi_l1_state(void) +{ +#ifdef CONFIG_SOC_SERIES_INTEL_ACE + ACE_DfPMCCH.svcfg &= ~(ADSP_FORCE_DECOUPLED_HDMA_L1_EXIT_BIT); +#endif +} + /** * @brief Clear BSC interrupt *