soc: nxp: consolidate nxp port pinctrl headers
NXP PORT IP instantiations often have different features absent, IE input buffer, open drain, or slew rate support. Check if the relevant PCR register bitmasks are defined in the common pin control file, and define the bitmasks to 0x0 (no effect) if they are not. This allows us to further consolidate the pinctrl_soc.h headers for SOCs using the PORT IP. Signed-off-by: Daniel DeGrasse <daniel.degrasse@nxp.com>
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8 changed files with 39 additions and 162 deletions
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* SPDX-License-Identifier: Apache-2.0
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*/
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#include <zephyr/drivers/pinctrl/pinctrl_soc_kinetis_common.h>
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#include <zephyr/drivers/pinctrl/pinctrl_nxp_port_common.h>
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* SPDX-License-Identifier: Apache-2.0
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*/
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#include <zephyr/drivers/pinctrl/pinctrl_soc_kinetis_common.h>
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#include <zephyr/drivers/pinctrl/pinctrl_nxp_port_common.h>
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* SPDX-License-Identifier: Apache-2.0
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*/
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#ifndef ZEPHYR_SOC_ARM_NXP_MCXC_COMMON_PINCTRL_SOC_H_
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#define ZEPHYR_SOC_ARM_NXP_MCXC_COMMON_PINCTRL_SOC_H_
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#include <zephyr/devicetree.h>
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#include <zephyr/types.h>
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#ifdef __cplusplus
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extern "C" {
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#endif
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typedef uint32_t pinctrl_soc_pin_t;
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/* MCXC series does not support open drain. Define macros to have no effect */
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#define PORT_PCR_ODE(x) 0x0
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#define PORT_PCR_ODE_MASK 0x0
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#define Z_PINCTRL_MCXC_PINCFG(node_id) \
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(PORT_PCR_DSE(DT_ENUM_IDX(node_id, drive_strength)) | \
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PORT_PCR_PS(DT_PROP(node_id, bias_pull_up)) | \
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PORT_PCR_PE(DT_PROP(node_id, bias_pull_up)) | \
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PORT_PCR_PE(DT_PROP(node_id, bias_pull_down)) | \
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PORT_PCR_ODE(DT_PROP(node_id, drive_open_drain)) | \
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PORT_PCR_SRE(DT_ENUM_IDX(node_id, slew_rate)) | \
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PORT_PCR_PFE(DT_PROP(node_id, nxp_passive_filter)))
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#define Z_PINCTRL_KINETIS_PCR_MASK \
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(PORT_PCR_MUX_MASK | PORT_PCR_DSE_MASK | PORT_PCR_ODE_MASK | \
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PORT_PCR_PFE_MASK | PORT_PCR_SRE_MASK | PORT_PCR_PE_MASK | \
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PORT_PCR_PS_MASK)
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#define Z_PINCTRL_STATE_PIN_INIT(group, pin_prop, idx) \
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DT_PROP_BY_IDX(group, pin_prop, idx) | Z_PINCTRL_MCXC_PINCFG(group),
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#define Z_PINCTRL_STATE_PINS_INIT(node_id, prop) \
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{DT_FOREACH_CHILD_VARGS(DT_PHANDLE(node_id, prop), \
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DT_FOREACH_PROP_ELEM, pinmux, Z_PINCTRL_STATE_PIN_INIT)};
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#ifdef __cplusplus
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}
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#endif
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#endif /* ZEPHYR_SOC_ARM_NXP_MCXC_COMMON_PINCTRL_SOC_H_ */
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#include <zephyr/drivers/pinctrl/pinctrl_nxp_port_common.h>
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* SPDX-License-Identifier: Apache-2.0
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*/
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#ifndef ZEPHYR_SOC_ARM_NXP_MCX_COMMON_PINCTRL_SOC_H_
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#define ZEPHYR_SOC_ARM_NXP_MCX_COMMON_PINCTRL_SOC_H_
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#include <zephyr/devicetree.h>
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#include <zephyr/types.h>
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#ifdef __cplusplus
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extern "C" {
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#endif
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typedef uint32_t pinctrl_soc_pin_t;
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#define Z_PINCTRL_MCX_PINCFG(node_id) \
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(PORT_PCR_DSE(DT_ENUM_IDX(node_id, drive_strength)) | \
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PORT_PCR_PS(DT_PROP(node_id, bias_pull_up)) | \
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PORT_PCR_PE(DT_PROP(node_id, bias_pull_up)) | \
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PORT_PCR_PE(DT_PROP(node_id, bias_pull_down)) | \
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PORT_PCR_ODE(DT_PROP(node_id, drive_open_drain)) | \
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PORT_PCR_SRE(DT_ENUM_IDX(node_id, slew_rate)) | \
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PORT_PCR_IBE(DT_PROP(node_id, input_enable)) | \
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PORT_PCR_PFE(DT_PROP(node_id, nxp_passive_filter)))
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#define Z_PINCTRL_KINETIS_PCR_MASK \
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(PORT_PCR_IBE_MASK | PORT_PCR_MUX_MASK | PORT_PCR_DSE_MASK | \
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PORT_PCR_ODE_MASK | PORT_PCR_PFE_MASK | PORT_PCR_SRE_MASK | \
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PORT_PCR_PE_MASK | PORT_PCR_PS_MASK)
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#define Z_PINCTRL_STATE_PIN_INIT(group, pin_prop, idx) \
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DT_PROP_BY_IDX(group, pin_prop, idx) | Z_PINCTRL_MCX_PINCFG(group),
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#define Z_PINCTRL_STATE_PINS_INIT(node_id, prop) \
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{DT_FOREACH_CHILD_VARGS(DT_PHANDLE(node_id, prop), \
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DT_FOREACH_PROP_ELEM, pinmux, Z_PINCTRL_STATE_PIN_INIT)};
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#ifdef __cplusplus
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}
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#endif
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#endif /* ZEPHYR_SOC_ARM_NXP_MCX_COMMON_PINCTRL_SOC_H_ */
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#include <zephyr/drivers/pinctrl/pinctrl_nxp_port_common.h>
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* SPDX-License-Identifier: Apache-2.0
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*/
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#include <zephyr/drivers/pinctrl/pinctrl_soc_kinetis_common.h>
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#include <zephyr/drivers/pinctrl/pinctrl_nxp_port_common.h>
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/*
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* Copyright 2023 NXP
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* Copyright 2023-2024 NXP
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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/*
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* @file
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* NXP S32K1 SOC specific helpers for pinctrl driver
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*/
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#ifndef ZEPHYR_SOC_ARM_NXP_S32_S32K1_PINCTRL_SOC_H_
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#define ZEPHYR_SOC_ARM_NXP_S32_S32K1_PINCTRL_SOC_H_
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#include <zephyr/devicetree.h>
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#include <zephyr/types.h>
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#ifdef __cplusplus
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extern "C" {
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#endif
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/** @cond INTERNAL_HIDDEN */
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typedef uint32_t pinctrl_soc_pin_t;
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#define Z_PINCTRL_KINETIS_PINCFG(node_id) \
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(PORT_PCR_DSE(DT_ENUM_IDX(node_id, drive_strength)) | \
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PORT_PCR_PS(DT_PROP(node_id, bias_pull_up)) | \
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PORT_PCR_PE(DT_PROP(node_id, bias_pull_up)) | \
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PORT_PCR_PE(DT_PROP(node_id, bias_pull_down)) | \
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PORT_PCR_PFE(DT_PROP(node_id, nxp_passive_filter)))
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#define Z_PINCTRL_KINETIS_PCR_MASK \
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(PORT_PCR_MUX_MASK | PORT_PCR_DSE_MASK | PORT_PCR_PFE_MASK | \
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PORT_PCR_PE_MASK | PORT_PCR_PS_MASK)
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#define Z_PINCTRL_STATE_PIN_INIT(group, pin_prop, idx) \
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DT_PROP_BY_IDX(group, pin_prop, idx) | Z_PINCTRL_KINETIS_PINCFG(group),
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#define Z_PINCTRL_STATE_PINS_INIT(node_id, prop) \
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{DT_FOREACH_CHILD_VARGS(DT_PHANDLE(node_id, prop), \
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DT_FOREACH_PROP_ELEM, pinmux, Z_PINCTRL_STATE_PIN_INIT)};
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#ifdef __cplusplus
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}
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#endif
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#endif /* ZEPHYR_SOC_ARM_NXP_S32_S32K1_PINCTRL_SOC_H_ */
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#include <zephyr/drivers/pinctrl/pinctrl_nxp_port_common.h>
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