dts: arm: st: add STM32L451
Add the MCU STM32L451. Signed-off-by: Benedikt Schmidt <benedikt.schmidt@embedded-solutions.at>
This commit is contained in:
Benedikt Schmidt
Fabio Baltieri
parent
e153c0ece9
commit
42051fc2d4
6 changed files with 228 additions and 154 deletions
166
dts/arm/st/l4/stm32l451.dtsi
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166
dts/arm/st/l4/stm32l451.dtsi
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@ -0,0 +1,166 @@
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/*
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* Copyright (c) 2023 SILA Embedded Solutions GmbH
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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#include <st/l4/stm32l4.dtsi>
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/ {
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soc {
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compatible = "st,stm32l451", "st,stm32l4", "simple-bus";
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clocks {
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clk_hsi48: clk-hsi48 {
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#clock-cells = <0>;
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compatible = "fixed-clock";
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clock-frequency = <DT_FREQ_M(48)>;
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status = "disabled";
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};
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};
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pinctrl: pin-controller@48000000 {
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gpiod: gpio@48000c00 {
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compatible = "st,stm32-gpio";
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gpio-controller;
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#gpio-cells = <2>;
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reg = <0x48000c00 0x400>;
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clocks = <&rcc STM32_CLOCK_BUS_AHB2 0x00000008>;
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};
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gpioe: gpio@48001000 {
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compatible = "st,stm32-gpio";
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gpio-controller;
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#gpio-cells = <2>;
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reg = <0x48001000 0x400>;
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clocks = <&rcc STM32_CLOCK_BUS_AHB2 0x00000010>;
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};
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};
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rng: rng@50060800 {
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clocks = <&rcc STM32_CLOCK_BUS_AHB2 0x00040000>,
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<&rcc STM32_SRC_HSI48 CLK48_SEL(0)>;
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};
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i2c2: i2c@40005800 {
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compatible = "st,stm32-i2c-v2";
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clock-frequency = <I2C_BITRATE_STANDARD>;
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#address-cells = <1>;
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#size-cells = <0>;
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reg = <0x40005800 0x400>;
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clocks = <&rcc STM32_CLOCK_BUS_APB1 0x00400000>;
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interrupts = <33 0>, <34 0>;
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interrupt-names = "event", "error";
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status = "disabled";
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};
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i2c4: i2c@40008400 {
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compatible = "st,stm32-i2c-v2";
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clock-frequency = <I2C_BITRATE_STANDARD>;
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#address-cells = <1>;
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#size-cells = <0>;
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reg = <0x40008400 0x400>;
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clocks = <&rcc STM32_CLOCK_BUS_APB1_2 0x00000002>;
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interrupts = <83 0>, <84 0>;
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interrupt-names = "event", "error";
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status = "disabled";
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};
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spi2: spi@40003800 {
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compatible = "st,stm32-spi-fifo", "st,stm32-spi";
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#address-cells = <1>;
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#size-cells = <0>;
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reg = <0x40003800 0x400>;
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clocks = <&rcc STM32_CLOCK_BUS_APB1 0x00004000>;
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interrupts = <36 5>;
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status = "disabled";
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};
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spi3: spi@40003c00 {
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compatible = "st,stm32-spi-fifo", "st,stm32-spi";
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#address-cells = <1>;
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#size-cells = <0>;
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reg = <0x40003c00 0x400>;
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clocks = <&rcc STM32_CLOCK_BUS_APB1 0x00008000>;
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interrupts = <51 5>;
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status = "disabled";
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};
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usart3: serial@40004800 {
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compatible = "st,stm32-usart", "st,stm32-uart";
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reg = <0x40004800 0x400>;
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clocks = <&rcc STM32_CLOCK_BUS_APB1 0x00040000>;
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resets = <&rctl STM32_RESET(APB1L, 18U)>;
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interrupts = <39 0>;
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status = "disabled";
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};
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uart4: serial@40004c00 {
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compatible = "st,stm32-uart";
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reg = <0x40004c00 0x400>;
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clocks = <&rcc STM32_CLOCK_BUS_APB1 0x00080000>;
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resets = <&rctl STM32_RESET(APB1L, 19U)>;
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interrupts = <52 0>;
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status = "disabled";
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};
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timers3: timers@40000400 {
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compatible = "st,stm32-timers";
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reg = <0x40000400 0x400>;
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clocks = <&rcc STM32_CLOCK_BUS_APB1 0x00000002>;
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resets = <&rctl STM32_RESET(APB1L, 1U)>;
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interrupts = <29 0>;
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interrupt-names = "global";
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st,prescaler = <0>;
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status = "disabled";
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pwm {
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compatible = "st,stm32-pwm";
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status = "disabled";
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#pwm-cells = <3>;
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};
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counter {
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compatible = "st,stm32-counter";
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status = "disabled";
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};
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};
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dac1: dac@40007400 {
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compatible = "st,stm32-dac";
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reg = <0x40007400 0x400>;
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clocks = <&rcc STM32_CLOCK_BUS_APB1 0x20000000>;
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status = "disabled";
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#io-channel-cells = <1>;
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};
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can1: can@40006400 {
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compatible = "st,stm32-can";
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reg = <0x40006400 0x400>;
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interrupts = <19 0>, <20 0>, <21 0>, <22 0>;
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interrupt-names = "TX", "RX0", "RX1", "SCE";
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clocks = <&rcc STM32_CLOCK_BUS_APB1 0x02000000>; //RCC_APB1ENR1_CAN1EN
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status = "disabled";
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sjw = <1>;
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sample-point = <875>;
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};
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sdmmc1: sdmmc@40012800 {
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compatible = "st,stm32-sdmmc";
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reg = <0x40012800 0x400>;
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clocks = <&rcc STM32_CLOCK_BUS_APB2 0x00000400>,
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<&rcc STM32_SRC_HSI48 CLK48_SEL(0)>;
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resets = <&rctl STM32_RESET(APB2, 10U)>;
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interrupts = <49 0>;
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status = "disabled";
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};
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rtc@40002800 {
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bbram: backup_regs {
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compatible = "st,stm32-bbram";
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st,backup-regs = <32>;
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status = "disabled";
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};
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};
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};
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};
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22
dts/arm/st/l4/stm32l451Xc.dtsi
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22
dts/arm/st/l4/stm32l451Xc.dtsi
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@ -0,0 +1,22 @@
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/*
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* Copyright (c) 2023 SILA Embedded Solutions GmbH
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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#include <mem.h>
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#include <st/l4/stm32l451.dtsi>
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/ {
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sram0: memory@20000000 {
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reg = <0x20000000 DT_SIZE_K(160)>;
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};
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soc {
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flash-controller@40022000 {
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flash0: flash@8000000 {
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reg = <0x08000000 DT_SIZE_K(256)>;
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};
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};
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};
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};
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22
dts/arm/st/l4/stm32l451Xe.dtsi
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22
dts/arm/st/l4/stm32l451Xe.dtsi
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@ -0,0 +1,22 @@
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/*
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* Copyright (c) 2023 SILA Embedded Solutions GmbH
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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#include <mem.h>
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#include <st/l4/stm32l451.dtsi>
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/ {
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sram0: memory@20000000 {
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reg = <0x20000000 DT_SIZE_K(160)>;
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};
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soc {
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flash-controller@40022000 {
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flash0: flash@8000000 {
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reg = <0x08000000 DT_SIZE_K(512)>;
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};
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};
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};
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};
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@ -4,44 +4,12 @@
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* SPDX-License-Identifier: Apache-2.0
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*/
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#include <st/l4/stm32l4.dtsi>
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#include <st/l4/stm32l451.dtsi>
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/ {
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soc {
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compatible = "st,stm32l452", "st,stm32l4", "simple-bus";
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clocks {
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clk_hsi48: clk-hsi48 {
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#clock-cells = <0>;
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compatible = "fixed-clock";
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clock-frequency = <DT_FREQ_M(48)>;
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status = "disabled";
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};
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};
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pinctrl: pin-controller@48000000 {
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gpiod: gpio@48000c00 {
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compatible = "st,stm32-gpio";
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gpio-controller;
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#gpio-cells = <2>;
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reg = <0x48000c00 0x400>;
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clocks = <&rcc STM32_CLOCK_BUS_AHB2 0x00000008>;
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};
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gpioe: gpio@48001000 {
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compatible = "st,stm32-gpio";
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gpio-controller;
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#gpio-cells = <2>;
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reg = <0x48001000 0x400>;
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clocks = <&rcc STM32_CLOCK_BUS_AHB2 0x00000010>;
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};
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};
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rng: rng@50060800 {
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clocks = <&rcc STM32_CLOCK_BUS_AHB2 0x00040000>,
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<&rcc STM32_SRC_HSI48 CLK48_SEL(0)>;
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};
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usb: usb@40006800 {
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compatible = "st,stm32-usb";
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reg = <0x40006800 0x40000>;
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@ -55,127 +23,6 @@
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<&rcc STM32_SRC_HSI48 CLK48_SEL(0)>;
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status = "disabled";
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};
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i2c2: i2c@40005800 {
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compatible = "st,stm32-i2c-v2";
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clock-frequency = <I2C_BITRATE_STANDARD>;
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#address-cells = <1>;
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#size-cells = <0>;
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reg = <0x40005800 0x400>;
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clocks = <&rcc STM32_CLOCK_BUS_APB1 0x00400000>;
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interrupts = <33 0>, <34 0>;
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interrupt-names = "event", "error";
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status = "disabled";
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};
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i2c4: i2c@40008400 {
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compatible = "st,stm32-i2c-v2";
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clock-frequency = <I2C_BITRATE_STANDARD>;
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#address-cells = <1>;
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#size-cells = <0>;
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reg = <0x40008400 0x400>;
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clocks = <&rcc STM32_CLOCK_BUS_APB1_2 0x00000002>;
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interrupts = <83 0>, <84 0>;
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interrupt-names = "event", "error";
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status = "disabled";
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};
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spi2: spi@40003800 {
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compatible = "st,stm32-spi-fifo", "st,stm32-spi";
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#address-cells = <1>;
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#size-cells = <0>;
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reg = <0x40003800 0x400>;
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clocks = <&rcc STM32_CLOCK_BUS_APB1 0x00004000>;
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interrupts = <36 5>;
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status = "disabled";
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};
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spi3: spi@40003c00 {
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compatible = "st,stm32-spi-fifo", "st,stm32-spi";
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#address-cells = <1>;
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#size-cells = <0>;
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reg = <0x40003c00 0x400>;
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clocks = <&rcc STM32_CLOCK_BUS_APB1 0x00008000>;
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interrupts = <51 5>;
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status = "disabled";
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};
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usart3: serial@40004800 {
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compatible = "st,stm32-usart", "st,stm32-uart";
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reg = <0x40004800 0x400>;
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clocks = <&rcc STM32_CLOCK_BUS_APB1 0x00040000>;
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resets = <&rctl STM32_RESET(APB1L, 18U)>;
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interrupts = <39 0>;
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status = "disabled";
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};
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uart4: serial@40004c00 {
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compatible = "st,stm32-uart";
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reg = <0x40004c00 0x400>;
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clocks = <&rcc STM32_CLOCK_BUS_APB1 0x00080000>;
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resets = <&rctl STM32_RESET(APB1L, 19U)>;
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interrupts = <52 0>;
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status = "disabled";
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};
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timers3: timers@40000400 {
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compatible = "st,stm32-timers";
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reg = <0x40000400 0x400>;
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clocks = <&rcc STM32_CLOCK_BUS_APB1 0x00000002>;
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resets = <&rctl STM32_RESET(APB1L, 1U)>;
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interrupts = <29 0>;
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interrupt-names = "global";
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st,prescaler = <0>;
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status = "disabled";
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pwm {
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compatible = "st,stm32-pwm";
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status = "disabled";
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#pwm-cells = <3>;
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};
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counter {
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compatible = "st,stm32-counter";
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status = "disabled";
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};
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};
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dac1: dac@40007400 {
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compatible = "st,stm32-dac";
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reg = <0x40007400 0x400>;
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clocks = <&rcc STM32_CLOCK_BUS_APB1 0x20000000>;
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status = "disabled";
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#io-channel-cells = <1>;
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};
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can1: can@40006400 {
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compatible = "st,stm32-can";
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reg = <0x40006400 0x400>;
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interrupts = <19 0>, <20 0>, <21 0>, <22 0>;
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interrupt-names = "TX", "RX0", "RX1", "SCE";
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clocks = <&rcc STM32_CLOCK_BUS_APB1 0x02000000>; //RCC_APB1ENR1_CAN1EN
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status = "disabled";
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sjw = <1>;
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sample-point = <875>;
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};
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sdmmc1: sdmmc@40012800 {
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compatible = "st,stm32-sdmmc";
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reg = <0x40012800 0x400>;
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clocks = <&rcc STM32_CLOCK_BUS_APB2 0x00000400>,
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<&rcc STM32_SRC_HSI48 CLK48_SEL(0)>;
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resets = <&rctl STM32_RESET(APB2, 10U)>;
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interrupts = <49 0>;
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status = "disabled";
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};
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rtc@40002800 {
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bbram: backup_regs {
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compatible = "st,stm32-bbram";
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st,backup-regs = <32>;
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status = "disabled";
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};
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};
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};
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usb_fs_phy: usbphy {
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14
soc/arm/st_stm32/stm32l4/Kconfig.defconfig.stm32l451xx
Normal file
14
soc/arm/st_stm32/stm32l4/Kconfig.defconfig.stm32l451xx
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@ -0,0 +1,14 @@
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# ST Microelectronics STM32L451XX MCU
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# Copyright (c) 2023 SILA Embedded Solutions GmbH
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# SPDX-License-Identifier: Apache-2.0
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if SOC_STM32L451XX
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config SOC
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default "stm32l451xx"
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config NUM_IRQS
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default 85
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endif # SOC_STM32L451XX
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@ -37,6 +37,9 @@ config SOC_STM32L432XX
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config SOC_STM32L433XX
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bool "STM32L433XX"
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config SOC_STM32L451XX
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bool "STM32L451XX"
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config SOC_STM32L452XX
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bool "STM32L452XX"
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