drivers: can: mcan: add shared initializer macros
Add shared initializer macros for struct can_mcan_config and struct can_mcan_data. Signed-off-by: Henrik Brix Andersen <hebad@vestas.com>
This commit is contained in:
parent
5b3712a9ac
commit
41a77be91c
6 changed files with 67 additions and 173 deletions
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@ -209,6 +209,54 @@ struct can_mcan_config {
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struct can_mcan_reg;
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#ifdef CONFIG_CAN_FD_MODE
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#define CAN_MCAN_DT_CONFIG_GET(node_id, _custom_config) \
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{ \
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.can = (struct can_mcan_reg *)DT_REG_ADDR_BY_NAME(node_id, m_can), \
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.bus_speed = DT_PROP(node_id, bus_speed), \
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.sjw = DT_PROP(node_id, sjw), \
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.sample_point = DT_PROP_OR(node_id, sample_point, 0), \
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.prop_ts1 = DT_PROP_OR(node_id, prop_seg, 0) + \
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DT_PROP_OR(node_id, phase_seg1, 0), \
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.ts2 = DT_PROP_OR(node_id, phase_seg2, 0), \
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.bus_speed_data = DT_PROP(node_id, bus_speed_data), \
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.sjw_data = DT_PROP(node_id, sjw_data), \
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.sample_point_data = \
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DT_PROP_OR(node_id, sample_point_data, 0), \
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.prop_ts1_data = DT_PROP_OR(node_id, prop_seg_data, 0) + \
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DT_PROP_OR(node_id, phase_seg1_data, 0), \
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.ts2_data = DT_PROP_OR(node_id, phase_seg2_data, 0), \
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.tx_delay_comp_offset = \
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DT_PROP(node_id, tx_delay_comp_offset), \
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.phy = DEVICE_DT_GET_OR_NULL(DT_PHANDLE(node_id, phys)), \
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.max_bitrate = DT_CAN_TRANSCEIVER_MAX_BITRATE(node_id, 5000000),\
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.custom = _custom_config, \
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}
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#else /* CONFIG_CAN_FD_MODE */
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#define CAN_MCAN_DT_CONFIG_GET(node_id, _custom_config) \
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{ \
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.can = (struct can_mcan_reg *)DT_REG_ADDR_BY_NAME(node_id, m_can), \
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.bus_speed = DT_PROP(node_id, bus_speed), \
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.sjw = DT_PROP(node_id, sjw), \
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.sample_point = DT_PROP_OR(node_id, sample_point, 0), \
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.prop_ts1 = DT_PROP_OR(node_id, prop_seg, 0) + \
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DT_PROP_OR(node_id, phase_seg1, 0), \
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.ts2 = DT_PROP_OR(node_id, phase_seg2, 0), \
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.phy = DEVICE_DT_GET_OR_NULL(DT_PHANDLE(node_id, phys)), \
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.max_bitrate = DT_CAN_TRANSCEIVER_MAX_BITRATE(node_id, 1000000),\
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.custom = _custom_config, \
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}
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#endif /* !CONFIG_CAN_FD_MODE */
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#define CAN_MCAN_DT_CONFIG_INST_GET(inst, _custom_config) \
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CAN_MCAN_DT_CONFIG_GET(DT_DRV_INST(inst), _custom_config)
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#define CAN_MCAN_DATA_INITIALIZER(_msg_ram, _custom_data) \
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{ \
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.msg_ram = _msg_ram, \
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.custom = _custom_data, \
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}
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int can_mcan_set_mode(const struct device *dev, enum can_mode mode);
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int can_mcan_set_timing(const struct device *dev,
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@ -119,45 +119,6 @@ static const struct can_driver_api mcux_mcan_driver_api = {
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#endif /* CONFIG_CAN_FD_MODE */
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};
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#ifdef CONFIG_CAN_FD_MODE
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#define MCUX_MCAN_MCAN_INIT(n) \
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{ \
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.can = (struct can_mcan_reg *)DT_INST_REG_ADDR(n), \
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.bus_speed = DT_INST_PROP(n, bus_speed), \
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.sjw = DT_INST_PROP(n, sjw), \
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.sample_point = DT_INST_PROP_OR(n, sample_point, 0), \
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.prop_ts1 = DT_INST_PROP_OR(n, prop_seg, 0) + \
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DT_INST_PROP_OR(n, phase_seg1, 0), \
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.ts2 = DT_INST_PROP_OR(n, phase_seg2, 0), \
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.bus_speed_data = DT_INST_PROP(n, bus_speed_data), \
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.sjw_data = DT_INST_PROP(n, sjw_data), \
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.sample_point_data = \
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DT_INST_PROP_OR(n, sample_point_data, 0), \
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.prop_ts1_data = DT_INST_PROP_OR(n, prop_seg_data, 0) + \
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DT_INST_PROP_OR(n, phase_seg1_data, 0), \
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.ts2_data = DT_INST_PROP_OR(n, phase_seg2_data, 0), \
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.tx_delay_comp_offset = \
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DT_INST_PROP(n, tx_delay_comp_offset), \
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.phy = DEVICE_DT_GET_OR_NULL(DT_INST_PHANDLE(n, phys)), \
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.max_bitrate = DT_INST_CAN_TRANSCEIVER_MAX_BITRATE(n, 5000000), \
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.custom = &mcux_mcan_config_##n, \
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}
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#else /* CONFIG_CAN_FD_MODE */
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#define MCUX_MCAN_MCAN_INIT(n) \
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{ \
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.can = (struct can_mcan_reg *)DT_INST_REG_ADDR(n), \
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.bus_speed = DT_INST_PROP(n, bus_speed), \
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.sjw = DT_INST_PROP(n, sjw), \
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.sample_point = DT_INST_PROP_OR(n, sample_point, 0), \
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.prop_ts1 = DT_INST_PROP_OR(n, prop_seg, 0) + \
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DT_INST_PROP_OR(n, phase_seg1, 0), \
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.ts2 = DT_INST_PROP_OR(n, phase_seg2, 0), \
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.phy = DEVICE_DT_GET_OR_NULL(DT_INST_PHANDLE(n, phys)), \
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.max_bitrate = DT_INST_CAN_TRANSCEIVER_MAX_BITRATE(n, 1000000), \
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.custom = &mcux_mcan_config_##n, \
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}
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#endif /* !CONFIG_CAN_FD_MODE */
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#define MCUX_MCAN_INIT(n) \
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static void mcux_mcan_irq_config_##n(const struct device *dev); \
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\
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@ -169,14 +130,13 @@ static const struct can_driver_api mcux_mcan_driver_api = {
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}; \
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\
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static const struct can_mcan_config can_mcan_config_##n = \
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MCUX_MCAN_MCAN_INIT(n); \
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CAN_MCAN_DT_CONFIG_INST_GET(n, &mcux_mcan_config_##n); \
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\
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static struct mcux_mcan_data mcux_mcan_data_##n; \
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\
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static struct can_mcan_data can_mcan_data_##n = { \
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.msg_ram = &mcux_mcan_data_##n.msg_ram, \
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.custom = &mcux_mcan_data_##n, \
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}; \
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static struct can_mcan_data can_mcan_data_##n = \
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CAN_MCAN_DATA_INITIALIZER(&mcux_mcan_data_##n.msg_ram, \
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&mcux_mcan_data_##n); \
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\
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DEVICE_DT_INST_DEFINE(n, &mcux_mcan_init, NULL, \
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&can_mcan_data_##n, \
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@ -126,39 +126,6 @@ static void config_can_##inst##_irq(void)
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irq_enable(DT_INST_IRQ_BY_NAME(inst, line_1, irq)); \
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}
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#ifdef CONFIG_CAN_FD_MODE
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#define CAN_SAM_MCAN_CFG(inst) \
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{ \
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.can = (struct can_mcan_reg *)DT_INST_REG_ADDR(inst), \
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.bus_speed = DT_INST_PROP(inst, bus_speed), .sjw = DT_INST_PROP(inst, sjw), \
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.sample_point = DT_INST_PROP_OR(inst, sample_point, 0), \
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.prop_ts1 = DT_INST_PROP_OR(inst, prop_seg, 0) + DT_INST_PROP_OR(inst, phase_seg1, 0), \
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.ts2 = DT_INST_PROP_OR(inst, phase_seg2, 0), \
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.bus_speed_data = DT_INST_PROP(inst, bus_speed_data), \
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.sjw_data = DT_INST_PROP(inst, sjw_data), \
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.sample_point_data = DT_INST_PROP_OR(inst, sample_point_data, 0), \
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.prop_ts1_data = DT_INST_PROP_OR(inst, prop_seg_data, 0) + \
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DT_INST_PROP_OR(inst, phase_seg1_data, 0), \
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.ts2_data = DT_INST_PROP_OR(inst, phase_seg2_data, 0), \
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.tx_delay_comp_offset = DT_INST_PROP(inst, tx_delay_comp_offset), \
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.phy = DEVICE_DT_GET_OR_NULL(DT_INST_PHANDLE(inst, phys)), \
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.max_bitrate = DT_INST_CAN_TRANSCEIVER_MAX_BITRATE(inst, 5000000), \
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.custom = &can_sam_cfg_##inst, \
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}
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#else /* CONFIG_CAN_FD_MODE */
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#define CAN_SAM_MCAN_CFG(inst) \
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{ \
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.can = (struct can_mcan_reg *)DT_INST_REG_ADDR(inst), \
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.bus_speed = DT_INST_PROP(inst, bus_speed), .sjw = DT_INST_PROP(inst, sjw), \
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.sample_point = DT_INST_PROP_OR(inst, sample_point, 0), \
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.prop_ts1 = DT_INST_PROP_OR(inst, prop_seg, 0) + DT_INST_PROP_OR(inst, phase_seg1, 0), \
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.ts2 = DT_INST_PROP_OR(inst, phase_seg2, 0), \
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.phy = DEVICE_DT_GET_OR_NULL(DT_INST_PHANDLE(inst, phys)), \
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.max_bitrate = DT_INST_CAN_TRANSCEIVER_MAX_BITRATE(inst, 1000000), \
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.custom = &can_sam_cfg_##inst, \
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}
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#endif /* CONFIG_CAN_FD_MODE */
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#define CAN_SAM_CFG_INST(inst) \
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static const struct can_sam_config can_sam_cfg_##inst = { \
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.pmc_id = DT_INST_PROP(inst, peripheral_id), \
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@ -167,15 +134,14 @@ static void config_can_##inst##_irq(void)
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}; \
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\
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static const struct can_mcan_config can_mcan_cfg_##inst = \
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CAN_SAM_MCAN_CFG(inst);
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CAN_MCAN_DT_CONFIG_INST_GET(inst, &can_sam_cfg_##inst);
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#define CAN_SAM_DATA_INST(inst) \
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static struct can_sam_data can_sam_data_##inst; \
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\
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static struct can_mcan_data can_mcan_data_##inst = { \
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.msg_ram = &can_sam_data_##inst.msg_ram, \
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.custom = &can_sam_data_##inst, \
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}; \
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static struct can_mcan_data can_mcan_data_##inst = \
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CAN_MCAN_DATA_INITIALIZER(&can_sam_data_##inst.msg_ram, \
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&can_sam_data_##inst); \
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#define CAN_SAM_DEVICE_INST(inst) \
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DEVICE_DT_INST_DEFINE(inst, &can_sam_init, NULL, \
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@ -151,8 +151,6 @@ static void config_can_##inst##_irq(void) \
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irq_enable(DT_INST_IRQ_BY_NAME(inst, line_1, irq)); \
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}
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#ifdef CONFIG_CAN_FD_MODE
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#define CAN_STM32FD_CFG_INST(inst) \
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PINCTRL_DT_INST_DEFINE(inst); \
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\
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@ -161,57 +159,18 @@ static void config_can_##inst##_irq(void) \
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.pcfg = PINCTRL_DT_INST_DEV_CONFIG_GET(inst), \
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}; \
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\
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static const struct can_mcan_config can_mcan_cfg_##inst = { \
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.can = (struct can_mcan_reg *) DT_INST_REG_ADDR_BY_NAME(inst, m_can), \
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.bus_speed = DT_INST_PROP(inst, bus_speed), \
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.sjw = DT_INST_PROP(inst, sjw), \
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.sample_point = DT_INST_PROP_OR(inst, sample_point, 0), \
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.prop_ts1 = DT_INST_PROP_OR(inst, prop_seg, 0) + \
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DT_INST_PROP_OR(inst, phase_seg1, 0), \
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.ts2 = DT_INST_PROP_OR(inst, phase_seg2, 0), \
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.bus_speed_data = DT_INST_PROP(inst, bus_speed_data), \
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.sjw_data = DT_INST_PROP(inst, sjw_data), \
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.sample_point_data = DT_INST_PROP_OR(inst, sample_point_data, 0), \
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.prop_ts1_data = DT_INST_PROP_OR(inst, prop_seg_data, 0) + \
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DT_INST_PROP_OR(inst, phase_seg1_data, 0), \
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.ts2_data = DT_INST_PROP_OR(inst, phase_seg2_data, 0), \
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.tx_delay_comp_offset = DT_INST_PROP(inst, tx_delay_comp_offset), \
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.phy = DEVICE_DT_GET_OR_NULL(DT_INST_PHANDLE(inst, phys)), \
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.max_bitrate = DT_INST_CAN_TRANSCEIVER_MAX_BITRATE(inst, 5000000), \
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.custom = &can_stm32fd_cfg_##inst, \
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};
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#else /* CONFIG_CAN_FD_MODE */
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#define CAN_STM32FD_CFG_INST(inst) \
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PINCTRL_DT_INST_DEFINE(inst); \
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\
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static const struct can_stm32fd_config can_stm32fd_cfg_##inst = { \
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.config_irq = config_can_##inst##_irq, \
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.pcfg = PINCTRL_DT_INST_DEV_CONFIG_GET(inst), \
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}; \
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\
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static const struct can_mcan_config can_mcan_cfg_##inst = { \
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.can = (struct can_mcan_reg *) DT_INST_REG_ADDR_BY_NAME(inst, m_can), \
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.bus_speed = DT_INST_PROP(inst, bus_speed), \
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.sjw = DT_INST_PROP(inst, sjw), \
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.sample_point = DT_INST_PROP_OR(inst, sample_point, 0), \
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.prop_ts1 = DT_INST_PROP_OR(inst, prop_seg, 0) + \
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DT_INST_PROP_OR(inst, phase_seg1, 0), \
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.ts2 = DT_INST_PROP_OR(inst, phase_seg2, 0), \
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.phy = DEVICE_DT_GET_OR_NULL(DT_INST_PHANDLE(inst, phys)), \
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.max_bitrate = DT_INST_CAN_TRANSCEIVER_MAX_BITRATE(inst, 1000000), \
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.custom = &can_stm32fd_cfg_##inst, \
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};
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#endif /* CONFIG_CAN_FD_MODE */
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static const struct can_mcan_config can_mcan_cfg_##inst = \
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CAN_MCAN_DT_CONFIG_INST_GET(inst, &can_stm32fd_cfg_##inst);
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#define CAN_STM32FD_DATA_INST(inst) \
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static struct can_mcan_data can_mcan_dev_data_##inst = { \
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.msg_ram = (struct can_mcan_msg_sram *) \
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static struct can_mcan_data can_mcan_data_##inst = \
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CAN_MCAN_DATA_INITIALIZER((struct can_mcan_msg_sram *) \
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DT_INST_REG_ADDR_BY_NAME(inst, message_ram), \
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};
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NULL);
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#define CAN_STM32FD_DEVICE_INST(inst) \
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DEVICE_DT_INST_DEFINE(inst, &can_stm32fd_init, NULL, \
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&can_mcan_dev_data_##inst, &can_mcan_cfg_##inst, \
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&can_mcan_data_##inst, &can_mcan_cfg_##inst, \
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POST_KERNEL, CONFIG_CAN_INIT_PRIORITY, \
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&can_stm32fd_driver_api);
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@ -148,45 +148,6 @@ static const struct can_driver_api can_stm32h7_driver_api = {
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#endif
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};
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#ifdef CONFIG_CAN_FD_MODE
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#define CAN_STM32H7_MCAN_MCAN_INIT(n) \
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{ \
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.can = (struct can_mcan_reg *)DT_INST_REG_ADDR(n), \
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.bus_speed = DT_INST_PROP(n, bus_speed), \
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.sjw = DT_INST_PROP(n, sjw), \
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.sample_point = DT_INST_PROP_OR(n, sample_point, 0), \
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.prop_ts1 = DT_INST_PROP_OR(n, prop_seg, 0) + \
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DT_INST_PROP_OR(n, phase_seg1, 0), \
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.ts2 = DT_INST_PROP_OR(n, phase_seg2, 0), \
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.bus_speed_data = DT_INST_PROP(n, bus_speed_data), \
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.sjw_data = DT_INST_PROP(n, sjw_data), \
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.sample_point_data = \
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DT_INST_PROP_OR(n, sample_point_data, 0), \
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.prop_ts1_data = DT_INST_PROP_OR(n, prop_seg_data, 0) + \
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DT_INST_PROP_OR(n, phase_seg1_data, 0), \
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.ts2_data = DT_INST_PROP_OR(n, phase_seg2_data, 0), \
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.tx_delay_comp_offset = \
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DT_INST_PROP(n, tx_delay_comp_offset), \
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.phy = DEVICE_DT_GET_OR_NULL(DT_INST_PHANDLE(n, phys)), \
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.max_bitrate = DT_INST_CAN_TRANSCEIVER_MAX_BITRATE(n, 5000000), \
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.custom = &can_stm32h7_cfg_##n, \
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}
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#else /* CONFIG_CAN_FD_MODE */
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#define CAN_STM32H7_MCAN_MCAN_INIT(n) \
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{ \
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.can = (struct can_mcan_reg *)DT_INST_REG_ADDR(n), \
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.bus_speed = DT_INST_PROP(n, bus_speed), \
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.sjw = DT_INST_PROP(n, sjw), \
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.sample_point = DT_INST_PROP_OR(n, sample_point, 0), \
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.prop_ts1 = DT_INST_PROP_OR(n, prop_seg, 0) + \
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DT_INST_PROP_OR(n, phase_seg1, 0), \
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.ts2 = DT_INST_PROP_OR(n, phase_seg2, 0), \
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.phy = DEVICE_DT_GET_OR_NULL(DT_INST_PHANDLE(n, phys)), \
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.max_bitrate = DT_INST_CAN_TRANSCEIVER_MAX_BITRATE(n, 1000000), \
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.custom = &can_stm32h7_cfg_##n, \
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}
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#endif /* !CONFIG_CAN_FD_MODE */
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#define CAN_STM32H7_MCAN_INIT(n) \
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static void stm32h7_mcan_irq_config_##n(void); \
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\
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@ -202,12 +163,11 @@ static const struct can_driver_api can_stm32h7_driver_api = {
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}; \
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\
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static const struct can_mcan_config can_mcan_cfg_##n = \
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CAN_STM32H7_MCAN_MCAN_INIT(n); \
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CAN_MCAN_DT_CONFIG_INST_GET(n, &can_stm32h7_cfg_##n); \
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\
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static struct can_mcan_data can_mcan_data_##n = { \
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.msg_ram = (struct can_mcan_msg_sram *) \
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DT_INST_REG_ADDR_BY_NAME(n, message_ram), \
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}; \
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static struct can_mcan_data can_mcan_data_##n = \
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CAN_MCAN_DATA_INITIALIZER((struct can_mcan_msg_sram *) \
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DT_INST_REG_ADDR_BY_NAME(n, message_ram), NULL); \
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\
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DEVICE_DT_INST_DEFINE(n, &can_stm32h7_init, NULL, \
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&can_mcan_data_##n, \
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